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2012-06-04video: tegra: dc: Export dispay feature table.Kevin Huang
Bug 992947 Change-Id: I0d1ecc9f8f042956cbe631779260a38573936616 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/105776 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-05-18video: tegra: dc: add per window global alphaJon Mayo
Adds a global alpha parameter to each window. It provides a default alpha value for pixel formats that do not include alpha. Change-Id: I5465864877a727b4daed0eb32fb8219e2ccb663e Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/101806 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-03-29video: tegra: add cursor mode flippingAdam Cheney
This change adds a flag to flip windows in cursor mode. Cursor mode will cause flips to be skipped over if there are newer flip requests waiting in the workqueue. Add CURSOR_MODE to caps bitfield. bug 942762 Change-Id: Ib52a0a5565f961cdd9650e4204cd65b86f96fee1 Signed-off-by: Adam Cheney <acheney@nvidia.com> Reviewed-on: http://git-master/r/90418 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Robert Morell <rmorell@nvidia.com>
2012-03-02video: tegra: add ioctl to query DC capabilitiesAdam Cheney
Defines a new ioctl for querying a bitfield of DC capabilities. The first defined caps bit is for "cursor mode" flipping support. bug 942631 Change-Id: Iea8a0dfe4e400e0dad4bb9f23509c3ac0ca532ba Reviewed-on: http://git-master/r/87066 Reviewed-by: Robert Morell <rmorell@nvidia.com> Tested-by: Adam Cheney <acheney@nvidia.com>
2011-11-30video: tegra: Add support for surface mirroringMichael Frydrych
This adds flags for horizontal and vertical surface mirroring, and updates the ioctl handling code to set the appropriate core dc mirroring flags when the dc_ext mirroring flags are passed. Bug 905578 Change-Id: Idbe0c95cb0807aa9e26ccfdc42cf4ef0dc9eb38f Reviewed-on: http://git-master/r/64110 Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com> Tested-by: Michael Frydrych <mfrydrych@nvidia.com> Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Rebase-Id: R5795faa3988df9f87e669f40aab9b0281111a4b0
2011-11-30video: tegra: Add support for tiled surfacesRobert Morell
This adds a new flags field to the dc_ext flip ioctl, adds a flag for tiled surfaces, and updates the ioctl handling code to set the appropriate core dc tiling flag when the dc_ext tiled flag is passed. Bug 831397 Change-Id: I36cbf4a59173885a98209e559f77404bddcf54cd Reviewed-on: http://git-master/r/64109 Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com> Tested-by: Michael Frydrych <mfrydrych@nvidia.com> Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Robert Morell <rmorell@nvidia.com> Rebase-Id: Rf741be9e6945b6b92699e26fb1745fafef4d8fe4
2011-11-30video: tegra: dc: support global fbdev gamma tableDavid Schalig
Add support to set a global gamma correction table via fbdev cmap API. The 3 Tegra DC windows have their own local gamma tables, which can either override or alter the global table. Bug 868060 Change-Id: I0be1c5e4afa8fd8c010b772c7808c883c0848ab4 Reviewed-on: http://git-master/r/60201 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R7e613b1c8ac469242172bd81db9dfba25176e0c3
2011-11-30video: tegra: dc: ioctl for setting gamma lutDavid Schalig
- enable gamma look-up hardware only when needed to save power - add flags field to ioctl TEGRA_DC_EXT_SET_LUT for forward compatibility Bug 868060 Change-Id: I690f8b8856e0b1acd6215907ca8bd78ecaf30b17 Reviewed-on: http://git-master/r/57736 Reviewed-by: David Schalig <dschalig@nvidia.com> Tested-by: David Schalig <dschalig@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Robert Morell <rmorell@nvidia.com> Rebase-Id: Rf6081a9372ba7d6e53a66b9b58a50a62ad409d9a
2011-11-30video: tegra: dc: add ioctl for setting gamma lutDavid Schalig
Adds ioctl TEGRA_DC_EXT_SET_LUT to dc_ext driver for setting a DC window's color palette. Bug 868060 Change-Id: I57ffcf3a3f91e76efd1c7f1f972b73c2edbaed82 Reviewed-on: http://git-master/r/56392 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Rebase-Id: R712c71151d0c3e3d274279f334bedf312e26e75d
2011-11-30video: tegra: Implement EDID queryRobert Morell
This change implements the TEGRA_DC_EXT_CONTROL_GET_OUTPUT_EDID ioctl in the dc_ext interface. It first adds a way for the tegra dc EDID module to export EDID data safely, without the risk of reading an incomplete or corrupted EDID in the presence of hotplug, by moving the actual data to a substructure with a lifetime maintained by a kref. Then, that support is plumbed through the hdmi block (which is currently the only way to get at the EDID) and out to userspace. Signed-off-by: Robert Morell <rmorell@nvidia.com> Bug 817119 Original-Change-Id: I78cd170e15322011b428cb71ffad2c0c3ea058ac Reviewed-on: http://git-master/r/49127 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Rebase-Id: Rafafc0a6fbacda5494b12162ad99a8c70ceeb2e0
2011-11-30video: tegra: dc: Separate allocations for U and VRobert Morell
Currently, dc_ext only takes a single nvmap memory ID per overlay, even in the YUV case (the U and V planes are expected to be differentiated using an offset from the beginning of the nvmap allocation). This is problematic for some software flows, such as certain video interlacing algorithms that will vary the luma plane while keeping the chrome plane constant. This change allows dc_ext clients to specify a different nvmap allocation for each of the Y, U, and V planes. If a YUV surface is used and no U or V plane allocation is specified, the old behavior is preserved: the U and V offsets are assumed to be within the same allocation as Y. Note: this changes the behavior of the offset parameter: the old code added offset to offset_u and offset_v when using it. The new code treats all three offsets as relative to the beginning of the allocation. It also fixes a bug in the code where offset was applied twice to the Y plane. I believe this is safe because the presence of this bug means that no existing clients are using offset != 0 (or if they are, they're already broken). Signed-off-by: Robert Morell <rmorell@nvidia.com> Bug 850882 Original-Change-Id: I230e03db25baaae73a3bdc0d45a2aec162b87fa4 Reviewed-on: http://git-master/r/41471 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Ra6dd17a50de7150edf104d2a6c9b3b9949919022
2011-11-30video: tegra: dc_ext: Add head status ioctlRobert Morell
This change adds a new tegra_dc_ext ioctl to allow userspace to query whether a head is currently enabled or not. This is necessary for the X server to be able to restore the outputs that were enabled before it was started. bug 818525 Original-Change-Id: I6d209894081312621f623a722cdd3fcb53553c61 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-by: Aaron Plattner <aplattner@nvidia.com> Reviewed-by: Olof Johansson <olofj@chromium.org> Reviewed-on: http://git-master/r/40530 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Re42eae066099587529fbcc677c06ddefef18d36d
2011-11-30video: tegra: Expose vblank syncpointRobert Morell
This change adds support for userspace to query the syncpoint that display autoincrements every vblank. This can be useful for applications to time buffer submissions to throttle rendering and prevent excessive host stalls. bug 818525 Original-Change-Id: I050e4dcd08609da802f10eeec5b70da181b21717 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40529 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rac929d8ba6b14e469fef4c2753b040e02fae0b8e
2011-11-30video: tegra: Expose possible bound head maskRobert Morell
This change adds support for userspace to query which heads an output may be bound to. Since our implementation currently hardcodes the head to output mapping, we currently always fill in a single bit. However, for future implementations we will be able to dynamically bind outputs to heads. bug 818525 Original-Change-Id: Ib0dead7748620a538c8f8d6ef548ca8b13a9c2b2 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40528 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R524f90dca82a3a67fa3289a3ebc4c7e32716749b
2011-11-30video: tegra: Add userspace CSC controlRobert Morell
This adds configurability of the per-window color space conversion support in the Tegra display controller through the dc extension interface. The CSC matrix defaults to its previously-hardcoded values, but can be overridden by userspace. bug 818525 Original-Change-Id: I00d8e48dd38a40e5b8c36d4624d31c834e5cd9de Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40527 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R1f445ab544b4c06f56dde1e3f0e9db3c930a9c14
2011-11-30video: tegra: Allow fractional input rectsRobert Morell
This change makes the input rect for Tegra windows be a 20.12 fixed-point number instead of an integer. This allows software to specify sub-pixel precision. bug 818525 Original-Change-Id: I130f63b68159ed896d1113ea537307997875ca40 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40526 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R848e901645aa49776d4dc41fa4210b6b594a8d84
2011-11-30video: tegra: Add control device to dc extension driverRobert Morell
This device exposes control over everything that's not specific to one of T20's two display controllers. It supports: - output devices - event delivery - hotplug events bug 818525 Original-Change-Id: I3a46f1dddc483b08ed3ee91a4f9c64111c1fd7eb Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40520 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R9e49fe41f3327b797ec65c3729f4f94edbb45307
2011-11-30video: tegra: Add cursor support to dc extensionsRobert Morell
This change adds full support for specify the cursor image and manipulating its position. bug 818525 Original-Change-Id: I101a951aff358b0ac0998afc6fe5f6c5c4d37c64 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40518 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R93f0c68a14e4419f200a77d48a17eb8862f2e4e1
2011-11-30video: tegra: Remove fbdev SET_NVMAP and FLIP ioctlsRobert Morell
This is necessary so that multiple clients can open /dev/fb* at the same time. The functionaly has been moved to the dc extension device nodes. bug 818525 Original-Change-Id: I299e060fce3bb9e3cbf976f3d94dbabc4b3f1654 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40515 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Rebase-Id: R32908db3f1e344eea13d628f0341600ed698783d
2011-11-30video: tegra: Implement FLIP dc extension ioctl.Robert Morell
This is very similar to the tegra_fb FLIP ioctl. bug 818525 Original-Change-Id: Iba32ab5bf730b575477c62a8ae4394f1779ef65e Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40514 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Rebase-Id: R9a79363b09d2df38bec4b8a8666f97b1feff76ff
2011-11-30video: tegra: Add an ioctl() implementation.Robert Morell
This implements: - GET_WINDOW - PUT_WINDOW and adds a stub for FLIP. bug 818525 Original-Change-Id: I467b58a77242b2a8077e236106b542b8545f5353 Signed-off-by: Robert Morell <rmorell@nvidia.com> Reviewed-on: http://git-master/r/40513 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Rebase-Id: R4fc354fdae76f3eac189d481fb346a0982146db5
2011-11-30video: tegra: add support for tiled surfacesMichael I. Gold
Change-Id: I82497fc756552740836eaa2f608fecaea409cfeb Signed-off-by: Michael I. Gold <gold@nvidia.com>
2011-11-30video: tegra: add display inversion supportAri Hirvonen
Change-Id: Ied3851e0cb801f607499493f1e552f42daa97e6b Signed-off-by: Ari Hirvonen <ahirvonen@nvidia.com>
2011-11-30[ARM] tegra: hdmi nvhdcp driverJon Mayo
Device /dev/nvhdcpX is used to manage NVHDCP on framebuffer /dev/fbX. These devices are created on hdmi driver initialition when it is attached to dc. Currently only one nvhdcp device may be created. An ioctl interface is in video/nvhdcp.h Check for repeaters and store repeater info. userspace application queries this status to authenticate the connection. When authentication fails, auto-renegotiate every 1.75 seconds. Give up after 5 failed attempts, reset after hotplug or policy change. use TEGRA_DC_OUT_NVHDCP_POLICY_ON_DEMAND in tegra_dc_out.flags in board panel configuration to select a different default policy at probe. Currently only TEGRA_DC_OUT_NVHDCP_POLICY_ALWAYS_ON is supported. Change-Id: I0db66fc86096b98d2604544061721d291523de75 Reviewed-by: Jon Mayo <jmayo@nvidia.com> Tested-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Phillip Smith <psmith@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Signed-off-by: Erik Gilling <konkers@android.com>
2011-11-30video: tegra: YUV overlay supportAri Hirvonen
Change-Id: I4bed4d37bc275cca9ef69390c217498529121db0 Signed-off-by: Erik Gilling <konkers@android.com>
2011-11-30video: tegra: add IOCTL for querying modesErik Gilling
Change-Id: Ic312271b96a8bb8d8b2696448d3ff7fd73a7a851 Signed-off-by: Erik Gilling <konkers@android.com>
2011-11-30video: tegra: add host1x support to driverGary King
includes changes by: Antti Hatala <ahatala@nvidia.com> (1) Gary King <gking@nvidia.com> (1) Erik Gilling <konkers@android.com> (2) Antti Hatala <ahatala@nvidia.com> video: tegra: dc: use nvhost driver for host1x power management Gary King <gking@nvidia.com> video: tegra: fb: add ioctl to flip dc windows to nvmap handles Erik Gilling <konkers@android.com> video: tegra: dc: increment syncpoints following window flips video: tegra: drain syncpt waits on display disable Original commit messages: ** video: tegra: dc: use nvhost driver for host1x power management Incrementing the frame done syncpoint value from the display interrupt requires that the host module is powered on. As the syncpoint state is saved and restored automatically by the host driver a cpu increment of a syncpoint in the powered down state will be lost. Also adds checks for host module being powered. ** video: tegra: fb: add ioctl to flip dc windows to nvmap handles tegra user-space graphics drivers may allocate framebuffers using nvmap rather than rendering to the common framebuffer, this may be done to support deeper buffer pipelining, color formats and pixel layouts other than the initial bootup framebuffer, etc. to use this ioctl, a caller must first specify an nvmap fd which is already open in the calling process so that the subsequent flip ioctls may be properly validated. flips are performed asynchronously, with flip completion notifications provided back to the caller via the host1x syncpoint mechanism based on earlier changes made by Antti Hatala <ahatala@nvidia.com> and Erik Gilling <konkers@android.com> Change-Id: I4e8a8bb92085a485d65fd87d89112b2969ee37ff Signed-off-by: Gary King <gking@nvidia.com>
2011-07-25OMAP: DSS2: Remove unused opt_clock_availableTomi Valkeinen
opt_clock_available() is no longer needed, so remove it. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-07-25OMAP: DSS2: rewrite use of context_loss_countTomi Valkeinen
The function to get device's context loss count has changed from omap_pm_get_last_off_on_transaction_id() to omap_pm_get_dev_context_loss_count() Change name of the function pointer in omapdss.h accordingly, and use the term "context loss count" instead of "context id" in the code. Restructure the context loss count functions to handle errors properly, and ensure that context is always considered lost if an error happens. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-07-01OMAP: DSS2: Add Color Phase Rotation supportTomi Valkeinen
Add Color Phase Rotation (CPR) support and sysfs files to enable CPR and to set the CPR coefficient matrix. CPR is enabled via manager?/cpr_enable file, and the coefficient matrix is set via manager?/cpr_coef file. The values in cpr_coef are in the following order: RR RG RB GR GG GB BR BG BB Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-07-01OMAP: DSS2: remove update_mode from omapdssTomi Valkeinen
Remove the whole update_mode stuff from omapdss driver. If automatic update for manual update displays is needed, it's better implemented in higher layers. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-07-01OMAP: DSS2: remove extra includes from include/video/omapdss.hTomi Valkeinen
omapdss.h included platform_device.h and atomic.h, neither of which is needed by omapdss.h. Remove those includes from omapdss.h, and fix the affected .c files which did not include platform_device.h even though they should. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-05-24Merge branches 'common/fbdev' and 'common/fbdev-meram' of ↵Paul Mundt
master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
2011-05-24Merge branch 'for-paul' of git://gitorious.org/linux-omap-dss2/linuxPaul Mundt
Conflicts: drivers/video/omap2/dss/dsi.c drivers/video/omap2/dss/dss_features.c drivers/video/omap2/dss/dss_features.h Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-23sh_mobile_meram: Add support for NV24 framebuffersDamian
Since the NV24 framebuffer has a CbCr plane that is twice as wide as the Y plane, it needs to be handled as a special case. Signed-off-by: Damian Hobson-Garcia <dhobsong@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-23sh_mobile_meram: MERAM framework for LCDCDamian
Based on the patch by Takanari Hayama <taki@igel.co.jp> Adds support framework necessary to use Media RAM (MERAM) caching functionality with the LCDC. The MERAM is accessed through up to 4 Interconnect Buffers (ICBs). ICB numbers and MERAM address ranges to use are specified in by filling in the .meram_cfg member of the LCDC platform data Signed-off-by: Damian Hobson-Garcia <dhobsong@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-23OMAP: DSS2: Add support for NV12 formatAmber Jain
Add the support for NV12 color format. Configure base address for UV component of NV12 color format. Change the way chroma scaling is handled for YUV formats on OMAP4 by enabling chroma-resampling for video pipeline and hence using FIR2 register set for scaling UV. Changes to _dispc_set_scaling(), because of the reason above, are: - call _dispc_set_scaling_common() to handle scaling for all color formats except for OMAP4 where it only handles scaling for RGB or Y-component - call _dispc_set_scaling_uv() for special handling required for UV component on OMAP4. - dispc_set_scaling_uv() also resets chroma-resampling bit for RGB color modes. Contains chroma scaling (_dispc_set_scaling_uv) design and implemented by Lajos Molnar <molnar@ti.com> Signed-off-by: Amber Jain <amber@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-05-23OMAP: DSS2: Add new color formats for OMAP4Amber Jain
Add new color formats supported by OMAP4: NV12, RGBA16, RGBX16, ARGB16_1555, XRGB16_1555. NV12 color format is defined here, its support in DSS will be added separately. Signed-off-by: Amber Jain <amber@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-05-16OMAP: DSS2: DSI: Get number of DSI data lanes using DSI_GNQ registerArchit Taneja
On OMAP3, the DSI module has 2 data lanes. On OMAP4, DSI1 has 4 data lanes and DSI2 has 2 data lanes. Introduce function dsi_get_num_data_lanes() which returns the number of data lanes on the dsi interface, introduce function dsi_get_num_data_lanes_dssdev() which returns the number of data lanes used by the omap_dss_device connected to the lanes. Use the DSI_GNQ register on OMAP4 to get the number of data lanes, modify dsi.c to use the number of lanes and the extra data lanes on DSI1. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-05-12OMAP: DSS2: RFBI: add omap_rfbi_configureTomi Valkeinen
Add omap_rfbi_configure() which the panel driver can use to reconfigure the data element size and the number of data lines in the RFBI bus. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-05-12OMAP: DSS2: RFBI: add rfbi_bus_lockTomi Valkeinen
Add similar bus lock to RFBI as is in DSI. The panel driver can use the bus lock to mark that the RFBI bus is currently in use. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-05-12OMAP4: DSS2: DSI: Changes for DSI2 on OMAP4Archit Taneja
Introduce DSI2 PLL clock sources needed by LCD2 channel and DSI2 Protocol engine and DISPC Functional clock. Do the following: - Modify dss_get_dsi_clk_source() and dss_select_dsi_clk_source() to take the dsi module number as an argument. - Create debugfs files for dsi2, split the corresponding debugfs functions. - Allow DPI to use these new clock sources. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-05-12OMAP: DSS2: Pass platform_device as an argument in dsi functionsArchit Taneja
The DSI interface is represented as a platform device, using the DSI platform driver(dsi.c). The current DSI driver design is capable of running only one instance of a DSI device. On OMAP4, there are 2 very similar DSI modules which can be represented as instances of "omapdss_dsi" platform device. Add member "module" in "dssdev.phy.dsi" that tells us which DSI module's lanes the panel is connected to. Modify dsi.c functions to take the device's platform_device struct pointer, provide functions dsi_get_dsidev_from_dssdev() and dsi_get_dsidev_from_id() take the panel's omap_dss_device and module number respectively, and return the platform_device pointer. Currently, the dsi struct is declared globally and is accessed when dsi data is needed. The new pdev argument will be used later to provide the platform device's dsi related data. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-05-12OMAP: DSS2: DSI: Add extra omap_dss_device argument in functions exported by dsiArchit Taneja
Add pointer to omap_dss_device struct as an argument in the functions which are exported to dsi panel drivers. This argument will tell the DSI driver which DSI interface's data it has to choose. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-05-11OMAP: DSS2: Taal: Implement ULPS functionalityTomi Valkeinen
ULPS is a low power state where the DSI lanes are kept at ground. This patch implements ULPS by having a DSI bus inactivity timer which triggers the entry to ULPS. ULPS exit will happen automatically when the driver needs to do something on the DSI lanes. The ulps_timeout is configurable from board file or via sysfs. Additionally another sysfs file, "ulps", can be used to check the current ULPS state, or to manually enter or exit ULPS. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-05-11OMAP: DSS2: Taal: Implement configurable ESD intervalTomi Valkeinen
ESD check in Taal driver is currently on/off feature with hardcoded interval. This patch changes it to a configurable interval, which can be set from the board file. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-05-11OMAP: DSS2: DSI: Add DSI pad muxing supportTomi Valkeinen
Add dsi_mux_pads function pointer to omap_dss_board_info, and use the function pointer in DSI code to configure the DSI pads either to normal DSI operation, or to pull down when in ULPS. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-05-11OMAP: DSS2: DSI: add parameter to enter ulps on disableTomi Valkeinen
Add parameter to omapdss_dsi_display_disable() which the panel driver can use to tell if the DSI lanes should be put to ULPS before disabling the interface. This can be used to skip ULPS entry in cases where the panel doesn't care about ULPS state, for example when the panel will be reset, or when the display interface will be enabled again right after the disable. This will speed up the operation considerably in cases where entering ULPS would fail with timeout, and the panel driver isn't even interested in entering ULPS. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-05-11OMAP: DSS2: DSI: add option to leave DSI lanes powered onTomi Valkeinen
The DSI pins are powered by VDDS_DSI. If VDDS_DSI is off, the DSI pins are floating even if they are pinmuxed to, say, safe mode and there's a pull down/up. This patch gives the panel drivers an option to leave the VDDS_DSI power enabled while the DSS itself is turned off. This can be used to keep the DSI lanes in a valid state while DSS is off, if the DSI pins are muxed for pull down (not done in this patch). There will be a slight power consumption increase (~100 uA?) when the VDDS_DSI is left on, but because this option is used when the panel is left on, the regulator consumption is negligible compared to panel power consumption. When the panel is fully turned off the VDDS_DSI is also turned off. As an added bonus this will give us faster start up time when starting up the DSS and the regulator is already enabled. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2011-05-11OMAP: DSS2: HDMI: Use dss_device clock configuration for HDMI PLL parametersArchit Taneja
Move some of the configurable HDMI PLL parameters to dssdev.clock struct. Cleanup the function hdmi_compute_pll() by using the parameters defined in the board file and do some cosmetic modifications. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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