Age | Commit message (Collapse) | Author |
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Added TDM mode support in I2S driver.
Added support functions in AHUB to pass audio/client bits.
Added support functions in AHUB to pass audio/client channels.
Fixed the stopping of I2S/TDM by clearing the fifo.
Bug 948478
Change-Id: I246942b3a07ffcfbcfafbc820208190bd3acc5d4
Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/98456
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Bug 912637
Change-Id: I05e2d3dcb903bf9d011f9b108a8f65f25ee1d3b5
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/68956
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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add code for handling register save/restore and clocks
disable/enable during suspend/resume
Bug: 862023
Change-Id: I1b709b6bf674c9a2d93c2a21c1f44bbadff64aab
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/65478
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Rebase-Id: R2383486dac0892e317dbd25044df59284031b6c4
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Bug 872652
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Change-Id: I0b777642681f5bf606a8faffb76142026902e538
Reviewed-on: http://git-master/r/62045
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Rebase-Id: R5bac01349656e799fed56b368265da13d6a4b02a
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Remove redundant ref counting for I2s and AHUB clocks.
For Tegra30 enable AHUB clocks before I2s registers are accessed.
Disable clocks when they are not in use.
Bug 872652
Change-Id: I7ec4e45cecd0391d0b5a2765214d6c03fa5cc339
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/55005
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Gerrit_Virtual_Submit
Rebase-Id: R886c4a1a472c6b68240f2899a0b0be94c7ac9966
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The AHUB (Audio Hub) is a mux/crossbar which links all audio-related
devices except the HDA controller on Tegra30. The devices include the
DMA FIFOs, DAM (Digital Audio Mixers), I2S controllers, and SPDIF
controllers. Audio data may be routed between these devices in various
combinations as required by board design/application.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Rebase-Id: R5c2d6b0512231268c773be879cabb11a44d181b8
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