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Change HW disabling dequence and I2S clock parent in slave mode
for voice call use-case
Bug: 1005176
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/110529
(cherry picked from commit 4b138cdeb3374575bde9f49d0c644faa91ced68f)
Change-Id: Ia037ed5ef45d38972c3e1e1a78b4b7b7f39d8f72
Reviewed-on: http://git-master/r/114444
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Support I2S slave mode. Disable pll_p_out1 and
pll_a to reduce power when in slave mode.
Slave mode disabled by default.
Reviewed-on: http://git-master/r/76046
Change-Id: I873a11d54f1e037d99c86ff4cec06ee83064902a
Signed-off-by: ScottPeterson <speterson@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77765
Reviewed-by: Automatic_Commit_Validation_User
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set step value from 0 to 1 by the spec, with 0 it showed glitch.
Bug 909514
Change-Id: Iebb0896592076fac5ffe71cec0806140228851d9
Reviewed-on: http://git-master/r/70960
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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put the cache init code under CONFIG_PM macro
this fixes the build breaks where CONFIG_PM macro
is not defined
Change-Id: I0d140d52d80a24298afeefcf4e81b3c6b65d465f
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/70939
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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init cache values for dam/ahub/apbif register by reading
the power on reset values in respective driver probe functions
bug 911332
Change-Id: I693baeff3e076095d3c7f225f1768a4082f7d305
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/69679
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Bug 912637
Change-Id: I05e2d3dcb903bf9d011f9b108a8f65f25ee1d3b5
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/68956
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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add code for handling register save/restore and clocks
disable/enable during suspend/resume
Bug: 862023
Change-Id: I1b709b6bf674c9a2d93c2a21c1f44bbadff64aab
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/65478
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Rebase-Id: R2383486dac0892e317dbd25044df59284031b6c4
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Bug: 862023
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Change-Id: I55206f3be702da9d969fca2c779e65363dd911fc
Reviewed-on: http://git-master/r/57879
Tested-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Rebase-Id: R8cf6d6e004184b5a5a2c4bcf6578027c96d647f3
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