From 2998ead828412c83de86e344f1c1e767bc01d7ca Mon Sep 17 00:00:00 2001 From: Daehyoung Ko Date: Mon, 11 Apr 2011 13:04:54 -0700 Subject: rtc : tps6586x: avoid RTC time is getting slower To ensure an accurate read of the RTC registers during the required multi-byte read operation, the PMU RTC is designed with the following protection scheme - A circuit detects a write/read and locks the RTC_COUNT4 value by keeping the RTC in a suspended mode - During the suspended mode, a secondary counter is used to keep track of all counts that would have normally incremented the RTC - After the read is complete, the value of the secondary counter is added back to the RTC registers and thereby keeping the RTC accurate - The backup counter allows for a 1ms RTC suspend mode duration when the RTC prescaler is enabled. i2c needs to generate a 2 msgs when reading. - the address setup(write RTC_COUNT4 operation), hence start locking the RTC_COUNT4 - the data transfer (read RTC_COUNT4 operation),release locking it. this may allow the CPU to execute other portions of code in between the two operation. The fix is to start a PMU RTC access by reading the register prior to the RTC_COUNT4 so that access of the RTC PMU registers will be guaranteed to always occur within the 1ms time period. - the address setup(write RTC_COUNT4-1 operation), so there is no locking the RTC_COUNT4 - the data transfer (read RTC_COUNT4 operation), starting locking the RTC_COUNT4 and release locking the RTC_COUNT4 in one operation, so it will be guaranteed within 1ms Bug 811075 Change-Id: Ie07472a329f6a0eed11e6a039cd93307bb5276a0 Reviewed-on: http://git-master/r/27537 Reviewed-by: Varun Colbert Tested-by: Varun Colbert --- drivers/rtc/rtc-tps6586x.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/rtc/rtc-tps6586x.c b/drivers/rtc/rtc-tps6586x.c index 641f1461646d..f3e5508ad13b 100644 --- a/drivers/rtc/rtc-tps6586x.c +++ b/drivers/rtc/rtc-tps6586x.c @@ -39,6 +39,7 @@ #define CL_SEL_POS 1 #define RTC_ALARM1_HI 0xc1 #define RTC_COUNT4 0xc6 +#define RTC_COUNT4_DUMMYREAD 0xc5 /* start a PMU RTC access by reading the register prior to the RTC_COUNT4 */ struct tps6586x_rtc { unsigned long epoch_start; @@ -58,17 +59,17 @@ static int tps6586x_rtc_read_time(struct device *dev, struct rtc_time *tm) struct device *tps_dev = to_tps6586x_dev(dev); unsigned long long ticks = 0; unsigned long seconds; - u8 buff[5]; + u8 buff[6]; int err; int i; - err = tps6586x_reads(tps_dev, RTC_COUNT4, sizeof(buff), buff); + err = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD, sizeof(buff), buff); if (err < 0) { dev_err(dev, "failed to read counter\n"); return err; } - for (i = 0; i < sizeof(buff); i++) { + for (i = 1; i < sizeof(buff); i++) { ticks <<= 8; ticks |= buff[i]; } -- cgit v1.2.3