From 9323c09c666c0745af1a98fc60a737f72ad3b21e Mon Sep 17 00:00:00 2001 From: Alex Frid Date: Sun, 26 Feb 2012 00:23:37 -0800 Subject: ARM: tegra: clock: Update parameterized cluster switch Adjusted CPU rate during parametrized (enforced from sysfs) cluster switch, so that target rate meets min/max constraints on both sides of the switch. Updated local timer rate accordingly. Bug 945975 Signed-off-by: Alex Frid (cherry picked from commit c27f5a2e7380cb667f1f6a4ba61daf67c63ef2d4) Change-Id: I130ec1a32ecaf8adfd7eff1ec2042f569b54ac54 Reviewed-on: http://git-master/r/90805 Reviewed-by: Simone Willett Tested-by: Simone Willett --- arch/arm/mach-tegra/tegra3_clocks.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-tegra/tegra3_clocks.c b/arch/arm/mach-tegra/tegra3_clocks.c index 42ee4e47cbbd..43d8ed9f2db8 100644 --- a/arch/arm/mach-tegra/tegra3_clocks.c +++ b/arch/arm/mach-tegra/tegra3_clocks.c @@ -1012,15 +1012,21 @@ static int tegra3_cpu_cmplx_clk_set_parent(struct clk *c, struct clk *p) spin_unlock(¶meters_lock); if (flags) { - /* over-clocking after the switch - allow, but lower rate */ - if (rate > p->max_rate) { - rate = p->max_rate; + /* over/under-clocking after switch - allow, but update rate */ + if ((rate > p->max_rate) || (rate < p->min_rate)) { + unsigned long fl; + + rate = rate > p->max_rate ? p->max_rate : p->min_rate; ret = clk_set_rate(c->parent, rate); if (ret) { pr_err("%s: Failed to set rate %lu for %s\n", __func__, rate, p->name); return ret; } + clk_lock_save(c->parent, &fl); + clk_set_rate(&tegra3_clk_twd, + clk_get_rate_locked(c->parent)); + clk_unlock_restore(c->parent, &fl); } } else #endif -- cgit v1.2.3