From 93d384a3ce6621d8bfd634adf027fb9a28f70aa9 Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Fri, 24 Jan 2020 12:36:54 +0100 Subject: ARM64: dts: add sn65dsi84 dsi-to-lvds bridge to devicetree Related-to: ELB-2289 Signed-off-by: Philippe Schenker --- .../boot/dts/freescale/fsl-imx8mm-verdin.dtsi | 43 +++++++++++++++++++++- 1 file changed, 42 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8mm-verdin.dtsi index 3d8302461fe7..b2340f02de05 100755 --- a/arch/arm64/boot/dts/freescale/fsl-imx8mm-verdin.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8mm-verdin.dtsi @@ -464,6 +464,47 @@ reg = <0x21>; }; + bridge@2c { + compatible = "ti,sn65dsi83"; + enable-gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio1>; + reg = <0x2c>; + ti,dsi-lanes = <4>; + ti,lvds-bpp = <24>; + ti,lvds-format = <2>; + ti,height-mm = <136>; + ti,width-mm = <217>; + status = "disabled"; + + display-timings { + native-mode = <&lvds_timing0>; + lvds_timing0: lt170410_2whc { + /* + * Take the minimum pixelclock as 71.1 MHz is + * not working on iMX8MM + */ + clock-frequency = <68900000>; + hactive = <1280 1280 1280>; + hfront-porch = <23 60 71>; + hback-porch = <23 60 71>; + hsync-len = <15 40 47>; + vactive = <800 800 800>; + vfront-porch = <5 7 10>; + vback-porch = <5 7 10>; + vsync-len = <6 9 12>; + de-active = <1>; + pixelclk-active = <0>; + }; + }; + + port{ + dsi85_in: endpoint { + remote-endpoint = <&mipi_dsi_bridge1_out>; + }; + }; + }; + /* Current measurement into module VCC */ hwmon@40 { compatible = "ti,ina219"; @@ -501,7 +542,7 @@ status = "disabled"; }; - /* EEPROM on MIPI-DSI to HDMI adapter */ + /* EEPROM on display adapter boards */ eeprom_50: eeprom@50 { compatible = "st,24c02"; pagesize = <16>; -- cgit v1.2.3