From a7e991c39be9ae27bce0ec8c96235c1863ebb9b4 Mon Sep 17 00:00:00 2001 From: Alex Frid Date: Thu, 21 Oct 2010 20:16:39 -0700 Subject: [ARM/tegra] RM: Increased PLLC VCO for HDMI config. Increased PLLC VCO for HDMI configuration to reduce jitter. Bug 734868 Change-Id: Ie898b3806e4e3c69310e9ea7e45c45fa7862de80 Reviewed-on: http://git-master/r/9660 Reviewed-by: Chih-Lung Huang Tested-by: Aleksandr Frid Reviewed-by: Yu-Huan Hsu --- arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks.h b/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks.h index b3db73d03e5a..dda343c24c81 100644 --- a/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks.h +++ b/arch/arm/mach-tegra/nvrm/core/common/nvrm_clocks.h @@ -203,10 +203,10 @@ typedef struct NvRmPllFixedConfigRec #define NVRM_PLLHD_AT_19MHZ { 594000, 16, 495, 0, 0} #define NVRM_PLLHD_AT_26MHZ { 594000, 13, 297, 0, 0} -#define NVRM_PLLHC_AT_12MHZ { 594000, 04, 396, 1, 0} +#define NVRM_PLLHC_AT_12MHZ { 445500, 04, 594, 2, 0} #define NVRM_PLLHC_AT_13MHZ { 594000, 13, 594, 0, 0} #define NVRM_PLLHC_AT_19MHZ { 594000, 16, 495, 0, 0} -#define NVRM_PLLHC_AT_26MHZ { 594000, 13, 594, 1, 0} +#define NVRM_PLLHC_AT_26MHZ { 445500, 13, 891, 2, 0} // Display divider is part of the display module and it is not described // in central module clock information table. Hence, need this define. -- cgit v1.2.3