From b09801095358bb255a1de2bc333e3822b416a585 Mon Sep 17 00:00:00 2001 From: Mohit Kataria Date: Mon, 7 May 2012 13:32:00 +0530 Subject: Arm: tegra: p1852: Avp clock frequency to 334 changed the max avp clock from 378MHz to 334MHz as per new POR changes Bug 883565 Change-Id: I4e9dda0288f3f85c8b1705971bb8f389127cff28 Reviewed-on: http://git-master/r/97279 Signed-off-by: Mohit Kataria Reviewed-on: http://git-master/r/100870 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Aleksandr Frid Reviewed-by: Varun Wadekar --- arch/arm/mach-tegra/tegra3_dvfs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-tegra/tegra3_dvfs.c b/arch/arm/mach-tegra/tegra3_dvfs.c index dcda3f3cae3b..af2a679da96d 100644 --- a/arch/arm/mach-tegra/tegra3_dvfs.c +++ b/arch/arm/mach-tegra/tegra3_dvfs.c @@ -228,7 +228,7 @@ static struct dvfs core_dvfs_table[] = { CORE_DVFS("sbus", 0, 1, KHZ, 1, 136000, 164000, 191000, 216000, 216000, 216000, 216000, 216000), CORE_DVFS("sbus", 1, 1, KHZ, 51000, 205000, 205000, 227000, 227000, 267000, 267000, 267000, 267000), CORE_DVFS("sbus", 2, 1, KHZ, 51000, 205000, 205000, 227000, 227000, 267000, 334000, 334000, 334000), - CORE_DVFS("sbus", 3, 1, KHZ, 1, 1, 1, 1, 1, 1, 378000, 378000, 378000), + CORE_DVFS("sbus", 3, 1, KHZ, 1, 1, 1, 1, 1, 1, 334000, 334000, 334000), CORE_DVFS("vi", 0, 1, KHZ, 1, 216000, 285000, 300000, 300000, 300000, 300000, 300000, 300000), CORE_DVFS("vi", 1, 1, KHZ, 1, 216000, 267000, 300000, 371000, 409000, 409000, 409000, 409000), -- cgit v1.2.3