From ba29b069a970c97be7255b3f42176be620f6ea70 Mon Sep 17 00:00:00 2001 From: Dominik Sliwa Date: Wed, 12 Sep 2018 17:28:23 +0200 Subject: net: igb: implement SIOCSMIIREG and allow SIOCGMIIREG to set pages Before SIOCGMIIREG was only able to access page 0 registers. Signed-off-by: Dominik Sliwa Acked-by: Marcel Ziswiler --- drivers/net/ethernet/intel/igb/e1000_phy.c | 51 ++++++++++++++++++++++++++++++ drivers/net/ethernet/intel/igb/e1000_phy.h | 2 ++ drivers/net/ethernet/intel/igb/igb_main.c | 9 ++++-- 3 files changed, 60 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c index 51726916215e..213cf5662c3d 100644 --- a/drivers/net/ethernet/intel/igb/e1000_phy.c +++ b/drivers/net/ethernet/intel/igb/e1000_phy.c @@ -3240,6 +3240,57 @@ release: return ret_val; } +/** + * e1000_write_phy_reg_no_page - Write PHY register without Page switching + * @hw: pointer to the HW structure + * @offset: register offset to write to + * @data: data to write at register offset + * + * Acquires semaphore, if necessary, then writes the data to PHY register + * at the offset. Release any acquired semaphores before exiting. + **/ +s32 e1000_write_phy_reg_no_page(struct e1000_hw *hw, u32 offset, u16 data) +{ + s32 ret_val; + + offset = offset & MAX_PHY_REG_ADDRESS; + + ret_val = hw->phy.ops.acquire(hw); + if (ret_val) + return ret_val; + + ret_val = e1000_write_phy_reg_mdic(hw, offset, data); + + hw->phy.ops.release(hw); + return ret_val; +} + +/** + * e1000_read_phy_reg_no_page - Read PHY register without Page switching + * @hw: pointer to the HW structure + * @offset: lower half is register offset to read to + * upper half is page to use. + * @data: data to read at register offset + * + * Acquires semaphore, if necessary, then reads the data in the PHY register + * at the offset. Release any acquired semaphores before exiting. + **/ +s32 e1000_read_phy_reg_no_page(struct e1000_hw *hw, u32 offset, u16 *data) +{ + s32 ret_val; + + offset = offset & MAX_PHY_REG_ADDRESS; + + ret_val = hw->phy.ops.acquire(hw); + if (ret_val) + return ret_val; + + ret_val = e1000_read_phy_reg_mdic(hw, offset, data); + + hw->phy.ops.release(hw); + return ret_val; +} + /** * e1000_read_phy_reg_mphy - Read mPHY control register * @hw: pointer to the HW structure diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.h b/drivers/net/ethernet/intel/igb/e1000_phy.h index a109c914ce8d..b4a050c8c2ee 100644 --- a/drivers/net/ethernet/intel/igb/e1000_phy.h +++ b/drivers/net/ethernet/intel/igb/e1000_phy.h @@ -93,6 +93,8 @@ s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw); s32 e1000_get_cable_length_82577(struct e1000_hw *hw); s32 e1000_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data); s32 e1000_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data); +s32 e1000_write_phy_reg_no_page(struct e1000_hw *hw, u32 offset, u16 data); +s32 e1000_read_phy_reg_no_page(struct e1000_hw *hw, u32 offset, u16 *data); s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 *data); s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data, bool line_override); diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c index 4f9ffcab4484..d22f555201a6 100644 --- a/drivers/net/ethernet/intel/igb/igb_main.c +++ b/drivers/net/ethernet/intel/igb/igb_main.c @@ -8662,6 +8662,7 @@ void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count) } #ifdef SIOCGMIIPHY + /** * igb_mii_ioctl - * @netdev: @@ -8683,11 +8684,15 @@ static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) case SIOCGMIIREG: if (!capable(CAP_NET_ADMIN)) return -EPERM; - if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, - &data->val_out)) + if (e1000_read_phy_reg_no_page(&adapter->hw, data->reg_num, + &data->val_out)) return -EIO; break; case SIOCSMIIREG: + if (e1000_write_phy_reg_no_page(&adapter->hw, data->reg_num, + data->val_in)) + return -EIO; + break; default: return -EOPNOTSUPP; } -- cgit v1.2.3