From edc2e073d52fb80838a383626ab4eb7cf3a5d4dc Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Wed, 3 May 2017 09:24:54 +0200 Subject: apalis-tk1: improve spi2 clocking aka for k20 Change SPI2 clock parent to clk_m being 12 MHz which is anyway the maximum frequency the K20 micro controller's SPI peripheral can be run. This further allows for the EzPort to be run at exactly 2 MHz which is the maximum allowed as well. Signed-off-by: Marcel Ziswiler Acked-by: Dominik Sliwa --- arch/arm/boot/dts/tegra124-apalis-eval.dts | 6 ++++-- arch/arm/mach-tegra/board-apalis-tk1.c | 2 +- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/tegra124-apalis-eval.dts b/arch/arm/boot/dts/tegra124-apalis-eval.dts index a3f3f019a059..720e4d86af9c 100644 --- a/arch/arm/boot/dts/tegra124-apalis-eval.dts +++ b/arch/arm/boot/dts/tegra124-apalis-eval.dts @@ -163,8 +163,10 @@ }; }; - /* spidev on K20 bus, can be used with custom firmware for userspace - * K20 applications */ + /* + * spidev for K20 EzPort, can be used with custom firmware for + * userspace K20 applications + */ spidev2: spidev@2 { compatible = "spidev"; reg = <2>; diff --git a/arch/arm/mach-tegra/board-apalis-tk1.c b/arch/arm/mach-tegra/board-apalis-tk1.c index 82e0cfda87b3..d88ccb9889b8 100644 --- a/arch/arm/mach-tegra/board-apalis-tk1.c +++ b/arch/arm/mach-tegra/board-apalis-tk1.c @@ -126,7 +126,7 @@ static __initdata struct tegra_clk_init_table apalis_tk1_clk_init_table[] = { { "i2c4", "pll_p", 3200000, false}, { "i2c5", "pll_p", 3200000, false}, { "sbc1", "pll_p", 25000000, false}, - { "sbc2", "pll_p", 25000000, false}, + { "sbc2", "clk_m", 12000000, false}, { "sbc3", "pll_p", 25000000, false}, { "sbc4", "pll_p", 25000000, false}, { "sbc5", "pll_p", 25000000, false}, -- cgit v1.2.3