From f08da8504c8b19e11f334cd637e3cb21d9a317b0 Mon Sep 17 00:00:00 2001 From: Richard Zhu Date: Wed, 27 May 2020 13:32:18 +0800 Subject: MLK-24171-2 dt-binding: phy: update the clock modes of pcie phy Update the clock modes of iMX8MP PCIe PHY in binding DOC. Signed-off-by: Richard Zhu Reviewed-by: Fugang Duan (cherry picked from commit eade3750bf840948b29db26f0beabf10dea5f981) --- Documentation/devicetree/bindings/phy/fsl,imx-pcie-phy.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/fsl,imx-pcie-phy.txt b/Documentation/devicetree/bindings/phy/fsl,imx-pcie-phy.txt index 627b508ecadc..77841c4959b0 100644 --- a/Documentation/devicetree/bindings/phy/fsl,imx-pcie-phy.txt +++ b/Documentation/devicetree/bindings/phy/fsl,imx-pcie-phy.txt @@ -6,6 +6,8 @@ Required properties: - reg: The base address and length of the registers - clocks: Phandles to the clocks for each clock listed in clock-names - clock-names: Must contain "phy" +- ext_osc: Specify the reference clock source. 1: external oscilltor is + used as PCIe reference clock. 0: internal PLL is used. - power-domains: Phandle to the power domain that the device is part of Example: -- cgit v1.2.3