From fbc6268fac01db1618eaa34c981d63a720d27c65 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Fri, 24 Jan 2014 17:11:58 +0100 Subject: video: tegra: add more modes and tweaked pixelclocks for Tegra 2 Add some more modes e.g. for full HD panel. Also add tweaked pixel clock for Tegra 2 because the clock is always a child of the peripherial clock and only some divisors are available. --- drivers/video/tegra/dc/mode.c | 150 ++++++++++++++++++++++++++++++++++++------ 1 file changed, 130 insertions(+), 20 deletions(-) diff --git a/drivers/video/tegra/dc/mode.c b/drivers/video/tegra/dc/mode.c index be0d2bc5f035..f61d0bf7d6da 100644 --- a/drivers/video/tegra/dc/mode.c +++ b/drivers/video/tegra/dc/mode.c @@ -31,49 +31,159 @@ const struct fb_videomode tegra_modes[] = { * CLAA100NC05 10.1 inch 1024x600 single channel LVDS panel */ { - .name = "1024x600", .refresh = 60, .xres = 1024, .yres = 600, - .pixclock = 20833, .left_margin = 104, .right_margin = 43, - .upper_margin = 24, .lower_margin = 20, - .hsync_len = 5, .vsync_len = 5, + .name = "1024x600", + .refresh = 60, + .xres = 1024, + .yres = 600, + .pixclock = KHZ2PICOS(48000), + .left_margin = 104, + .right_margin = 43, + .upper_margin = 24, + .lower_margin = 20, + .hsync_len = 5, + .vsync_len = 5, .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, .flag = FB_FLAG_RATIO_16_9, .vmode = FB_VMODE_NONINTERLACED }, /* EDT 5.7" ET070080DH or TouchRevolution Fusion 7" */ { - .name = "800x480", .refresh = 60, .xres = 800, .yres = 480, - .pixclock = 30807, .left_margin = 128, .right_margin = 64, - .upper_margin = 22, .lower_margin = 20, - .hsync_len = 64, .vsync_len = 3, + .name = "800x480", + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = 30807, + .left_margin = 128, + .right_margin = 64, + .upper_margin = 22, + .lower_margin = 20, + .hsync_len = 64, + .vsync_len = 3, .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, .flag = FB_FLAG_RATIO_16_9, .vmode = FB_VMODE_NONINTERLACED }, /* Portrait modes */ { - .name = "480x640", .refresh = 60, .xres = 480, .yres = 640, - .pixclock = 55555, .left_margin = 20, .right_margin = 8, - .upper_margin = 7, .lower_margin = 8, - .hsync_len = 4, .vsync_len = 1, + .name = "480x640", + .refresh = 60, + .xres = 480, + .yres = 640, + .pixclock = 55555, + .left_margin = 20, + .right_margin = 8, + .upper_margin = 7, + .lower_margin = 8, + .hsync_len = 4, + .vsync_len = 1, .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, .vmode = FB_VMODE_NONINTERLACED }, { - .name = "540x960", .refresh = 60, .xres = 540, .yres = 960, - .pixclock = 100000, .left_margin = 32, .right_margin = 32, - .upper_margin = 1, .lower_margin = 2, - .hsync_len = 16, .vsync_len = 1, + .name = "540x960", + .refresh = 60, + .xres = 540, + .yres = 960, + .pixclock = 100000, + .left_margin = 32, + .right_margin = 32, + .upper_margin = 1, + .lower_margin = 2, + .hsync_len = 16, + .vsync_len = 1, .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, .vmode = FB_VMODE_NONINTERLACED }, { - .name = "720x1280", .refresh = 60, .xres = 720, .yres = 1280, - .pixclock = 16282, .left_margin = 100, .right_margin = 4, - .upper_margin = 14, .lower_margin = 4, - .hsync_len = 4, .vsync_len = 4, + .name = "720x1280", + .refresh = 60, + .xres = 720, + .yres = 1280, + .pixclock = 16282, + .left_margin = 100, + .right_margin = 4, + .upper_margin = 14, + .lower_margin = 4, + .hsync_len = 4, + .vsync_len = 4, .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, .vmode = FB_VMODE_NONINTERLACED }, + { + /* 1366x768 */ + .refresh = 60, + .xres = 1366, + .yres = 768, + .pixclock = KHZ2PICOS(72072), + .hsync_len = 58, /* h_sync_width */ + .vsync_len = 4, /* v_sync_width */ + .left_margin = 58, /* h_back_porch */ + .upper_margin = 4, /* v_back_porch */ + .right_margin = 58, /* h_front_porch */ + .lower_margin = 4, /* v_front_porch */ + .vmode = FB_VMODE_NONINTERLACED, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + }, + { + /* 1680x1050p 59.94/60hz */ + .refresh = 60, + .xres = 1680, + .yres = 1050, +#ifdef CONFIG_MACH_COLIBRI_T20 + .pixclock = KHZ2PICOS(144000), +#else + .pixclock = KHZ2PICOS(147140), +#endif + .hsync_len = 184, /* h_sync_width */ + .vsync_len = 3, /* v_sync_width */ + .left_margin = 288, /* h_back_porch */ + .upper_margin = 33, /* v_back_porch */ + .right_margin = 104, /* h_front_porch */ + .lower_margin = 1, /* v_front_porch */ + .vmode = FB_VMODE_NONINTERLACED, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + }, + { + /* 1920x1080p 59.94/60hz CVT */ + .refresh = 60, + .xres = 1920, + .yres = 1080, +#ifdef CONFIG_MACH_COLIBRI_T20 +/* We need to choose too small pixelclocks because parent clock system + * doesn't allow exact pixelclocks + */ + .pixclock = KHZ2PICOS(144000), +#else + .pixclock = KHZ2PICOS(148500), +#endif + .hsync_len = 44, /* h_sync_width */ + .vsync_len = 5, /* v_sync_width */ + .left_margin = 148, /* h_back_porch */ + .upper_margin = 36, /* v_back_porch */ + .right_margin = 88, /* h_front_porch */ + .lower_margin = 4, /* v_front_porch */ + .vmode = FB_VMODE_NONINTERLACED, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + }, + { + /* 1920x1200p 60hz */ + .refresh = 60, + .xres = 1920, + .yres = 1200, +#ifdef CONFIG_MACH_COLIBRI_T20 + .pixclock = KHZ2PICOS(144000), +#else + .pixclock = KHZ2PICOS(154000), +#endif + .hsync_len = 32, /* h_sync_width */ + .vsync_len = 6, /* v_sync_width */ + .left_margin = 80, /* h_back_porch */ + .upper_margin = 26, /* v_back_porch */ + .right_margin = 48, /* h_front_porch */ + .lower_margin = 3, /* v_front_porch */ + .vmode = FB_VMODE_NONINTERLACED, + .sync = 0, + }, }; /* try to find best matching mode using our modes, VESA and CEA modes from -- cgit v1.2.3