From 00cb4739053fa0ce4594a7798a4095007a1c7c79 Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Tue, 8 May 2007 17:21:59 +0200 Subject: hwmon/smsc47m192: Document the LPC47M292 as supported The new SMSC LPC47M292 Super-I/O chip includes a hardware monitoring block which is compatible with those of the LPC47M192. Signed-off-by: Jean Delvare Cc: Hartmut Rick --- Documentation/hwmon/smsc47m192 | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/smsc47m192 b/Documentation/hwmon/smsc47m192 index 45d6453cd435..6d54ecb7b3f8 100644 --- a/Documentation/hwmon/smsc47m192 +++ b/Documentation/hwmon/smsc47m192 @@ -2,12 +2,13 @@ Kernel driver smsc47m192 ======================== Supported chips: - * SMSC LPC47M192 and LPC47M997 + * SMSC LPC47M192, LPC47M15x, LPC47M292 and LPC47M997 Prefix: 'smsc47m192' Addresses scanned: I2C 0x2c - 0x2d Datasheet: The datasheet for LPC47M192 is publicly available from http://www.smsc.com/ - The LPC47M997 is compatible for hardware monitoring. + The LPC47M15x, LPC47M292 and LPC47M997 are compatible for + hardware monitoring. Author: Hartmut Rick Special thanks to Jean Delvare for careful checking @@ -18,7 +19,7 @@ Description ----------- This driver implements support for the hardware sensor capabilities -of the SMSC LPC47M192 and LPC47M997 Super-I/O chips. +of the SMSC LPC47M192 and compatible Super-I/O chips. These chips support 3 temperature channels and 8 voltage inputs as well as CPU voltage VID input. -- cgit v1.2.3 From 8eccbb6fb97a5b54a9db166399f0d24f33114522 Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Tue, 8 May 2007 17:21:59 +0200 Subject: hwmon/smsc47m1: Add support for the LPC47M292 The new SMSC LPC47M292 Super-I/O chip is a bit different from the previous ones, it supports a 3rd fan, but unfortunately the pin configuration registers are different. Signed-off-by: Jean Delvare --- Documentation/hwmon/smsc47m1 | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/smsc47m1 b/Documentation/hwmon/smsc47m1 index 04a11124f667..42c8431b3c9d 100644 --- a/Documentation/hwmon/smsc47m1 +++ b/Documentation/hwmon/smsc47m1 @@ -14,6 +14,10 @@ Supported chips: http://www.smsc.com/main/datasheets/47m14x.pdf http://www.smsc.com/main/tools/discontinued/47m15x.pdf http://www.smsc.com/main/datasheets/47m192.pdf + * SMSC LPC47M292 + Addresses scanned: none, address read from Super I/O config space + Prefix: 'smsc47m2' + Datasheet: Not public * SMSC LPC47M997 Addresses scanned: none, address read from Super I/O config space Prefix: 'smsc47m1' @@ -32,9 +36,10 @@ Description The Standard Microsystems Corporation (SMSC) 47M1xx Super I/O chips contain monitoring and PWM control circuitry for two fans. -The 47M15x and 47M192 chips contain a full 'hardware monitoring block' -in addition to the fan monitoring and control. The hardware monitoring -block is not supported by the driver. +The LPC47M15x, LPC47M192 and LPC47M292 chips contain a full 'hardware +monitoring block' in addition to the fan monitoring and control. The +hardware monitoring block is not supported by this driver, use the +smsc47m192 driver for that. No documentation is available for the 47M997, but it has the same device ID as the 47M15x and 47M192 chips and seems to be compatible. -- cgit v1.2.3 From 2dbc514a2ed2b6f71eb6d18671d2c663160788c9 Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Tue, 8 May 2007 17:22:00 +0200 Subject: hwmon: Document the new fan1_target interface file Signed-off-by: Jean Delvare --- Documentation/hwmon/sysfs-interface | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/sysfs-interface b/Documentation/hwmon/sysfs-interface index d73d2e8c7534..a9a18ad0d17a 100644 --- a/Documentation/hwmon/sysfs-interface +++ b/Documentation/hwmon/sysfs-interface @@ -152,6 +152,13 @@ fan[1-*]_div Fan divisor. Note that this is actually an internal clock divisor, which affects the measurable speed range, not the read value. +fan[1-*]_target + Desired fan speed + Unit: revolution/min (RPM) + RW + Only makes sense if the chip supports closed-loop fan speed + control based on the measured fan speed. + Also see the Alarms section for status flags associated with fans. -- cgit v1.2.3 From d20620de0c3de622a9d6a841725bafaed6d1aec2 Mon Sep 17 00:00:00 2001 From: Hans-Juergen Koch Date: Tue, 8 May 2007 17:22:00 +0200 Subject: hwmon: New max6650 driver This driver supports the Maxim MAX6650 and MAX6651 fan speed monitoring and control chips. Signed-off-by: Hans J. Koch Signed-off-by: Jean Delvare --- Documentation/hwmon/max6650 | 53 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/hwmon/max6650 (limited to 'Documentation') diff --git a/Documentation/hwmon/max6650 b/Documentation/hwmon/max6650 new file mode 100644 index 000000000000..8be7beb9e3e8 --- /dev/null +++ b/Documentation/hwmon/max6650 @@ -0,0 +1,53 @@ +Kernel driver max6650 +===================== + +Supported chips: + * Maxim 6650 / 6651 + Prefix: 'max6650' + Addresses scanned: I2C 0x1b, 0x1f, 0x48, 0x4b + Datasheet: http://pdfserv.maxim-ic.com/en/ds/MAX6650-MAX6651.pdf + +Authors: + Hans J. Koch + John Morris + Claus Gindhart + +Description +----------- + +This driver implements support for the Maxim 6650/6651 + +The 2 devices are very similar, but the Maxim 6550 has a reduced feature +set, e.g. only one fan-input, instead of 4 for the 6651. + +The driver is not able to distinguish between the 2 devices. + +The driver provides the following sensor accesses in sysfs: + +fan1_input ro fan tachometer speed in RPM +fan2_input ro " +fan3_input ro " +fan4_input ro " +fan1_target rw desired fan speed in RPM (closed loop mode only) +pwm1_enable rw regulator mode, 0=full on, 1=open loop, 2=closed loop +pwm1 rw relative speed (0-255), 255=max. speed. + Used in open loop mode only. +fan1_div rw sets the speed range the inputs can handle. Legal + values are 1, 2, 4, and 8. Use lower values for + faster fans. + +Module parameters +----------------- + +If your board has a BIOS that initializes the MAX6650/6651 correctly, you can +simply load your module without parameters. It won't touch the configuration +registers then. If your board BIOS doesn't initialize the chip, or you want +different settings, you can set the following parameters: + +voltage_12V: 5=5V fan, 12=12V fan, 0=don't change +prescaler: Possible values are 1,2,4,8,16, or 0 for don't change +clock: The clock frequency in Hz of the chip the driver should assume [254000] + +Please have a look at the MAX6650/6651 data sheet and make sure that you fully +understand the meaning of these parameters before you attempt to change them. + -- cgit v1.2.3 From d58ee056cc40117afe4d3bb03006ac537d779634 Mon Sep 17 00:00:00 2001 From: Rudolf Marek Date: Tue, 8 May 2007 17:22:02 +0200 Subject: hwmon/coretemp: Add documentation Documentation for the coretemp driver. Signed-off-by: Rudolf Marek Signed-off-by: Jean Delvare --- Documentation/hwmon/coretemp | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/hwmon/coretemp (limited to 'Documentation') diff --git a/Documentation/hwmon/coretemp b/Documentation/hwmon/coretemp new file mode 100644 index 000000000000..870cda9416e9 --- /dev/null +++ b/Documentation/hwmon/coretemp @@ -0,0 +1,36 @@ +Kernel driver coretemp +====================== + +Supported chips: + * All Intel Core family + Prefix: 'coretemp' + CPUID: family 0x6, models 0xe, 0xf + Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual + Volume 3A: System Programming Guide + +Author: Rudolf Marek + +Description +----------- + +This driver permits reading temperature sensor embedded inside Intel Core CPU. +Temperature is measured in degrees Celsius and measurement resolution is +1 degree C. Valid temperatures are from 0 to TjMax degrees C, because +the actual value of temperature register is in fact a delta from TjMax. + +Temperature known as TjMax is the maximum junction temperature of processor. +Intel defines this temperature as 85C or 100C. At this temperature, protection +mechanism will perform actions to forcibly cool down the processor. Alarm +may be raised, if the temperature grows enough (more than TjMax) to trigger +the Out-Of-Spec bit. Following table summarizes the exported sysfs files: + +temp1_input - Core temperature (in millidegrees Celsius). +temp1_crit - Maximum junction temperature (in millidegrees Celsius). +temp1_crit_alarm - Set when Out-of-spec bit is set, never clears. + Correct CPU operation is no longer guaranteed. +temp1_label - Contains string "Core X", where X is processor + number. + +The TjMax temperature is set to 85 degrees C if undocumented model specific +register (UMSR) 0xee has bit 30 set. If not the TjMax is 100 degrees C as +(sometimes) documented in processor datasheet. -- cgit v1.2.3