From 00954c1bdb7dc284b461008dddaf0231c9412467 Mon Sep 17 00:00:00 2001 From: Rongjun Ying Date: Thu, 30 Jan 2014 13:54:53 +0800 Subject: ARM: dts: sirf: add pin group for USP0 with only RX or TX frame sync for atlas6 add pin groups for USP0 only holding one of TX and RX frame sync. this patch matches with the change in drivers/pinctrl/sirf. commit 73f68c01f46 did this for prima2, but missed prima2. this patch fixes the problem. Signed-off-by: Rongjun Ying Signed-off-by: Barry Song Acked-by: Linus Walleij --- arch/arm/boot/dts/atlas6.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm/boot/dts/atlas6.dtsi') diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi index 9d72674049d6..c84c45c2bd41 100644 --- a/arch/arm/boot/dts/atlas6.dtsi +++ b/arch/arm/boot/dts/atlas6.dtsi @@ -554,6 +554,18 @@ sirf,function = "usp0_uart_nostreamctrl"; }; }; + usp0_only_utfs_pins_a: usp0@2 { + usp0 { + sirf,pins = "usp0_only_utfs_grp"; + sirf,function = "usp0_only_utfs"; + }; + }; + usp0_only_urfs_pins_a: usp0@3 { + usp0 { + sirf,pins = "usp0_only_urfs_grp"; + sirf,function = "usp0_only_urfs"; + }; + }; usp1_pins_a: usp1@0 { usp1 { sirf,pins = "usp1grp"; -- cgit v1.2.3