From 8e371a91d98e8d8d032c6032eb0ac6e2bbcb231f Mon Sep 17 00:00:00 2001 From: Arun Kumar K Date: Fri, 9 May 2014 06:06:24 +0900 Subject: ARM: dts: Add node labels to exynos5420 Adding labels to nodes which do not have it yet in exynos5420. This is done so as to use reference based node updation in board files. Signed-off-by: Arun Kumar K Reviewed-by: Tomasz Figa Reviewed-by: Doug Anderson Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420.dtsi | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) (limited to 'arch/arm/boot/dts/exynos5420.dtsi') diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index c3a9a66c5767..0d1dea81af0c 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -125,7 +125,7 @@ clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; }; - codec@11000000 { + mfc: codec@11000000 { compatible = "samsung,mfc-v7"; reg = <0x11000000 0x10000>; interrupts = <0 96 0>; @@ -169,7 +169,7 @@ status = "disabled"; }; - mct@101C0000 { + mct: mct@101C0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101C0000 0x800>; interrupt-controller; @@ -270,7 +270,7 @@ interrupts = <0 47 0>; }; - rtc@101E0000 { + rtc: rtc@101E0000 { clocks = <&clock CLK_RTC>; clock-names = "rtc"; status = "disabled"; @@ -430,22 +430,22 @@ status = "disabled"; }; - serial@12C00000 { + uart_0: serial@12C00000 { clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; clock-names = "uart", "clk_uart_baud0"; }; - serial@12C10000 { + uart_1: serial@12C10000 { clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; clock-names = "uart", "clk_uart_baud0"; }; - serial@12C20000 { + uart_2: serial@12C20000 { clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; clock-names = "uart", "clk_uart_baud0"; }; - serial@12C30000 { + uart_3: serial@12C30000 { clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; clock-names = "uart", "clk_uart_baud0"; }; @@ -465,14 +465,14 @@ #phy-cells = <0>; }; - dp-controller@145B0000 { + dp: dp-controller@145B0000 { clocks = <&clock CLK_DP1>; clock-names = "dp"; phys = <&dp_phy>; phy-names = "dp"; }; - fimd@14400000 { + fimd: fimd@14400000 { samsung,power-domain = <&disp_pd>; clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; clock-names = "sclk_fimd", "fimd"; @@ -632,7 +632,7 @@ status = "disabled"; }; - hdmi@14530000 { + hdmi: hdmi@14530000 { compatible = "samsung,exynos4212-hdmi"; reg = <0x14530000 0x70000>; interrupts = <0 95 0>; @@ -644,7 +644,7 @@ status = "disabled"; }; - mixer@14450000 { + mixer: mixer@14450000 { compatible = "samsung,exynos5420-mixer"; reg = <0x14450000 0x10000>; interrupts = <0 94 0>; @@ -715,7 +715,7 @@ clock-names = "tmu_apbif", "tmu_triminfo_apbif"; }; - watchdog@101D0000 { + watchdog: watchdog@101D0000 { compatible = "samsung,exynos5420-wdt"; reg = <0x101D0000 0x100>; interrupts = <0 42 0>; @@ -724,7 +724,7 @@ samsung,syscon-phandle = <&pmu_system_controller>; }; - sss@10830000 { + sss: sss@10830000 { compatible = "samsung,exynos4210-secss"; reg = <0x10830000 0x10000>; interrupts = <0 112 0>; -- cgit v1.2.3 From b3205dea8fbf6db9b1e46a0dad19a0712fdff44f Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Tue, 13 May 2014 07:13:44 +0900 Subject: ARM: EXYNOS: Map SYSRAM through generic DT bindings Instead of hardcoding the SYSRAM details for each SoC, pass this information through device tree (DT) and make the code SoC agnostic. Generic DT SRAM bindings are used for achieving this. Signed-off-by: Sachin Kamat Acked-by: Arnd Bergmann Acked-by: Heiko Stuebner Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'arch/arm/boot/dts/exynos5420.dtsi') diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 0d1dea81af0c..3f34196d394e 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -110,6 +110,24 @@ }; }; + sysram@02020000 { + compatible = "mmio-sram"; + reg = <0x02020000 0x54000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x02020000 0x54000>; + + smp-sysram@0 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x0 0x1000>; + }; + + smp-sysram@53000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x53000 0x1000>; + }; + }; + clock: clock-controller@10010000 { compatible = "samsung,exynos5420-clock"; reg = <0x10010000 0x30000>; -- cgit v1.2.3 From 2963c5548f9e33b5079ff586ca09755c0b4f24be Mon Sep 17 00:00:00 2001 From: Rahul Sharma Date: Fri, 16 May 2014 05:23:16 +0900 Subject: ARM: dts: change to correct compatible string for exynos5420 hdmi Replace compatible string for HDMI node in Exynos5420. Since latest restructring in Drm hdmi driver, it is agreed to use a seperate compatible string for Exynos5420 HDMI IP siince it uses APB mapped Phy. Signed-off-by: Rahul Sharma Acked-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/exynos5420.dtsi') diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 3f34196d394e..3a2d0dc752ce 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -651,7 +651,7 @@ }; hdmi: hdmi@14530000 { - compatible = "samsung,exynos4212-hdmi"; + compatible = "samsung,exynos5420-hdmi"; reg = <0x14530000 0x70000>; interrupts = <0 95 0>; clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, -- cgit v1.2.3 From 6ac189fc85ea627fe92d7e9aed7426d08f43b240 Mon Sep 17 00:00:00 2001 From: Rahul Sharma Date: Fri, 16 May 2014 05:23:21 +0900 Subject: ARM: dts: enable hdmi for exynos5420-peach-pit board Enable hdmi for exynos5420 based peach-pit board. Signed-off-by: Rahul Sharma Acked-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420.dtsi | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/boot/dts/exynos5420.dtsi') diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 3a2d0dc752ce..384f7a2f91ed 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -659,9 +659,14 @@ <&clock CLK_MOUT_HDMI>; clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy", "mout_hdmi"; + phy = <&hdmiphy>; status = "disabled"; }; + hdmiphy: hdmiphy@145D0000 { + reg = <0x145D0000 0x20>; + }; + mixer: mixer@14450000 { compatible = "samsung,exynos5420-mixer"; reg = <0x14450000 0x10000>; -- cgit v1.2.3 From 3cb7d1cdbec054ac08e7166578d8a53cbc429c33 Mon Sep 17 00:00:00 2001 From: Vivek Gautam Date: Fri, 16 May 2014 06:37:03 +0900 Subject: ARM: dts: Enable support for USB 3.0 PHY controller for exynos5420 Add device tree nodes for USB 3.0 PHY present alongwith USB 3.0 controller Exynos 5420 SoC. This phy driver is based on generic phy framework. Signed-off-by: Vivek Gautam Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'arch/arm/boot/dts/exynos5420.dtsi') diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 384f7a2f91ed..31d99b0a2022 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -47,6 +47,8 @@ spi0 = &spi_0; spi1 = &spi_1; spi2 = &spi_2; + usbdrdphy0 = &usbdrd_phy0; + usbdrdphy1 = &usbdrd_phy1; }; cpus { @@ -755,4 +757,22 @@ clock-names = "secss"; samsung,power-domain = <&g2d_pd>; }; + + usbdrd_phy0: phy@12100000 { + compatible = "samsung,exynos5420-usbdrd-phy"; + reg = <0x12100000 0x100>; + clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>; + clock-names = "phy", "ref"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <1>; + }; + + usbdrd_phy1: phy@12500000 { + compatible = "samsung,exynos5420-usbdrd-phy"; + reg = <0x12500000 0x100>; + clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>; + clock-names = "phy", "ref"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <1>; + }; }; -- cgit v1.2.3 From f070267b5fc17752d0dd4dc5784cd3cb57b6d92b Mon Sep 17 00:00:00 2001 From: Vivek Gautam Date: Fri, 16 May 2014 06:38:01 +0900 Subject: ARM: dts: Enable support for DWC3 controller for exynos5420 Add device tree nodes for DWC3 controller present on Exynos 5420 SoC, to enable support for USB 3.0. Signed-off-by: Vivek Gautam Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) (limited to 'arch/arm/boot/dts/exynos5420.dtsi') diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 31d99b0a2022..677a4e64620d 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -758,6 +758,23 @@ samsung,power-domain = <&g2d_pd>; }; + usbdrd3_0: usb@12000000 { + compatible = "samsung,exynos5250-dwusb3"; + clocks = <&clock CLK_USBD300>; + clock-names = "usbdrd30"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dwc3 { + compatible = "snps,dwc3"; + reg = <0x12000000 0x10000>; + interrupts = <0 72 0>; + phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + usbdrd_phy0: phy@12100000 { compatible = "samsung,exynos5420-usbdrd-phy"; reg = <0x12100000 0x100>; @@ -767,6 +784,23 @@ #phy-cells = <1>; }; + usbdrd3_1: usb@12400000 { + compatible = "samsung,exynos5250-dwusb3"; + clocks = <&clock CLK_USBD301>; + clock-names = "usbdrd30"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dwc3 { + compatible = "snps,dwc3"; + reg = <0x12400000 0x10000>; + interrupts = <0 73 0>; + phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + usbdrd_phy1: phy@12500000 { compatible = "samsung,exynos5420-usbdrd-phy"; reg = <0x12500000 0x100>; -- cgit v1.2.3 From 468a84d67548a5cadf039460a3330e626cb671aa Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Sat, 17 May 2014 07:57:10 +0900 Subject: ARM: dts: Add PD entry to MFC codec on exynos5420 PD entry was missing in MFC codec node. Signed-off-by: Sachin Kamat Reviewed-by : Arun Kumar K Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts/exynos5420.dtsi') diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 677a4e64620d..c0436b8563c3 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -151,6 +151,7 @@ interrupts = <0 96 0>; clocks = <&clock CLK_MFC>; clock-names = "mfc"; + samsung,power-domain = <&mfc_pd>; }; mmc_0: mmc@12200000 { -- cgit v1.2.3