From 3c6c9eeb143d65c86be7789daf8e81c3ba5b7a9b Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Sat, 21 Dec 2013 11:11:42 +0400 Subject: ARM: dts: imx27-phytec-phycore-rdk: Add pinctrl definitions for WEIM This patch adds pinctrl definitions for WEIM CS4 and GPIO used as CAN IRQ line. Signed-off-by: Alexander Shiyan Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts') diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts index 9997f58a4d14..9f8ad51d2ed9 100644 --- a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts +++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts @@ -80,6 +80,13 @@ MX27_PAD_UART2_RTS__UART2_RTS 0x0 >; }; + + pinctrl_weim: weimgrp { + fsl,pins = < + MX27_PAD_CS4_B__CS4_B 0x0 /* CS4 */ + MX27_PAD_SD1_D1__GPIO5_19 0x0 /* CAN IRQ */ + >; + }; }; }; @@ -114,6 +121,9 @@ }; &weim { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_weim>; + can@d4000000 { compatible = "nxp,sja1000"; reg = <4 0x00000000 0x00000100>; -- cgit v1.2.3