From 44a26877080825ab55080ad4ff9293a728bf5a98 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 13 Aug 2013 08:55:02 +0800 Subject: ARM: dts: imx6sl reuses imx6q sdma firmware There is no imx6sl specific sdma firmware. Instead, imx6sl reuses imx6q sdma firmware. Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sl.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/imx6sl.dtsi') diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index c46651e4d966..9fec772a5390 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -619,7 +619,8 @@ <&clks IMX6SL_CLK_SDMA>; clock-names = "ipg", "ahb"; #dma-cells = <3>; - fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6sl.bin"; + /* imx6sl reuses imx6q sdma firmware */ + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; }; pxp: pxp@020f0000 { -- cgit v1.2.3 From e03d10f98956c56d0ef92cb9e9f6cafcdd19bee2 Mon Sep 17 00:00:00 2001 From: Fugang Duan Date: Tue, 3 Sep 2013 12:26:22 +0800 Subject: ARM: dts: add iomuxc-gpr device node for imx6sl Add iomuxc gpr device node for imx6sl. Signed-off-by: Fugang Duan Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sl.dtsi | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/boot/dts/imx6sl.dtsi') diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 9fec772a5390..eda00e88f22f 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -528,6 +528,11 @@ interrupts = <0 89 0x04>; }; + gpr: iomuxc-gpr@020e0000 { + compatible = "fsl,imx6sl-iomuxc-gpr", "syscon"; + reg = <0x020e0000 0x38>; + }; + iomuxc: iomuxc@020e0000 { compatible = "fsl,imx6sl-iomuxc"; reg = <0x020e0000 0x4000>; -- cgit v1.2.3 From 6022232b5405d9a917459e1590f0732517f83d09 Mon Sep 17 00:00:00 2001 From: Peter Chen Date: Tue, 10 Sep 2013 10:23:16 +0800 Subject: ARM: imx: mx6sl-evk: Enable USB function Enable USB function for OTG 1 and OTG 2 at mx6sololite evk. Besides, fix the wrong interrupt number for OTG2 and host 1. Signed-off-by: Peter Chen Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sl.dtsi | 62 +++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 60 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts/imx6sl.dtsi') diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index eda00e88f22f..bcdbc6cb50e9 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -562,6 +562,64 @@ }; }; + usbotg1 { + pinctrl_usbotg1_1: usbotg1grp-1 { + fsl,pins = < + MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059 + >; + }; + + pinctrl_usbotg1_2: usbotg1grp-2 { + fsl,pins = < + MX6SL_PAD_FEC_RXD0__USB_OTG1_ID 0x17059 + >; + }; + + pinctrl_usbotg1_3: usbotg1grp-3 { + fsl,pins = < + MX6SL_PAD_LCD_DAT1__USB_OTG1_ID 0x17059 + >; + }; + + pinctrl_usbotg1_4: usbotg1grp-4 { + fsl,pins = < + MX6SL_PAD_REF_CLK_32K__USB_OTG1_ID 0x17059 + >; + }; + + pinctrl_usbotg1_5: usbotg1grp-5 { + fsl,pins = < + MX6SL_PAD_SD3_DAT0__USB_OTG1_ID 0x17059 + >; + }; + }; + + usbotg2 { + pinctrl_usbotg2_1: usbotg2grp-1 { + fsl,pins = < + MX6SL_PAD_ECSPI1_SCLK__USB_OTG2_OC 0x17059 + >; + }; + + pinctrl_usbotg2_2: usbotg2grp-2 { + fsl,pins = < + MX6SL_PAD_ECSPI2_SCLK__USB_OTG2_OC 0x17059 + >; + }; + + pinctrl_usbotg2_3: usbotg2grp-3 { + fsl,pins = < + MX6SL_PAD_KEY_ROW5__USB_OTG2_OC 0x17059 + >; + }; + + pinctrl_usbotg2_4: usbotg2grp-4 { + fsl,pins = < + MX6SL_PAD_SD3_DAT2__USB_OTG2_OC 0x17059 + >; + }; + }; + usdhc1 { pinctrl_usdhc1_1: usdhc1grp-1 { fsl,pins = < @@ -669,7 +727,7 @@ usbotg2: usb@02184200 { compatible = "fsl,imx6sl-usb", "fsl,imx27-usb"; reg = <0x02184200 0x200>; - interrupts = <0 40 0x04>; + interrupts = <0 42 0x04>; clocks = <&clks IMX6SL_CLK_USBOH3>; fsl,usbphy = <&usbphy2>; fsl,usbmisc = <&usbmisc 1>; @@ -679,7 +737,7 @@ usbh: usb@02184400 { compatible = "fsl,imx6sl-usb", "fsl,imx27-usb"; reg = <0x02184400 0x200>; - interrupts = <0 42 0x04>; + interrupts = <0 40 0x04>; clocks = <&clks IMX6SL_CLK_USBOH3>; fsl,usbmisc = <&usbmisc 2>; status = "disabled"; -- cgit v1.2.3 From 640a7f3f0fd54dd12bd20c43e32da0ff3993bf05 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 13 Sep 2013 18:13:00 -0300 Subject: ARM: dts: imx6sl: Add spi aliases Add spi aliases. While at it, keep the aliases entries sorted. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sl.dtsi | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) (limited to 'arch/arm/boot/dts/imx6sl.dtsi') diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index bcdbc6cb50e9..f295290d29fc 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -13,16 +13,20 @@ / { aliases { - serial0 = &uart1; - serial1 = &uart2; - serial2 = &uart3; - serial3 = &uart4; - serial4 = &uart5; gpio0 = &gpio1; gpio1 = &gpio2; gpio2 = &gpio3; gpio3 = &gpio4; gpio4 = &gpio5; + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; + serial3 = &uart4; + serial4 = &uart5; + spi0 = &ecspi1; + spi1 = &ecspi2; + spi2 = &ecspi3; + spi3 = &ecspi4; }; cpus { -- cgit v1.2.3 From fa87dfd6d0b067bd962ab83754cf1991ee512c0c Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Wed, 9 Oct 2013 19:20:07 +0800 Subject: ARM: dts: imx6sl: add pinctrl uhs states for usdhc This is needed for SD3.0 cards working on UHS mode. Signed-off-by: Dong Aisheng Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sl.dtsi | 77 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) (limited to 'arch/arm/boot/dts/imx6sl.dtsi') diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index f295290d29fc..e4d6d1efb457 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -639,6 +639,38 @@ MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059 >; }; + + pinctrl_usdhc1_1_100mhz: usdhc1grp-1-100mhz { + fsl,pins = < + MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9 + MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9 + MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9 + MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9 + MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9 + MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9 + MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9 + MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9 + MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9 + MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9 + >; + }; + + pinctrl_usdhc1_1_200mhz: usdhc1grp-1-200mhz { + fsl,pins = < + MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9 + MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9 + MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9 + MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9 + MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9 + MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9 + MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9 + MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9 + MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9 + MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9 + >; + }; + + }; usdhc2 { @@ -652,6 +684,29 @@ MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059 >; }; + + pinctrl_usdhc2_1_100mhz: usdhc2grp-1-100mhz { + fsl,pins = < + MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9 + MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9 + MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9 + MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 + MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 + MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9 + >; + }; + + pinctrl_usdhc2_1_200mhz: usdhc2grp-1-200mhz { + fsl,pins = < + MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9 + MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9 + MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 + MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 + MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 + MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 + >; + }; + }; usdhc3 { @@ -665,6 +720,28 @@ MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059 >; }; + + pinctrl_usdhc3_1_100mhz: usdhc3grp-1-100mhz { + fsl,pins = < + MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9 + MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9 + MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 + MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 + MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 + MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 + >; + }; + + pinctrl_usdhc3_1_200mhz: usdhc3grp-1-200mhz { + fsl,pins = < + MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9 + MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9 + MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 + MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 + MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 + MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 + >; + }; }; }; -- cgit v1.2.3 From dc1089206d1f85fa1b3bd84ea633cbcb12a63956 Mon Sep 17 00:00:00 2001 From: Huang Shijie Date: Fri, 18 Oct 2013 10:32:52 +0800 Subject: ARM: dts: imx6sl: add a pinctrl for ECSPI1 add a pinctrl for ECSPI1. This pinctrl can be used in the imx6sl-evk board. Signed-off-by: Huang Shijie Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sl.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/boot/dts/imx6sl.dtsi') diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index e4d6d1efb457..0a2d614bc206 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -541,6 +541,16 @@ compatible = "fsl,imx6sl-iomuxc"; reg = <0x020e0000 0x4000>; + ecspi1 { + pinctrl_ecspi1_1: ecspi1grp-1 { + fsl,pins = < + MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1 + MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1 + MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1 + >; + }; + }; + fec { pinctrl_fec_1: fecgrp-1 { fsl,pins = < -- cgit v1.2.3 From 5f7adc9762a33c4aa534f575532f55804ff50609 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 18 Oct 2013 23:27:37 +0800 Subject: ARM: imx: imx6sl iomuxc syscon is compatible to imx6q The imx6sl iomuxc syscon is compatible to imx6q, so let's add compatible string 'fsl,imx6q-iomuxc-gpr' for imx6sl iomuxc syscon node. Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sl.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/imx6sl.dtsi') diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 0a2d614bc206..6eabfa12e8c5 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -533,7 +533,8 @@ }; gpr: iomuxc-gpr@020e0000 { - compatible = "fsl,imx6sl-iomuxc-gpr", "syscon"; + compatible = "fsl,imx6sl-iomuxc-gpr", + "fsl,imx6q-iomuxc-gpr", "syscon"; reg = <0x020e0000 0x38>; }; -- cgit v1.2.3