From cca8614d444de065b7642152d269c8392effbbc8 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Wed, 28 May 2014 16:49:12 +0200 Subject: ARM: tegra: Add new PCIe regulator properties These new properties more accurately reflect the real connections of the boards and therefore make it easier to match them up with schematics. Signed-off-by: Thierry Reding Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra20-trimslice.dts | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm/boot/dts/tegra20-trimslice.dts') diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index 216fa6d50c65..401b32e44369 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -318,6 +318,14 @@ pcie-controller@80003000 { status = "okay"; + + avdd-pex-supply = <&pci_vdd_reg>; + vdd-pex-supply = <&pci_vdd_reg>; + avdd-pex-pll-supply = <&pci_vdd_reg>; + avdd-plle-supply = <&pci_vdd_reg>; + vddio-pex-clk-supply = <&pci_clk_reg>; + + /* deprecated */ pex-clk-supply = <&pci_clk_reg>; vdd-supply = <&pci_vdd_reg>; -- cgit v1.2.3