From b580b899dd05a007ad232ee49a07b32d91876462 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 4 Dec 2010 15:55:14 +0000 Subject: ARM: GIC: provide a single initialization function for boot CPU Provide gic_init() which initializes the GIC distributor and current CPU's GIC interface for the boot (or single) CPU. Reviewed-by: Catalin Marinas Tested-by: Abhijeet Dharmapurikar Signed-off-by: Russell King --- arch/arm/common/gic.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'arch/arm/common/gic.c') diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index e6388dcd8cfa..8eab2f34a7fa 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -213,8 +213,8 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) set_irq_chained_handler(irq, gic_handle_cascade_irq); } -void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, - unsigned int irq_start) +static void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, + unsigned int irq_start) { unsigned int gic_irqs, irq_limit, i; u32 cpumask = 1 << smp_processor_id(); @@ -314,6 +314,13 @@ void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) writel(1, base + GIC_CPU_CTRL); } +void __init gic_init(unsigned int gic_nr, unsigned int irq_start, + void __iomem *dist_base, void __iomem *cpu_base) +{ + gic_dist_init(gic_nr, dist_base, irq_start); + gic_cpu_init(gic_nr, cpu_base); +} + #ifdef CONFIG_SMP void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) { -- cgit v1.2.3