From 7022672e4046fac4699aa5f8ff2a5213b7ec4ff9 Mon Sep 17 00:00:00 2001 From: Simon Arlott Date: Fri, 11 May 2007 20:42:34 +0100 Subject: [PARISC] spelling fixes: arch/parisc/ Spelling fixes in arch/parisc/. Signed-off-by: Simon Arlott Acked-by: Grant Grundler Signed-off-by: Kyle McMartin --- arch/parisc/mm/init.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch/parisc/mm') diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c index 75ea9f2a8a41..e724b362c49a 100644 --- a/arch/parisc/mm/init.c +++ b/arch/parisc/mm/init.c @@ -890,7 +890,7 @@ void __init paging_init(void) #ifdef CONFIG_PA20 /* - * Currently, all PA20 chips have 18 bit protection id's, which is the + * Currently, all PA20 chips have 18 bit protection IDs, which is the * limiting factor (space ids are 32 bits). */ @@ -899,10 +899,10 @@ void __init paging_init(void) #else /* - * Currently we have a one-to-one relationship between space id's and - * protection id's. Older parisc chips (PCXS, PCXT, PCXL, PCXL2) only - * support 15 bit protection id's, so that is the limiting factor. - * PCXT' has 18 bit protection id's, but only 16 bit spaceids, so it's + * Currently we have a one-to-one relationship between space IDs and + * protection IDs. Older parisc chips (PCXS, PCXT, PCXL, PCXL2) only + * support 15 bit protection IDs, so that is the limiting factor. + * PCXT' has 18 bit protection IDs, but only 16 bit spaceids, so it's * probably not worth the effort for a special case here. */ -- cgit v1.2.3