From 0a4e373dc430abd981b15d392098c9e32a134acd Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Tue, 28 Jan 2014 17:37:08 +0100 Subject: video: tegra: kernel parameters to change RGB clock polarity Allow to change clock polarity for RGB display output using the keywords outputen/pixclockpol/vsync and hsync. Add them right after the driver specification, use 0/1 to specifiy high/low polarity, e.g. video=tegrafb0:pixclockpol:1,800x480 --- arch/arm/mach-tegra/include/mach/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-tegra/include/mach/dc.h b/arch/arm/mach-tegra/include/mach/dc.h index 13dc8c0be03a..a60e3e5b14fa 100644 --- a/arch/arm/mach-tegra/include/mach/dc.h +++ b/arch/arm/mach-tegra/include/mach/dc.h @@ -353,7 +353,7 @@ struct tegra_dc_out { unsigned depth; unsigned dither; - const char *default_mode; + char *default_mode; struct tegra_dc_mode *modes; int n_modes; -- cgit v1.2.3