From 92be7f9821a293fb4dc0932263af946d7b81ff89 Mon Sep 17 00:00:00 2001 From: Peter Chen Date: Fri, 10 Dec 2010 12:35:09 +0800 Subject: ENGR00136195 MX28-MSL: fix AHB clock divider issue Also fix the suspend/resume issue when CPU running @261818000Hz Signed-off-by: Peter Chen --- arch/arm/mach-mx28/clock.c | 2 +- arch/arm/mach-mx28/pm.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mx28/clock.c b/arch/arm/mach-mx28/clock.c index b02a69461260..9797d1f650d9 100644 --- a/arch/arm/mach-mx28/clock.c +++ b/arch/arm/mach-mx28/clock.c @@ -772,7 +772,7 @@ static unsigned long h_round_rate(struct clk *clk, unsigned long rate) div = root_rate / rate; if ((div == 0) || (div >= 0x20)) return root_rate; - if (frac_rate == 0) + if (frac_rate < (rate / 2)) return rate; else return root_rate / (div + 1); diff --git a/arch/arm/mach-mx28/pm.c b/arch/arm/mach-mx28/pm.c index c6490d0e3e6d..3dcbb1e889c5 100644 --- a/arch/arm/mach-mx28/pm.c +++ b/arch/arm/mach-mx28/pm.c @@ -115,7 +115,8 @@ static inline void do_standby(void) clk_set_parent(cpu_clk, osc_clk); } else pr_err("fail to get cpu clk\n"); - + if (cpu_rate == 261818000) + clk_set_rate(hbus_clk, 8727267); local_fiq_disable(); __raw_writel(BM_POWER_CTRL_ENIRQ_PSWITCH, -- cgit v1.2.3