From c9ba6fad426faa8349523cef323f7b4b7d17a1e8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Wed, 27 Aug 2014 17:48:41 +0300 Subject: drm/i915: Don't dereference fb when disabling primary plane MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit During driver init we may not have a valid framebuffer for the primary plane even though the plane is enabled due to failed BIOS fb takeover. This means we have to avoid dereferencing the fb in .update_primary_plane() when disabling the plane. The introduction of the primary plane rotation in commit d91a2cb8e5104233c02bbde539bd4ee455ec12ac Author: Sonika Jindal Date: Fri Aug 22 14:06:04 2014 +0530 drm/i915: Add 180 degree primary plane rotation support caused a regression by trying to look up the pixel format before we can be sure there's a valid fb available. This isn't entirely unsurprising since the rotation patches originally predate the change to the primary plane code that calls .update_primary_plane() also when disabling the plane: commit fdd508a6419217cce28213f3c9bd27c02a0d4c71 Author: Ville Syrjälä Date: Fri Aug 8 21:51:11 2014 +0300 drm/i915: Call .update_primary_plane in intel_{enable, disable}_primary_hw_plane() v2: Warn but don't blow up when trying to enable a plane w/o an fb (Chris) Cc: Sonika Jindal Signed-off-by: Ville Syrjälä Reviewed-by: Chris Wilson Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) (limited to 'drivers/gpu/drm/i915/intel_display.c') diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index cbd159163722..c95d423e10bb 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2388,15 +2388,13 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc, struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = dev->dev_private; struct intel_crtc *intel_crtc = to_intel_crtc(crtc); - struct drm_i915_gem_object *obj = intel_fb_obj(fb); + struct drm_i915_gem_object *obj; int plane = intel_crtc->plane; unsigned long linear_offset; u32 dspcntr; u32 reg = DSPCNTR(plane); int pixel_size; - pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); - if (!intel_crtc->primary_enabled) { I915_WRITE(reg, 0); if (INTEL_INFO(dev)->gen >= 4) @@ -2407,6 +2405,12 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc, return; } + obj = intel_fb_obj(fb); + if (WARN_ON(obj == NULL)) + return; + + pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); + dspcntr = DISPPLANE_GAMMA_ENABLE; dspcntr |= DISPLAY_PLANE_ENABLE; @@ -2510,15 +2514,13 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc, struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = dev->dev_private; struct intel_crtc *intel_crtc = to_intel_crtc(crtc); - struct drm_i915_gem_object *obj = intel_fb_obj(fb); + struct drm_i915_gem_object *obj; int plane = intel_crtc->plane; unsigned long linear_offset; u32 dspcntr; u32 reg = DSPCNTR(plane); int pixel_size; - pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); - if (!intel_crtc->primary_enabled) { I915_WRITE(reg, 0); I915_WRITE(DSPSURF(plane), 0); @@ -2526,6 +2528,12 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc, return; } + obj = intel_fb_obj(fb); + if (WARN_ON(obj == NULL)) + return; + + pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); + dspcntr = DISPPLANE_GAMMA_ENABLE; dspcntr |= DISPLAY_PLANE_ENABLE; -- cgit v1.2.3