From 831cc6dad05024c69e749e85c229e844a8fd73bb Mon Sep 17 00:00:00 2001 From: Yudong Tan Date: Mon, 27 Jun 2011 14:05:58 -0700 Subject: video: tegra: Use new Tegra platform types This change is needed to support three platforms, silicon, fpga and simulation. Change-Id: I70c6edbab85712b037b1ddf15ce72cf1a2affeba Reviewed-on: http://git-master/r/36354 Reviewed-by: Varun Colbert Tested-by: Varun Colbert Rebase-Id: Rdd2875e5494a504dc4d2df0393bc798765a9b865 --- drivers/video/tegra/dc/rgb.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/video/tegra/dc/rgb.c') diff --git a/drivers/video/tegra/dc/rgb.c b/drivers/video/tegra/dc/rgb.c index e7ea9a8914df..7b87a2da4b4d 100644 --- a/drivers/video/tegra/dc/rgb.c +++ b/drivers/video/tegra/dc/rgb.c @@ -42,13 +42,13 @@ static const u32 tegra_dc_rgb_enable_out_sel_pintable[] = { DC_COM_PIN_OUTPUT_SELECT0, 0x00000000, DC_COM_PIN_OUTPUT_SELECT1, 0x00000000, DC_COM_PIN_OUTPUT_SELECT2, 0x00000000, -#ifdef CONFIG_TEGRA_FPGA_PLATFORM +#ifdef CONFIG_TEGRA_SILICON_PLATFORM + DC_COM_PIN_OUTPUT_SELECT3, 0x00000000, +#else /* The display panel sub-board used on FPGA platforms (panel 86) is non-standard. It expects the Data Enable signal on the WR pin instead of the DE pin. */ DC_COM_PIN_OUTPUT_SELECT3, 0x00200000, -#else - DC_COM_PIN_OUTPUT_SELECT3, 0x00000000, #endif DC_COM_PIN_OUTPUT_SELECT4, 0x00210222, DC_COM_PIN_OUTPUT_SELECT5, 0x00002200, -- cgit v1.2.3