From adc6a443b7df188545c99cea1c3ebd5c965763b7 Mon Sep 17 00:00:00 2001 From: Wojciech Bieganski Date: Mon, 14 Apr 2014 15:56:00 +0200 Subject: media: added camera settings per decoder This commit adds settings such as: - values of horizontal/vertical active start, - enabling/disabling internal sync, to the private data of decoders: MAX9526, ADV7180, TVP5150, OV7670 and AS0260. The feature is available through *_tegra_camera_platform_data struct initialised in board-*.c files. --- drivers/media/video/tegra_v4l2_camera.c | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) (limited to 'drivers') diff --git a/drivers/media/video/tegra_v4l2_camera.c b/drivers/media/video/tegra_v4l2_camera.c index c222048b59d4..e5cbb3a582dc 100644 --- a/drivers/media/video/tegra_v4l2_camera.c +++ b/drivers/media/video/tegra_v4l2_camera.c @@ -43,19 +43,11 @@ #define TEGRA_CAM_DRV_NAME "vi" #define TEGRA_CAM_VERSION_CODE KERNEL_VERSION(0, 0, 5) -static unsigned int internal_sync = 0; -module_param(internal_sync, int, 0644); -MODULE_PARM_DESC(internal_sync, "enable internal vsync and hsync decoded " \ - "from data"); - #define TEGRA_SYNCPT_VI_WAIT_TIMEOUT 200 #define TEGRA_SYNCPT_CSI_WAIT_TIMEOUT 200 #define TEGRA_SYNCPT_RETRY_COUNT 10 -#define TEGRA_VIP_H_ACTIVE_START 0x8F /*0x98 */ -#define TEGRA_VIP_V_ACTIVE_START 0x12 /*0x10 */ - /* SYNCPTs 12-17 are reserved for VI. */ #define TEGRA_VI_SYNCPT_VI NVSYNCPT_VI_ISP_2 #define TEGRA_VI_SYNCPT_CSI_A NVSYNCPT_VI_ISP_3 @@ -630,14 +622,14 @@ static void tegra_camera_capture_setup_vip(struct tegra_camera_dev *pcdev, struct soc_camera_device *icd, u32 input_control) { - + struct tegra_camera_platform_data *pdata = icd->link->priv; TC_VI_REG_WT(pcdev, TEGRA_VI_VI_CORE_CONTROL, 0x00000000); TC_VI_REG_WT(pcdev, TEGRA_VI_VI_INPUT_CONTROL, /* (1 << 27) | field detect */ (0 << 28) | /* 1 == top field is even field, 00 == odd */ - ((internal_sync == 1) << 25) | /* 1 == hsync/vsync decoded + (((pdata->internal_sync == true) ? 1 : 0) << 25) | /* 1 == hsync/vsync decoded internally from data (BT.656) */ (1 << 1) | /* VIP_INPUT_ENABLE */ @@ -649,10 +641,10 @@ static void tegra_camera_capture_setup_vip(struct tegra_camera_dev *pcdev, /* VIP H_ACTIVE and V_ACTIVE */ TC_VI_REG_WT(pcdev, TEGRA_VI_VIP_H_ACTIVE, (icd->user_width << 16) | - (TEGRA_VIP_H_ACTIVE_START - ((internal_sync == 1) ? 1 : 0))); + (pdata->vip_h_active_start - ((pdata->internal_sync == true) ? 1 : 0))); TC_VI_REG_WT(pcdev, TEGRA_VI_VIP_V_ACTIVE, ((IS_INTERLACED ? (icd->user_height/2) : (icd->user_height)) << 16) | - TEGRA_VIP_V_ACTIVE_START); + pdata->vip_v_active_start); /* * For VIP, D9..D2 is mapped to the video decoder's P7..P0. -- cgit v1.2.3