From dd135ebbd2a6b5e07dadb66c4dd033bb69531051 Mon Sep 17 00:00:00 2001 From: Christian Borntraeger Date: Wed, 2 Apr 2008 13:04:40 -0700 Subject: kvm: provide kvm.h for all architecture: fixes headers_install MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently include/linux/kvm.h is not considered by make headers_install, because Kbuild cannot handle " unifdef-$(CONFIG_FOO) += foo.h. This problem was introduced by commit fb56dbb31c4738a3918db81fd24da732ce3b4ae6 Author: Avi Kivity Date: Sun Dec 2 10:50:06 2007 +0200 KVM: Export include/linux/kvm.h only if $ARCH actually supports KVM Currently, make headers_check barfs due to , which includes, not existing. Rather than add a zillion s, export kvm. only if the arch actually supports it. Signed-off-by: Avi Kivity which makes this an 2.6.25 regression. One way of solving the issue is to enhance Kbuild, but Avi and David conviced me, that changing headers_install is not the way to go. This patch changes the definition for linux/kvm.h to unifdef-y. If  unifdef-y is used for linux/kvm.h "make headers_check" will fail on all architectures without asm/kvm.h. Therefore, this patch also provides asm/kvm.h on all architectures. Signed-off-by: Christian Borntraeger Acked-by: Avi Kivity Cc: Sam Ravnborg Cc: Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-arm/kvm.h | 6 ++++++ 1 file changed, 6 insertions(+) create mode 100644 include/asm-arm/kvm.h (limited to 'include/asm-arm') diff --git a/include/asm-arm/kvm.h b/include/asm-arm/kvm.h new file mode 100644 index 000000000000..cb3c08cbcb9e --- /dev/null +++ b/include/asm-arm/kvm.h @@ -0,0 +1,6 @@ +#ifndef __LINUX_KVM_ARM_H +#define __LINUX_KVM_ARM_H + +/* arm does not support KVM */ + +#endif -- cgit v1.2.3 From 52e3134423c3af4431fedb34f77e31cfff91e0c3 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Mon, 3 Mar 2008 12:43:23 -0800 Subject: ARM: OMAP: Use gpiolib Update OMAP to use the new GPIO implementation framework. This is just a quick'n'dirty update ... more code could now be removed, ideally as part of cleaning up the entire OMAP GPIO infrastructure ... Signed-off-by: David Brownell Signed-off-by: Tony Lindgren --- include/asm-arm/arch-omap/gpio.h | 57 +++++++++++----------------------------- 1 file changed, 15 insertions(+), 42 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-omap/gpio.h b/include/asm-arm/arch-omap/gpio.h index 164da09be095..86621a04cd8f 100644 --- a/include/asm-arm/arch-omap/gpio.h +++ b/include/asm-arm/arch-omap/gpio.h @@ -82,62 +82,35 @@ extern void omap_set_gpio_debounce_time(int gpio, int enable); /*-------------------------------------------------------------------------*/ -/* wrappers for "new style" GPIO calls. the old OMAP-specfic ones should - * eventually be removed (along with this errno.h inclusion), and maybe - * gpios should put MPUIOs last too. +/* Wrappers for "new style" GPIO calls, using the new infrastructure + * which lets us plug in FPGA, I2C, and other implementations. + * * + * The original OMAP-specfic calls should eventually be removed. */ -#include - -static inline int gpio_request(unsigned gpio, const char *label) -{ - return omap_request_gpio(gpio); -} - -static inline void gpio_free(unsigned gpio) -{ - omap_free_gpio(gpio); -} - -static inline int __gpio_set_direction(unsigned gpio, int is_input) -{ - if (cpu_class_is_omap2()) { - if (gpio > OMAP_MAX_GPIO_LINES) - return -EINVAL; - } else { - if (gpio > (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)) - return -EINVAL; - } - omap_set_gpio_direction(gpio, is_input); - return 0; -} - -static inline int gpio_direction_input(unsigned gpio) -{ - return __gpio_set_direction(gpio, 1); -} - -static inline int gpio_direction_output(unsigned gpio, int value) -{ - omap_set_gpio_dataout(gpio, value); - return __gpio_set_direction(gpio, 0); -} +#include +#include static inline int gpio_get_value(unsigned gpio) { - return omap_get_gpio_datain(gpio); + return __gpio_get_value(gpio); } static inline void gpio_set_value(unsigned gpio, int value) { - omap_set_gpio_dataout(gpio, value); + __gpio_set_value(gpio, value); } -#include /* cansleep wrappers */ +static inline int gpio_cansleep(unsigned gpio) +{ + return __gpio_cansleep(gpio); +} static inline int gpio_to_irq(unsigned gpio) { - return OMAP_GPIO_IRQ(gpio); + if (gpio < (OMAP_MAX_GPIO_LINES + 16)) + return OMAP_GPIO_IRQ(gpio); + return -EINVAL; } static inline int irq_to_gpio(unsigned irq) -- cgit v1.2.3 From d94577d5a581fe55c46b5b82eee733b8d053db19 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Thu, 28 Feb 2008 22:09:15 -0800 Subject: ARM: OMAP: Use gpiolib with tps65010 for OSK 5912 Convert OSK board to use new tps65010 gpiolib support. This includes moving its LED support from leds-osk to gpio-leds, giving more trigger options and a net platform code shrink. Signed-off-by: David Brownell Signed-off-by: Tony Lindgren --- include/asm-arm/arch-omap/board-osk.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-omap/board-osk.h b/include/asm-arm/arch-omap/board-osk.h index 2b1a8a4fe44e..94926090e475 100644 --- a/include/asm-arm/arch-omap/board-osk.h +++ b/include/asm-arm/arch-omap/board-osk.h @@ -32,5 +32,16 @@ /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ #define OMAP_OSK_ETHR_START 0x04800300 +/* TPS65010 has four GPIOs. nPG and LED2 can be treated like GPIOs with + * alternate pin configurations for hardware-controlled blinking. + */ +#define OSK_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */) +# define OSK_TPS_GPIO_USB_PWR_EN (OSK_TPS_GPIO_BASE + 0) +# define OSK_TPS_GPIO_LED_D3 (OSK_TPS_GPIO_BASE + 1) +# define OSK_TPS_GPIO_LAN_RESET (OSK_TPS_GPIO_BASE + 2) +# define OSK_TPS_GPIO_DSP_PWR_EN (OSK_TPS_GPIO_BASE + 3) +# define OSK_TPS_GPIO_LED_D9 (OSK_TPS_GPIO_BASE + 4) +# define OSK_TPS_GPIO_LED_D2 (OSK_TPS_GPIO_BASE + 5) + #endif /* __ASM_ARCH_OMAP_OSK_H */ -- cgit v1.2.3 From 7d7f665d5dac8d19f2fcb56baea09c59a3f861be Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 25 Jan 2008 00:42:48 -0800 Subject: ARM: OMAP: Allow registering pin mux function This patch changes pin multiplexing init to allow registering custom function. The omap_cfg_reg() func will be split into omap processor specific functions in later patch. This is done to make adding omap3 pin multiplexing easier. Signed-off-by: Tony Lindgren --- include/asm-arm/arch-omap/mux.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h index b8fff50e6a87..0edc6ce91b33 100644 --- a/include/asm-arm/arch-omap/mux.h +++ b/include/asm-arm/arch-omap/mux.h @@ -559,11 +559,17 @@ enum omap24xx_index { B13_24XX_KBC6, }; +struct omap_mux_cfg { + struct pin_config *pins; + unsigned long size; + int (*cfg_reg)(const struct pin_config *cfg); +}; + #ifdef CONFIG_OMAP_MUX /* setup pin muxing in Linux */ extern int omap1_mux_init(void); extern int omap2_mux_init(void); -extern int omap_mux_register(struct pin_config * pins, unsigned long size); +extern int omap_mux_register(struct omap_mux_cfg *); extern int omap_cfg_reg(unsigned long reg_cfg); #else /* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */ -- cgit v1.2.3 From f7337a199acffa9f12fa9d88253d33bfb56ef14a Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 20 Mar 2008 16:56:26 +0200 Subject: ARM: OMAP2: Add new pin multiplexing configurations Add new pin multiplexing configurations Signed-off-by: Tony Lindgren --- include/asm-arm/arch-omap/mux.h | 45 +++++++++++++++++++++++++++++++++++++++-- 1 file changed, 43 insertions(+), 2 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h index 0edc6ce91b33..68dd93685f69 100644 --- a/include/asm-arm/arch-omap/mux.h +++ b/include/asm-arm/arch-omap/mux.h @@ -469,7 +469,12 @@ enum omap24xx_index { AA8_242X_GPIO58, Y20_24XX_GPIO60, W4__24XX_GPIO74, + N15_24XX_GPIO85, M15_24XX_GPIO92, + P20_24XX_GPIO93, + P18_24XX_GPIO95, + M18_24XX_GPIO96, + L14_24XX_GPIO97, J15_24XX_GPIO99, V14_24XX_GPIO117, P14_24XX_GPIO125, @@ -494,8 +499,6 @@ enum omap24xx_index { D3_242X_DMAREQ4, E3_242X_DMAREQ5, - P20_24XX_TSC_IRQ, - /* UART3 */ K15_24XX_UART3_TX, K14_24XX_UART3_RX, @@ -557,6 +560,44 @@ enum omap24xx_index { B3__24XX_KBR5, AA4_24XX_KBC2, B13_24XX_KBC6, + + /* 2430 USB */ + AD9_2430_USB0_PUEN, + Y11_2430_USB0_VP, + AD7_2430_USB0_VM, + AE7_2430_USB0_RCV, + AD4_2430_USB0_TXEN, + AF9_2430_USB0_SE0, + AE6_2430_USB0_DAT, + AD24_2430_USB1_SE0, + AB24_2430_USB1_RCV, + Y25_2430_USB1_TXEN, + AA26_2430_USB1_DAT, + + /* 2430 HS-USB */ + AD9_2430_USB0HS_DATA3, + Y11_2430_USB0HS_DATA4, + AD7_2430_USB0HS_DATA5, + AE7_2430_USB0HS_DATA6, + AD4_2430_USB0HS_DATA2, + AF9_2430_USB0HS_DATA0, + AE6_2430_USB0HS_DATA1, + AE8_2430_USB0HS_CLK, + AD8_2430_USB0HS_DIR, + AE5_2430_USB0HS_STP, + AE9_2430_USB0HS_NXT, + AC7_2430_USB0HS_DATA7, + + /* 2430 McBSP */ + AC10_2430_MCBSP2_FSX, + AD16_2430_MCBSP2_CLX, + AE13_2430_MCBSP2_DX, + AD13_2430_MCBSP2_DR, + AC10_2430_MCBSP2_FSX_OFF, + AD16_2430_MCBSP2_CLX_OFF, + AE13_2430_MCBSP2_DX_OFF, + AD13_2430_MCBSP2_DR_OFF, + }; struct omap_mux_cfg { -- cgit v1.2.3 From 9330899e0f878ff3b7a23b856de8bbb52c9c04fd Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 24 Jan 2008 17:24:15 -0800 Subject: ARM: OMAP2: Clean-up mux code Misc clean-up for the mux code and remove some unnecessary ifdefs. Patch changes debug function so it can be used on both 24xx and 34xx. Changes are mostly for omap2, but patch also cleans up some omap1 and common mux code. Signed-off-by: Tony Lindgren --- include/asm-arm/arch-omap/mux.h | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h index 68dd93685f69..ff9a5b5575fd 100644 --- a/include/asm-arm/arch-omap/mux.h +++ b/include/asm-arm/arch-omap/mux.h @@ -4,9 +4,10 @@ * Table of the Omap register configurations for the FUNC_MUX and * PULL_DWN combinations. * - * Copyright (C) 2003 - 2005 Nokia Corporation + * Copyright (C) 2004 - 2008 Texas Instruments Inc. + * Copyright (C) 2003 - 2008 Nokia Corporation * - * Written by Tony Lindgren + * Written by Tony Lindgren * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -27,14 +28,6 @@ * - W8 = ball * - 1610 = 1510 or 1610, none if common for both 1510 and 1610 * - MMC2_DAT0 = function - * - * Change log: - * Added entry for the I2C interface. (02Feb 2004) - * Copyright (C) 2004 Texas Instruments - * - * Added entry for the keypad and uwire CS1. (09Mar 2004) - * Copyright (C) 2004 Texas Instruments - * */ #ifndef __ASM_ARCH_MUX_H -- cgit v1.2.3 From 69d88a00a240fbed07fb6943c862ea3188e9097d Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 18 Mar 2008 10:02:50 +0200 Subject: ARM: OMAP2: Add common register access for 24xx and 34xx This patch adds common register access for 24xx and 34xx power and clock management in order to share code between 24xx and 34xx. Only change USB platform init code to use new register access, other access will be changed in later patches. Signed-off-by: Paul Walmsley Signed-off-by: Tony Lindgren --- include/asm-arm/arch-omap/control.h | 191 ++++++++++++++++++++++++++++++++++++ include/asm-arm/arch-omap/sdrc.h | 75 ++++++++++++++ include/asm-arm/arch-omap/usb.h | 5 +- 3 files changed, 267 insertions(+), 4 deletions(-) create mode 100644 include/asm-arm/arch-omap/control.h create mode 100644 include/asm-arm/arch-omap/sdrc.h (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-omap/control.h b/include/asm-arm/arch-omap/control.h new file mode 100644 index 000000000000..9944bb5d5330 --- /dev/null +++ b/include/asm-arm/arch-omap/control.h @@ -0,0 +1,191 @@ +#ifndef __ASM_ARCH_CONTROL_H +#define __ASM_ARCH_CONTROL_H + +/* + * include/asm-arm/arch-omap/control.h + * + * OMAP2/3 System Control Module definitions + * + * Copyright (C) 2007 Texas Instruments, Inc. + * Copyright (C) 2007 Nokia Corporation + * + * Written by Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation. + */ + +#include + +#define OMAP242X_CTRL_REGADDR(reg) \ + (void __iomem *)IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) +#define OMAP243X_CTRL_REGADDR(reg) \ + (void __iomem *)IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) +#define OMAP343X_CTRL_REGADDR(reg) \ + (void __iomem *)IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) + +/* + * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for + * OMAP24XX and OMAP34XX. + */ + +/* Control submodule offsets */ + +#define OMAP2_CONTROL_INTERFACE 0x000 +#define OMAP2_CONTROL_PADCONFS 0x030 +#define OMAP2_CONTROL_GENERAL 0x270 +#define OMAP343X_CONTROL_MEM_WKUP 0x600 +#define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00 +#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60 + +/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */ + +#define OMAP2_CONTROL_SYSCONFIG (OMAP2_CONTROL_INTERFACE + 0x10) + +/* CONTROL_GENERAL register offsets common to OMAP2 & 3 */ +#define OMAP2_CONTROL_DEVCONF0 (OMAP2_CONTROL_GENERAL + 0x0004) +#define OMAP2_CONTROL_MSUSPENDMUX_0 (OMAP2_CONTROL_GENERAL + 0x0020) +#define OMAP2_CONTROL_MSUSPENDMUX_1 (OMAP2_CONTROL_GENERAL + 0x0024) +#define OMAP2_CONTROL_MSUSPENDMUX_2 (OMAP2_CONTROL_GENERAL + 0x0028) +#define OMAP2_CONTROL_MSUSPENDMUX_3 (OMAP2_CONTROL_GENERAL + 0x002c) +#define OMAP2_CONTROL_MSUSPENDMUX_4 (OMAP2_CONTROL_GENERAL + 0x0030) +#define OMAP2_CONTROL_MSUSPENDMUX_5 (OMAP2_CONTROL_GENERAL + 0x0034) +#define OMAP2_CONTROL_SEC_CTRL (OMAP2_CONTROL_GENERAL + 0x0040) +#define OMAP2_CONTROL_RPUB_KEY_H_0 (OMAP2_CONTROL_GENERAL + 0x0090) +#define OMAP2_CONTROL_RPUB_KEY_H_1 (OMAP2_CONTROL_GENERAL + 0x0094) +#define OMAP2_CONTROL_RPUB_KEY_H_2 (OMAP2_CONTROL_GENERAL + 0x0098) +#define OMAP2_CONTROL_RPUB_KEY_H_3 (OMAP2_CONTROL_GENERAL + 0x009c) + +/* 242x-only CONTROL_GENERAL register offsets */ +#define OMAP242X_CONTROL_DEVCONF OMAP2_CONTROL_DEVCONF0 /* match TRM */ +#define OMAP242X_CONTROL_OCM_RAM_PERM (OMAP2_CONTROL_GENERAL + 0x0068) + +/* 243x-only CONTROL_GENERAL register offsets */ +/* CONTROL_IVA2_BOOT{ADDR,MOD} are at the same place on 343x - noted below */ +#define OMAP243X_CONTROL_DEVCONF1 (OMAP2_CONTROL_GENERAL + 0x0078) +#define OMAP243X_CONTROL_CSIRXFE (OMAP2_CONTROL_GENERAL + 0x007c) +#define OMAP243X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) +#define OMAP243X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) +#define OMAP243X_CONTROL_IVA2_GEMCFG (OMAP2_CONTROL_GENERAL + 0x0198) + +/* 24xx-only CONTROL_GENERAL register offsets */ +#define OMAP24XX_CONTROL_DEBOBS (OMAP2_CONTROL_GENERAL + 0x0000) +#define OMAP24XX_CONTROL_EMU_SUPPORT (OMAP2_CONTROL_GENERAL + 0x0008) +#define OMAP24XX_CONTROL_SEC_TEST (OMAP2_CONTROL_GENERAL + 0x0044) +#define OMAP24XX_CONTROL_PSA_CTRL (OMAP2_CONTROL_GENERAL + 0x0048) +#define OMAP24XX_CONTROL_PSA_CMD (OMAP2_CONTROL_GENERAL + 0x004c) +#define OMAP24XX_CONTROL_PSA_VALUE (OMAP2_CONTROL_GENERAL + 0x0050) +#define OMAP24XX_CONTROL_SEC_EMU (OMAP2_CONTROL_GENERAL + 0x0060) +#define OMAP24XX_CONTROL_SEC_TAP (OMAP2_CONTROL_GENERAL + 0x0064) +#define OMAP24XX_CONTROL_OCM_PUB_RAM_ADD (OMAP2_CONTROL_GENERAL + 0x006c) +#define OMAP24XX_CONTROL_EXT_SEC_RAM_START_ADD (OMAP2_CONTROL_GENERAL + 0x0070) +#define OMAP24XX_CONTROL_EXT_SEC_RAM_STOP_ADD (OMAP2_CONTROL_GENERAL + 0x0074 +#define OMAP24XX_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0080) +#define OMAP24XX_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0084) +#define OMAP24XX_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0088) +#define OMAP24XX_CONTROL_GENERAL_PURPOSE_STATUS (OMAP2_CONTROL_GENERAL + 0x008c) +#define OMAP24XX_CONTROL_RAND_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00a0) +#define OMAP24XX_CONTROL_RAND_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00a4) +#define OMAP24XX_CONTROL_RAND_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00a8) +#define OMAP24XX_CONTROL_RAND_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00ac) +#define OMAP24XX_CONTROL_CUST_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00b0) +#define OMAP24XX_CONTROL_CUST_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00b4) +#define OMAP24XX_CONTROL_TEST_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00c0) +#define OMAP24XX_CONTROL_TEST_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00c4) +#define OMAP24XX_CONTROL_TEST_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00c8) +#define OMAP24XX_CONTROL_TEST_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00cc) +#define OMAP24XX_CONTROL_TEST_KEY_4 (OMAP2_CONTROL_GENERAL + 0x00d0) +#define OMAP24XX_CONTROL_TEST_KEY_5 (OMAP2_CONTROL_GENERAL + 0x00d4) +#define OMAP24XX_CONTROL_TEST_KEY_6 (OMAP2_CONTROL_GENERAL + 0x00d8) +#define OMAP24XX_CONTROL_TEST_KEY_7 (OMAP2_CONTROL_GENERAL + 0x00dc) +#define OMAP24XX_CONTROL_TEST_KEY_8 (OMAP2_CONTROL_GENERAL + 0x00e0) +#define OMAP24XX_CONTROL_TEST_KEY_9 (OMAP2_CONTROL_GENERAL + 0x00e4) + +/* 34xx-only CONTROL_GENERAL register offsets */ +#define OMAP343X_CONTROL_PADCONF_OFF (OMAP2_CONTROL_GENERAL + 0x0000) +#define OMAP343X_CONTROL_MEM_DFTRW0 (OMAP2_CONTROL_GENERAL + 0x0008) +#define OMAP343X_CONTROL_MEM_DFTRW1 (OMAP2_CONTROL_GENERAL + 0x000c) +#define OMAP343X_CONTROL_DEVCONF1 (OMAP2_CONTROL_GENERAL + 0x0068) +#define OMAP343X_CONTROL_CSIRXFE (OMAP2_CONTROL_GENERAL + 0x006c) +#define OMAP343X_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0070) +#define OMAP343X_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0074) +#define OMAP343X_CONTROL_SEC_ERR_STATUS_DEBUG (OMAP2_CONTROL_GENERAL + 0x0078) +#define OMAP343X_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0080) +#define OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS (OMAP2_CONTROL_GENERAL + 0x0084) +#define OMAP343X_CONTROL_RPUB_KEY_H_4 (OMAP2_CONTROL_GENERAL + 0x00a0) +#define OMAP343X_CONTROL_RAND_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00a8) +#define OMAP343X_CONTROL_RAND_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00ac) +#define OMAP343X_CONTROL_RAND_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00b0) +#define OMAP343X_CONTROL_RAND_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00b4) +#define OMAP343X_CONTROL_TEST_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00c8) +#define OMAP343X_CONTROL_TEST_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00cc) +#define OMAP343X_CONTROL_TEST_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00d0) +#define OMAP343X_CONTROL_TEST_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00d4) +#define OMAP343X_CONTROL_TEST_KEY_4 (OMAP2_CONTROL_GENERAL + 0x00d8) +#define OMAP343X_CONTROL_TEST_KEY_5 (OMAP2_CONTROL_GENERAL + 0x00dc) +#define OMAP343X_CONTROL_TEST_KEY_6 (OMAP2_CONTROL_GENERAL + 0x00e0) +#define OMAP343X_CONTROL_TEST_KEY_7 (OMAP2_CONTROL_GENERAL + 0x00e4) +#define OMAP343X_CONTROL_TEST_KEY_8 (OMAP2_CONTROL_GENERAL + 0x00e8) +#define OMAP343X_CONTROL_TEST_KEY_9 (OMAP2_CONTROL_GENERAL + 0x00ec) +#define OMAP343X_CONTROL_TEST_KEY_10 (OMAP2_CONTROL_GENERAL + 0x00f0) +#define OMAP343X_CONTROL_TEST_KEY_11 (OMAP2_CONTROL_GENERAL + 0x00f4) +#define OMAP343X_CONTROL_TEST_KEY_12 (OMAP2_CONTROL_GENERAL + 0x00f8) +#define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) +#define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) +#define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) + +/* + * REVISIT: This list of registers is not comprehensive - there are more + * that should be added. + */ + +/* + * Control module register bit defines - these should eventually go into + * their own regbits file. Some of these will be complicated, depending + * on the device type (general-purpose, emulator, test, secure, bad, other) + * and the security mode (secure, non-secure, don't care) + */ +/* CONTROL_DEVCONF0 bits */ +#define OMAP24XX_USBSTANDBYCTRL (1 << 15) +#define OMAP2_MCBSP2_CLKS_MASK (1 << 6) +#define OMAP2_MCBSP1_CLKS_MASK (1 << 2) + +/* CONTROL_DEVCONF1 bits */ +#define OMAP2_MCBSP5_CLKS_MASK (1 << 4) /* > 242x */ +#define OMAP2_MCBSP4_CLKS_MASK (1 << 2) /* > 242x */ +#define OMAP2_MCBSP3_CLKS_MASK (1 << 0) /* > 242x */ + +/* CONTROL_STATUS bits */ +#define OMAP2_DEVICETYPE_MASK (0x7 << 8) +#define OMAP2_SYSBOOT_5_MASK (1 << 5) +#define OMAP2_SYSBOOT_4_MASK (1 << 4) +#define OMAP2_SYSBOOT_3_MASK (1 << 3) +#define OMAP2_SYSBOOT_2_MASK (1 << 2) +#define OMAP2_SYSBOOT_1_MASK (1 << 1) +#define OMAP2_SYSBOOT_0_MASK (1 << 0) + +#ifndef __ASSEMBLY__ +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) +extern void omap_ctrl_base_set(u32 base); +extern u32 omap_ctrl_base_get(void); +extern u8 omap_ctrl_readb(u16 offset); +extern u16 omap_ctrl_readw(u16 offset); +extern u32 omap_ctrl_readl(u16 offset); +extern void omap_ctrl_writeb(u8 val, u16 offset); +extern void omap_ctrl_writew(u16 val, u16 offset); +extern void omap_ctrl_writel(u32 val, u16 offset); +#else +#define omap_ctrl_base_set(x) WARN_ON(1) +#define omap_ctrl_base_get() 0 +#define omap_ctrl_readb(x) 0 +#define omap_ctrl_readw(x) 0 +#define omap_ctrl_readl(x) 0 +#define omap_ctrl_writeb(x, y) WARN_ON(1) +#define omap_ctrl_writew(x, y) WARN_ON(1) +#define omap_ctrl_writel(x, y) WARN_ON(1) +#endif +#endif /* __ASSEMBLY__ */ + +#endif /* __ASM_ARCH_CONTROL_H */ + diff --git a/include/asm-arm/arch-omap/sdrc.h b/include/asm-arm/arch-omap/sdrc.h new file mode 100644 index 000000000000..673b3965befc --- /dev/null +++ b/include/asm-arm/arch-omap/sdrc.h @@ -0,0 +1,75 @@ +#ifndef ____ASM_ARCH_SDRC_H +#define ____ASM_ARCH_SDRC_H + +/* + * OMAP2/3 SDRC/SMS register definitions + * + * Copyright (C) 2007 Texas Instruments, Inc. + * Copyright (C) 2007 Nokia Corporation + * + * Written by Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +/* SDRC register offsets - read/write with sdrc_{read,write}_reg() */ + +#define SDRC_SYSCONFIG 0x010 +#define SDRC_DLLA_CTRL 0x060 +#define SDRC_DLLA_STATUS 0x064 +#define SDRC_DLLB_CTRL 0x068 +#define SDRC_DLLB_STATUS 0x06C +#define SDRC_POWER 0x070 +#define SDRC_MR_0 0x084 +#define SDRC_RFR_CTRL_0 0x0a4 + +/* + * These values represent the number of memory clock cycles between + * autorefresh initiation. They assume 1 refresh per 64 ms (JEDEC), 8192 + * rows per device, and include a subtraction of a 50 cycle window in the + * event that the autorefresh command is delayed due to other SDRC activity. + * The '| 1' sets the ARE field to send one autorefresh when the autorefresh + * counter reaches 0. + * + * These represent optimal values for common parts, it won't work for all. + * As long as you scale down, most parameters are still work, they just + * become sub-optimal. The RFR value goes in the opposite direction. If you + * don't adjust it down as your clock period increases the refresh interval + * will not be met. Setting all parameters for complete worst case may work, + * but may cut memory performance by 2x. Due to errata the DLLs need to be + * unlocked and their value needs run time calibration. A dynamic call is + * need for that as no single right value exists acorss production samples. + * + * Only the FULL speed values are given. Current code is such that rate + * changes must be made at DPLLoutx2. The actual value adjustment for low + * frequency operation will be handled by omap_set_performance() + * + * By having the boot loader boot up in the fastest L4 speed available likely + * will result in something which you can switch between. + */ +#define SDRC_RFR_CTRL_165MHz (0x00044c00 | 1) +#define SDRC_RFR_CTRL_133MHz (0x0003de00 | 1) +#define SDRC_RFR_CTRL_100MHz (0x0002da01 | 1) +#define SDRC_RFR_CTRL_110MHz (0x0002da01 | 1) /* Need to calc */ +#define SDRC_RFR_CTRL_BYPASS (0x00005000 | 1) /* Need to calc */ + + +/* + * SMS register access + */ + + +#define OMAP242X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg) +#define OMAP243X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg) +#define OMAP343X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg) + +/* SMS register offsets - read/write with sms_{read,write}_reg() */ + +#define SMS_SYSCONFIG 0x010 +/* REVISIT: fill in other SMS registers here */ + +#endif diff --git a/include/asm-arm/arch-omap/usb.h b/include/asm-arm/arch-omap/usb.h index 99ae9eabaf71..2147d18aaeae 100644 --- a/include/asm-arm/arch-omap/usb.h +++ b/include/asm-arm/arch-omap/usb.h @@ -132,14 +132,11 @@ # define CONF_USB_PWRDN_DP_R (1 << 1) /* OMAP2 */ -#define CONTROL_DEVCONF_REG __REG32(L4_24XX_BASE + 0x0274) # define USB_UNIDIR 0x0 # define USB_UNIDIR_TLL 0x1 # define USB_BIDIR 0x2 # define USB_BIDIR_TLL 0x3 -# define USBT0WRMODEI(x) ((x) << 22) -# define USBT1WRMODEI(x) ((x) << 20) -# define USBT2WRMODEI(x) ((x) << 18) +# define USBTXWRMODEI(port, x) ((x) << (22 - (port * 2))) # define USBT2TLL5PI (1 << 17) # define USB0PUENACTLOI (1 << 16) # define USBSTANDBYCTRL (1 << 15) -- cgit v1.2.3 From 445959821f82846913fe09fee0573e0238415e8c Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 18 Mar 2008 10:04:51 +0200 Subject: ARM: OMAP2: Change 24xx to use new register access This patch changes 24xx to use new register access, except for clock framework. Clock framework register access will get updates in the next patch. Note that board-*.c files change GPMC (General Purpose Memory Controller) access to use gpmc_cs_write_reg() instead of accessing the registers directly. The code also uses gpmc_fck instead of it's parent clock core_l3_ck for GPMC clock. The H4 board file also adds h4_init_flash() function, which specify the flash start and end addresses. Also note that sleep.S removes some unused registers addresses. Signed-off-by: Paul Walmsley Signed-off-by: Tony Lindgren --- include/asm-arm/arch-omap/clock.h | 5 ++ include/asm-arm/arch-omap/entry-macro.S | 2 +- include/asm-arm/arch-omap/io.h | 70 ++++++++++++++++++++++-- include/asm-arm/arch-omap/omap24xx.h | 96 +++++++++++++++++++++++++++------ 4 files changed, 152 insertions(+), 21 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h index fa6881049903..fc7b80643852 100644 --- a/include/asm-arm/arch-omap/clock.h +++ b/include/asm-arm/arch-omap/clock.h @@ -88,4 +88,9 @@ extern int clk_get_usecount(struct clk *clk); #define CLOCK_IN_OMAP242X (1 << 25) #define CLOCK_IN_OMAP243X (1 << 26) +/* CM_CLKSEL2_PLL.CORE_CLK_SRC options (24XX) */ +#define CORE_CLK_SRC_32K 0 +#define CORE_CLK_SRC_DPLL 1 +#define CORE_CLK_SRC_DPLL_X2 2 + #endif diff --git a/include/asm-arm/arch-omap/entry-macro.S b/include/asm-arm/arch-omap/entry-macro.S index f6967c8df323..74cd57221c8e 100644 --- a/include/asm-arm/arch-omap/entry-macro.S +++ b/include/asm-arm/arch-omap/entry-macro.S @@ -68,7 +68,7 @@ .endm .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =VA_IC_BASE + ldr \base, =OMAP2_VA_IC_BASE ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ cmp \irqnr, #0x0 bne 2222f diff --git a/include/asm-arm/arch-omap/io.h b/include/asm-arm/arch-omap/io.h index 289082d07f14..160578e1f557 100644 --- a/include/asm-arm/arch-omap/io.h +++ b/include/asm-arm/arch-omap/io.h @@ -80,6 +80,13 @@ #define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE /* 0x49000000 */ #define OMAP243X_GPMC_VIRT 0xFE000000 #define OMAP243X_GPMC_SIZE SZ_1M +#define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE +#define OMAP243X_SDRC_VIRT 0xFD000000 +#define OMAP243X_SDRC_SIZE SZ_1M +#define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE +#define OMAP243X_SMS_VIRT 0xFC000000 +#define OMAP243X_SMS_SIZE SZ_1M + #endif #define IO_OFFSET 0x90000000 @@ -88,16 +95,73 @@ #define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */ /* DSP */ -#define DSP_MEM_24XX_PHYS OMAP24XX_DSP_MEM_BASE /* 0x58000000 */ +#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ #define DSP_MEM_24XX_VIRT 0xe0000000 #define DSP_MEM_24XX_SIZE 0x28000 -#define DSP_IPI_24XX_PHYS OMAP24XX_DSP_IPI_BASE /* 0x59000000 */ +#define DSP_IPI_24XX_PHYS OMAP2420_DSP_IPI_BASE /* 0x59000000 */ #define DSP_IPI_24XX_VIRT 0xe1000000 #define DSP_IPI_24XX_SIZE SZ_4K -#define DSP_MMU_24XX_PHYS OMAP24XX_DSP_MMU_BASE /* 0x5a000000 */ +#define DSP_MMU_24XX_PHYS OMAP2420_DSP_MMU_BASE /* 0x5a000000 */ #define DSP_MMU_24XX_VIRT 0xe2000000 #define DSP_MMU_24XX_SIZE SZ_4K +#elif defined(CONFIG_ARCH_OMAP3) + +/* We map both L3 and L4 on OMAP3 */ +#define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 */ +#define L3_34XX_VIRT 0xf8000000 +#define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */ + +#define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 */ +#define L4_34XX_VIRT 0xd8000000 +#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */ + +/* + * Need to look at the Size 4M for L4. + * VPOM3430 was not working for Int controller + */ + +#define L4_WK_34XX_PHYS L4_WK_34XX_BASE /* 0x48300000 */ +#define L4_WK_34XX_VIRT 0xd8300000 +#define L4_WK_34XX_SIZE SZ_1M + +#define L4_PER_34XX_PHYS L4_PER_34XX_BASE /* 0x49000000 */ +#define L4_PER_34XX_VIRT 0xd9000000 +#define L4_PER_34XX_SIZE SZ_1M + +#define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE /* 0x54000000 */ +#define L4_EMU_34XX_VIRT 0xe4000000 +#define L4_EMU_34XX_SIZE SZ_64M + +#define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE /* 0x6E000000 */ +#define OMAP34XX_GPMC_VIRT 0xFE000000 +#define OMAP34XX_GPMC_SIZE SZ_1M + +#define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE /* 0x6C000000 */ +#define OMAP343X_SMS_VIRT 0xFC000000 +#define OMAP343X_SMS_SIZE SZ_1M + +#define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE /* 0x6D000000 */ +#define OMAP343X_SDRC_VIRT 0xFD000000 +#define OMAP343X_SDRC_SIZE SZ_1M + + +#define IO_OFFSET 0x90000000 +#define IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ +#define io_p2v(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ +#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ + +/* DSP */ +#define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */ +#define DSP_MEM_34XX_VIRT 0xe0000000 +#define DSP_MEM_34XX_SIZE 0x28000 +#define DSP_IPI_34XX_PHYS OMAP34XX_DSP_IPI_BASE /* 0x59000000 */ +#define DSP_IPI_34XX_VIRT 0xe1000000 +#define DSP_IPI_34XX_SIZE SZ_4K +#define DSP_MMU_34XX_PHYS OMAP34XX_DSP_MMU_BASE /* 0x5a000000 */ +#define DSP_MMU_34XX_VIRT 0xe2000000 +#define DSP_MMU_34XX_SIZE SZ_4K + #endif #ifndef __ASSEMBLER__ diff --git a/include/asm-arm/arch-omap/omap24xx.h b/include/asm-arm/arch-omap/omap24xx.h index 14c0f9496579..b9fcaae287c8 100644 --- a/include/asm-arm/arch-omap/omap24xx.h +++ b/include/asm-arm/arch-omap/omap24xx.h @@ -1,3 +1,28 @@ +/* + * include/asm-arm/arch-omap/omap24xx.h + * + * This file contains the processor specific definitions + * of the TI OMAP24XX. + * + * Copyright (C) 2007 Texas Instruments. + * Copyright (C) 2007 Nokia Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + #ifndef __ASM_ARCH_OMAP24XX_H #define __ASM_ARCH_OMAP24XX_H @@ -13,33 +38,70 @@ /* interrupt controller */ #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000) -#define VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) #define OMAP24XX_IVA_INTC_BASE 0x40000000 #define IRQ_SIR_IRQ 0x0040 -#ifdef CONFIG_ARCH_OMAP2420 -#define OMAP24XX_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) -#define OMAP24XX_PRCM_BASE (L4_24XX_BASE + 0x8000) -#define OMAP24XX_SDRC_BASE (L3_24XX_BASE + 0x9000) -#define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8) -#endif +#define OMAP2420_CTRL_BASE L4_24XX_BASE +#define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) +#define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000) +#define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000) +#define OMAP2420_PRM_BASE OMAP2420_CM_BASE +#define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000) +#define OMAP2420_SMS_BASE 0x68008000 -#ifdef CONFIG_ARCH_OMAP2430 -#define OMAP24XX_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000) -#define OMAP24XX_PRCM_BASE (L4_WK_243X_BASE + 0x6000) -#define OMAP24XX_SDRC_BASE (0x6D000000) -#define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8) +#define OMAP2430_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000) +#define OMAP2430_PRCM_BASE (L4_WK_243X_BASE + 0x6000) +#define OMAP2430_CM_BASE (L4_WK_243X_BASE + 0x6000) +#define OMAP2430_PRM_BASE OMAP2430_CM_BASE + +#define OMAP243X_SMS_BASE 0x6C000000 +#define OMAP243X_SDRC_BASE 0x6D000000 #define OMAP243X_GPMC_BASE 0x6E000000 -#endif +#define OMAP243X_SCM_BASE (L4_WK_243X_BASE + 0x2000) +#define OMAP243X_CTRL_BASE OMAP243X_SCM_BASE +#define OMAP243X_HS_BASE (L4_24XX_BASE + 0x000ac000) /* DSP SS */ -#define OMAP24XX_DSP_BASE 0x58000000 -#define OMAP24XX_DSP_MEM_BASE (OMAP24XX_DSP_BASE + 0x0) -#define OMAP24XX_DSP_IPI_BASE (OMAP24XX_DSP_BASE + 0x1000000) -#define OMAP24XX_DSP_MMU_BASE (OMAP24XX_DSP_BASE + 0x2000000) +#define OMAP2420_DSP_BASE 0x58000000 +#define OMAP2420_DSP_MEM_BASE (OMAP2420_DSP_BASE + 0x0) +#define OMAP2420_DSP_IPI_BASE (OMAP2420_DSP_BASE + 0x1000000) +#define OMAP2420_DSP_MMU_BASE (OMAP2420_DSP_BASE + 0x2000000) + +#define OMAP243X_DSP_BASE 0x5C000000 +#define OMAP243X_DSP_MEM_BASE (OMAP243X_DSP_BASE + 0x0) +#define OMAP243X_DSP_MMU_BASE (OMAP243X_DSP_BASE + 0x1000000) /* Mailbox */ #define OMAP24XX_MAILBOX_BASE (L4_24XX_BASE + 0x94000) +/* Camera */ +#define OMAP24XX_CAMERA_BASE (L4_24XX_BASE + 0x52000) + +/* Security */ +#define OMAP24XX_SEC_BASE (L4_24XX_BASE + 0xA0000) +#define OMAP24XX_SEC_RNG_BASE (OMAP24XX_SEC_BASE + 0x0000) +#define OMAP24XX_SEC_DES_BASE (OMAP24XX_SEC_BASE + 0x2000) +#define OMAP24XX_SEC_SHA1MD5_BASE (OMAP24XX_SEC_BASE + 0x4000) +#define OMAP24XX_SEC_AES_BASE (OMAP24XX_SEC_BASE + 0x6000) +#define OMAP24XX_SEC_PKA_BASE (OMAP24XX_SEC_BASE + 0x8000) + +#if defined(CONFIG_ARCH_OMAP2420) + +#define OMAP2_32KSYNCT_BASE OMAP2420_32KSYNCT_BASE +#define OMAP2_PRCM_BASE OMAP2420_PRCM_BASE +#define OMAP2_CM_BASE OMAP2420_CM_BASE +#define OMAP2_PRM_BASE OMAP2420_PRM_BASE +#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) + +#elif defined(CONFIG_ARCH_OMAP2430) + +#define OMAP2_32KSYNCT_BASE OMAP2430_32KSYNCT_BASE +#define OMAP2_PRCM_BASE OMAP2430_PRCM_BASE +#define OMAP2_CM_BASE OMAP2430_CM_BASE +#define OMAP2_PRM_BASE OMAP2430_PRM_BASE +#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) + +#endif + #endif /* __ASM_ARCH_OMAP24XX_H */ -- cgit v1.2.3 From 6b8858a972a0eff1dc1ab77b0fd9fc25387c217c Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 18 Mar 2008 10:35:15 +0200 Subject: ARM: OMAP2: Change 24xx to use shared clock code and new reg access This patch changes 24xx to use shared clock code and new register access. Note that patch adds some temporary OLD_CK defines to keep patch more readable. These temporary defines will be removed in the next patch. Also not all clocks are changed in this patch to limit the size. Also, the patch fixes few incorrect clock defines in clock24xx.h. Signed-off-by: Paul Walmsley Signed-off-by: Tony Lindgren --- include/asm-arm/arch-omap/clock.h | 65 +++++++++++++++++++++++++++++++-------- 1 file changed, 53 insertions(+), 12 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h index fc7b80643852..ff0f94de2de9 100644 --- a/include/asm-arm/arch-omap/clock.h +++ b/include/asm-arm/arch-omap/clock.h @@ -14,6 +14,30 @@ #define __ARCH_ARM_OMAP_CLOCK_H struct module; +struct clk; + +#if defined(CONFIG_ARCH_OMAP2) + +struct clksel_rate { + u8 div; + u32 val; + u8 flags; +}; + +struct clksel { + struct clk *parent; + const struct clksel_rate *rates; +}; + +struct dpll_data { + void __iomem *mult_div1_reg; + u32 mult_mask; + u32 div1_mask; + void __iomem *div2_reg; + u32 div2_mask; +}; + +#endif struct clk { struct list_head node; @@ -25,8 +49,6 @@ struct clk { __u32 flags; void __iomem *enable_reg; __u8 enable_bit; - __u8 rate_offset; - __u8 src_offset; __s8 usecount; void (*recalc)(struct clk *); int (*set_rate)(struct clk *, unsigned long); @@ -34,6 +56,16 @@ struct clk { void (*init)(struct clk *); int (*enable)(struct clk *); void (*disable)(struct clk *); +#if defined(CONFIG_ARCH_OMAP2) + u8 fixed_div; + void __iomem *clksel_reg; + u32 clksel_mask; + const struct clksel *clksel; + const struct dpll_data *dpll_data; +#else + __u8 rate_offset; + __u8 src_offset; +#endif }; struct clk_functions { @@ -54,10 +86,12 @@ extern int clk_init(struct clk_functions * custom_clocks); extern int clk_register(struct clk *clk); extern void clk_unregister(struct clk *clk); extern void propagate_rate(struct clk *clk); +extern void recalculate_root_clocks(void); extern void followparent_recalc(struct clk * clk); extern void clk_allow_idle(struct clk *clk); extern void clk_deny_idle(struct clk *clk); extern int clk_get_usecount(struct clk *clk); +extern void clk_enable_init_clocks(void); /* Clock flags */ #define RATE_CKCTL (1 << 0) /* Main fixed ratio clocks */ @@ -71,22 +105,29 @@ extern int clk_get_usecount(struct clk *clk); #define CLOCK_NO_IDLE_PARENT (1 << 8) #define DELAYED_APP (1 << 9) /* Delay application of clock */ #define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */ -#define CM_MPU_SEL1 (1 << 11) /* Domain divider/source */ -#define CM_DSP_SEL1 (1 << 12) -#define CM_GFX_SEL1 (1 << 13) -#define CM_MODEM_SEL1 (1 << 14) -#define CM_CORE_SEL1 (1 << 15) /* Sets divider for many */ -#define CM_CORE_SEL2 (1 << 16) /* sets parent for GPT */ -#define CM_WKUP_SEL1 (1 << 17) -#define CM_PLL_SEL1 (1 << 18) -#define CM_PLL_SEL2 (1 << 19) -#define CM_SYSCLKOUT_SEL1 (1 << 20) +#define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */ +#define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */ +/* bits 13-20 are currently free */ #define CLOCK_IN_OMAP310 (1 << 21) #define CLOCK_IN_OMAP730 (1 << 22) #define CLOCK_IN_OMAP1510 (1 << 23) #define CLOCK_IN_OMAP16XX (1 << 24) #define CLOCK_IN_OMAP242X (1 << 25) #define CLOCK_IN_OMAP243X (1 << 26) +#define CLOCK_IN_OMAP343X (1 << 27) /* clocks common to all 343X */ +#define PARENT_CONTROLS_CLOCK (1 << 28) +#define CLOCK_IN_OMAP3430ES1 (1 << 29) /* 3430ES1 clocks only */ +#define CLOCK_IN_OMAP3430ES2 (1 << 30) /* 3430ES2 clocks only */ + +/* Clksel_rate flags */ +#define DEFAULT_RATE (1 << 0) +#define RATE_IN_242X (1 << 1) +#define RATE_IN_243X (1 << 2) +#define RATE_IN_343X (1 << 3) /* rates common to all 343X */ +#define RATE_IN_3430ES2 (1 << 4) /* 3430ES2 rates only */ + +#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) + /* CM_CLKSEL2_PLL.CORE_CLK_SRC options (24XX) */ #define CORE_CLK_SRC_32K 0 -- cgit v1.2.3 From b045d0809871eae4341e60a1db2b7d31703d8175 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 18 Mar 2008 11:24:28 +0200 Subject: ARM: OMAP2: Add 34xx clocks This patch defines 34xx clocks. Signed-off-by: Paul Walmsley Signed-off-by: Tony Lindgren --- include/asm-arm/arch-omap/clock.h | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h index ff0f94de2de9..0baa79acc0b7 100644 --- a/include/asm-arm/arch-omap/clock.h +++ b/include/asm-arm/arch-omap/clock.h @@ -16,7 +16,7 @@ struct module; struct clk; -#if defined(CONFIG_ARCH_OMAP2) +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) struct clksel_rate { u8 div; @@ -35,6 +35,13 @@ struct dpll_data { u32 div1_mask; void __iomem *div2_reg; u32 div2_mask; +# if defined(CONFIG_ARCH_OMAP3) + void __iomem *control_reg; + u32 enable_mask; + u8 auto_recal_bit; + u8 recal_en_bit; + u8 recal_st_bit; +# endif }; #endif @@ -56,7 +63,7 @@ struct clk { void (*init)(struct clk *); int (*enable)(struct clk *); void (*disable)(struct clk *); -#if defined(CONFIG_ARCH_OMAP2) +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) u8 fixed_div; void __iomem *clksel_reg; u32 clksel_mask; -- cgit v1.2.3 From 3760d31f11bfbd0ead9eaeb8573e0602437a9d7c Mon Sep 17 00:00:00 2001 From: Roman Tereshonkov Date: Thu, 13 Mar 2008 21:35:09 +0200 Subject: ARM: OMAP2: New DPLL clock framework These changes is the result of the discussion with Paul Walmsley. His ideas are included into this patch. Remove DPLL output divider handling from DPLLs and CLKOUTX2 clocks, and place it into specific DPLL output divider clocks (e.g., dpll3_m2_clk). omap2_get_dpll_rate() now returns the correct DPLL rate, as represented by the DPLL's CLKOUT output. Also add MPU and IVA2 subsystem clocks, along with high-frequency bypass support. Add support for DPLLs function in locked and bypass clock modes. Signed-off-by: Roman Tereshonkov Acked-by: Paul Walmsley Signed-off-by: Tony Lindgren --- include/asm-arm/arch-omap/clock.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h index 0baa79acc0b7..57523bdb642b 100644 --- a/include/asm-arm/arch-omap/clock.h +++ b/include/asm-arm/arch-omap/clock.h @@ -33,8 +33,6 @@ struct dpll_data { void __iomem *mult_div1_reg; u32 mult_mask; u32 div1_mask; - void __iomem *div2_reg; - u32 div2_mask; # if defined(CONFIG_ARCH_OMAP3) void __iomem *control_reg; u32 enable_mask; -- cgit v1.2.3