Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).

Required properties:

- compatible : Should be "fsl,<processor>-flexcan"

  An implementation should also claim any of the following compatibles
  that it is fully backwards compatible with:

  - fsl,p1010-flexcan

- reg : Offset and length of the register set for this device
- interrupts : Interrupt tuple for this device

Optional properties:

- clock-frequency : The oscillator frequency driving the flexcan device

- xceiver-supply: Regulator that powers the CAN transceiver
- stop-mode: register bits of stop mode control, the format is
  <&gpr req_gpr req_bit ack_gpr ack_bit>.
  gpr is the phandle to general purpose register node.
  req_gpr is the gpr register offset of CAN stop request.
  req_bit is the bit offset of CAN stop request.
  ack_gpr is the gpr register offset of CAN stop acknowledge.
  ack_bit is the bit offset of CAN stop acknowledge.
- trx_en_gpio : enable gpio
- trx_stby_gpio : standby gpio
- trx_nerr_gpio : NERR gpio
- disable-fd-mode : disable CAN FD mode support. Valid since i.MX8 series.
- clk-src : Selects the clock source to the CAN Protocol Engine (PE). It's SoC
	    Implementation dependent. Refer to RM for detailed definition.
	    0: clock source 0 1: clock source 1

Example:

	can@1c000 {
		compatible = "fsl,p1010-flexcan";
		reg = <0x1c000 0x1000>;
		interrupts = <48 0x2>;
		interrupt-parent = <&mpic>;
		clock-frequency = <200000000>; // filled in by bootloader
	};