#include / { pinmux: pinmux { status = "okay"; pinctrl-names = "default", "drive", "unused"; pinctrl-0 = <&pinmux_default>; pinctrl-1 = <&drive_default>; pinctrl-2 = <&pinmux_unused_lowpower>; pinmux_default: common { /* Analogue Audio (On-module) */ dap3_fs_pp0 { nvidia,pins = "dap3_fs_pp0"; nvidia,function = "i2s2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dap3_din_pp1 { nvidia,pins = "dap3_din_pp1"; nvidia,function = "i2s2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dap3_dout_pp2 { nvidia,pins = "dap3_dout_pp2"; nvidia,function = "i2s2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dap3_sclk_pp3 { nvidia,pins = "dap3_sclk_pp3"; nvidia,function = "i2s2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dap_mclk1_pw4 { nvidia,pins = "dap_mclk1_pw4"; nvidia,function = "extperiph1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis BKL1_ON */ pbb5 { nvidia,pins = "pbb5"; nvidia,function = "vgp5"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis BKL1_PWM */ pu6 { nvidia,pins = "pu6"; nvidia,function = "pwm3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis CAM1_MCLK */ cam_mclk_pcc0 { nvidia,pins = "cam_mclk_pcc0"; nvidia,function = "vi_alt3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis Digital Audio */ dap2_fs_pa2 { nvidia,pins = "dap2_fs_pa2"; nvidia,function = "hda"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dap2_sclk_pa3 { nvidia,pins = "dap2_sclk_pa3"; nvidia,function = "hda"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dap2_din_pa4 { nvidia,pins = "dap2_din_pa4"; nvidia,function = "hda"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dap2_dout_pa5 { nvidia,pins = "dap2_dout_pa5"; nvidia,function = "hda"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pbb3 { /* DAP1_RESET */ nvidia,pins = "pbb3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; clk3_out_pee0 { nvidia,pins = "clk3_out_pee0"; nvidia,function = "extperiph3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis GPIO */ usb_vbus_en0_pn4 { nvidia,pins = "usb_vbus_en0_pn4"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; nvidia,open-drain = ; }; usb_vbus_en1_pn5 { nvidia,pins = "usb_vbus_en1_pn5"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; nvidia,open-drain = ; }; pex_l0_rst_n_pdd1 { nvidia,pins = "pex_l0_rst_n_pdd1"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pex_l0_clkreq_n_pdd2 { nvidia,pins = "pex_l0_clkreq_n_pdd2"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pex_l1_rst_n_pdd5 { nvidia,pins = "pex_l1_rst_n_pdd5"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pex_l1_clkreq_n_pdd6 { nvidia,pins = "pex_l1_clkreq_n_pdd6"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dp_hpd_pff0 { nvidia,pins = "dp_hpd_pff0"; nvidia,function = "dp"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pff2 { nvidia,pins = "pff2"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; owr { /* PEX_L1_CLKREQ_N multiplexed GPIO6 */ nvidia,pins = "owr"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; nvidia,rcv-sel = ; }; /* Apalis HDMI1_CEC */ hdmi_cec_pee3 { nvidia,pins = "hdmi_cec_pee3"; nvidia,function = "cec"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; nvidia,open-drain = ; }; /* Apalis HDMI1_HPD */ hdmi_int_pn7 { nvidia,pins = "hdmi_int_pn7"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; nvidia,rcv-sel = ; }; /* Apalis I2C1 */ gen1_i2c_scl_pc4 { nvidia,pins = "gen1_i2c_scl_pc4"; nvidia,function = "i2c1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; nvidia,open-drain = ; }; gen1_i2c_sda_pc5 { nvidia,pins = "gen1_i2c_sda_pc5"; nvidia,function = "i2c1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; nvidia,open-drain = ; }; /* Apalis I2C3 (CAM) */ cam_i2c_scl_pbb1 { nvidia,pins = "cam_i2c_scl_pbb1"; nvidia,function = "i2c3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; nvidia,open-drain = ; }; cam_i2c_sda_pbb2 { nvidia,pins = "cam_i2c_sda_pbb2"; nvidia,function = "i2c3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; nvidia,open-drain = ; }; /* Apalis I2C4 (DDC) */ ddc_scl_pv4 { nvidia,pins = "ddc_scl_pv4"; nvidia,function = "i2c4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; nvidia,rcv-sel = ; }; ddc_sda_pv5 { nvidia,pins = "ddc_sda_pv5"; nvidia,function = "i2c4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; nvidia,rcv-sel = ; }; /* Apalis MMC1 */ sdmmc1_cd_n_pv3 { /* CD# GPIO */ nvidia,pins = "sdmmc1_wp_n_pv3"; nvidia,function = "sdmmc1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; clk2_out_pw5 { /* D5 GPIO */ nvidia,pins = "clk2_out_pw5"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc1_dat3_py4 { nvidia,pins = "sdmmc1_dat3_py4"; nvidia,function = "sdmmc1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc1_dat2_py5 { nvidia,pins = "sdmmc1_dat2_py5"; nvidia,function = "sdmmc1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc1_dat1_py6 { nvidia,pins = "sdmmc1_dat1_py6"; nvidia,function = "sdmmc1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc1_dat0_py7 { nvidia,pins = "sdmmc1_dat0_py7"; nvidia,function = "sdmmc1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc1_clk_pz0 { nvidia,pins = "sdmmc1_clk_pz0"; nvidia,function = "sdmmc1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc1_cmd_pz1 { nvidia,pins = "sdmmc1_cmd_pz1"; nvidia,function = "sdmmc1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; clk2_req_pcc5 { /* D4 GPIO */ nvidia,pins = "clk2_req_pcc5"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc3_clk_lb_in_pee5 { /* D6 GPIO */ nvidia,pins = "sdmmc3_clk_lb_in_pee5"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; usb_vbus_en2_pff1 { /* D7 GPIO */ nvidia,pins = "usb_vbus_en2_pff1"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis PWM */ ph0 { nvidia,pins = "ph0"; nvidia,function = "pwm0"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; ph1 { nvidia,pins = "ph1"; nvidia,function = "pwm1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; ph2 { nvidia,pins = "ph2"; nvidia,function = "pwm2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* PWM3 active on pu6 being Apalis BKL1_PWM as well */ ph3 { nvidia,pins = "ph3"; nvidia,function = "pwm3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis SATA1_ACT# */ dap1_dout_pn2 { nvidia,pins = "dap1_dout_pn2"; nvidia,function = "gmi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis SD1 */ sdmmc3_clk_pa6 { nvidia,pins = "sdmmc3_clk_pa6"; nvidia,function = "sdmmc3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc3_cmd_pa7 { nvidia,pins = "sdmmc3_cmd_pa7"; nvidia,function = "sdmmc3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc3_dat3_pb4 { nvidia,pins = "sdmmc3_dat3_pb4"; nvidia,function = "sdmmc3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc3_dat2_pb5 { nvidia,pins = "sdmmc3_dat2_pb5"; nvidia,function = "sdmmc3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc3_dat1_pb6 { nvidia,pins = "sdmmc3_dat1_pb6"; nvidia,function = "sdmmc3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc3_dat0_pb7 { nvidia,pins = "sdmmc3_dat0_pb7"; nvidia,function = "sdmmc3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc3_cd_n_pv2 { /* CD# GPIO */ nvidia,pins = "sdmmc3_cd_n_pv2"; nvidia,function = "rsvd3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis SPDIF */ spdif_out_pk5 { nvidia,pins = "spdif_out_pk5"; nvidia,function = "spdif"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; spdif_in_pk6 { nvidia,pins = "spdif_in_pk6"; nvidia,function = "spdif"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis SPI1 */ ulpi_clk_py0 { nvidia,pins = "ulpi_clk_py0"; nvidia,function = "spi1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; ulpi_dir_py1 { nvidia,pins = "ulpi_dir_py1"; nvidia,function = "spi1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; ulpi_nxt_py2 { nvidia,pins = "ulpi_nxt_py2"; nvidia,function = "spi1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; ulpi_stp_py3 { nvidia,pins = "ulpi_stp_py3"; nvidia,function = "spi1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis SPI2 */ pg5 { nvidia,pins = "pg5"; nvidia,function = "spi4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pg6 { nvidia,pins = "pg6"; nvidia,function = "spi4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pg7 { nvidia,pins = "pg7"; nvidia,function = "spi4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pi3 { nvidia,pins = "pi3"; nvidia,function = "spi4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis UART1 */ pb1 { /* DCD GPIO */ nvidia,pins = "pb1"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pk7 { /* RI GPIO */ nvidia,pins = "pk7"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; uart1_txd_pu0 { nvidia,pins = "pu0"; nvidia,function = "uarta"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; uart1_rxd_pu1 { nvidia,pins = "pu1"; nvidia,function = "uarta"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; uart1_cts_n_pu2 { nvidia,pins = "pu2"; nvidia,function = "uarta"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; uart1_rts_n_pu3 { nvidia,pins = "pu3"; nvidia,function = "uarta"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; uart3_cts_n_pa1 { /* DSR GPIO */ nvidia,pins = "uart3_cts_n_pa1"; nvidia,function = "gmi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; uart3_rts_n_pc0 { /* DTR GPIO */ nvidia,pins = "uart3_rts_n_pc0"; nvidia,function = "gmi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis UART2 */ uart2_txd_pc2 { nvidia,pins = "uart2_txd_pc2"; nvidia,function = "irda"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; uart2_rxd_pc3 { nvidia,pins = "uart2_rxd_pc3"; nvidia,function = "irda"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; uart2_cts_n_pj5 { nvidia,pins = "uart2_cts_n_pj5"; nvidia,function = "uartb"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; uart2_rts_n_pj6 { nvidia,pins = "uart2_rts_n_pj6"; nvidia,function = "uartb"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis UART3 */ uart3_txd_pw6 { nvidia,pins = "uart3_txd_pw6"; nvidia,function = "uartc"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; uart3_rxd_pw7 { nvidia,pins = "uart3_rxd_pw7"; nvidia,function = "uartc"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis UART4 */ uart4_rxd_pb0 { nvidia,pins = "pb0"; nvidia,function = "uartd"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; uart4_txd_pj7 { nvidia,pins = "pj7"; nvidia,function = "uartd"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis USBH_EN */ gen2_i2c_sda_pt6 { nvidia,pins = "gen2_i2c_sda_pt6"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; nvidia,open-drain = ; }; /* Apalis USBH_OC# */ pbb0 { nvidia,pins = "pbb0"; nvidia,function = "vgp6"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis USBO1_EN */ gen2_i2c_scl_pt5 { nvidia,pins = "gen2_i2c_scl_pt5"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; nvidia,open-drain = ; }; /* Apalis USBO1_OC# */ pbb4 { nvidia,pins = "pbb4"; nvidia,function = "vgp4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Apalis WAKE1_MICO */ pex_wake_n_pdd3 { nvidia,pins = "pex_wake_n_pdd3"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* CORE_PWR_REQ */ core_pwr_req { nvidia,pins = "core_pwr_req"; nvidia,function = "pwron"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* CPU_PWR_REQ */ cpu_pwr_req { nvidia,pins = "cpu_pwr_req"; nvidia,function = "cpu"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* DVFS */ dvfs_pwm_px0 { nvidia,pins = "dvfs_pwm_px0"; nvidia,function = "cldvfs"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dvfs_clk_px2 { nvidia,pins = "dvfs_clk_px2"; nvidia,function = "cldvfs"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* eMMC */ sdmmc4_dat0_paa0 { nvidia,pins = "sdmmc4_dat0_paa0"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc4_dat1_paa1 { nvidia,pins = "sdmmc4_dat1_paa1"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc4_dat2_paa2 { nvidia,pins = "sdmmc4_dat2_paa2"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc4_dat3_paa3 { nvidia,pins = "sdmmc4_dat3_paa3"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc4_dat4_paa4 { nvidia,pins = "sdmmc4_dat4_paa4"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc4_dat5_paa5 { nvidia,pins = "sdmmc4_dat5_paa5"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc4_dat6_paa6 { nvidia,pins = "sdmmc4_dat6_paa6"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc4_dat7_paa7 { nvidia,pins = "sdmmc4_dat7_paa7"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc4_clk_pcc4 { nvidia,pins = "sdmmc4_clk_pcc4"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; sdmmc4_cmd_pt7 { nvidia,pins = "sdmmc4_cmd_pt7"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* JTAG_RTCK */ jtag_rtck { nvidia,pins = "jtag_rtck"; nvidia,function = "rtck"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* LAN_DEV_OFF# */ ulpi_data5_po6 { nvidia,pins = "ulpi_data5_po6"; nvidia,function = "ulpi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* LAN_RESET# */ kb_row10_ps2 { nvidia,pins = "kb_row10_ps2"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* LAN_WAKE# */ ulpi_data4_po5 { nvidia,pins = "ulpi_data4_po5"; nvidia,function = "ulpi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* MCU_INT1# */ pk2 { nvidia,pins = "pk2"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* MCU_INT2# */ pj2 { nvidia,pins = "pj2"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* MCU_INT3# */ pi5 { nvidia,pins = "pi5"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* MCU_INT4# */ pj0 { nvidia,pins = "pj0"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* MCU_RESET */ pbb6 { nvidia,pins = "pbb6"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* MCU SPI */ gpio_x4_aud_px4 { nvidia,pins = "gpio_x4_aud_px4"; nvidia,function = "spi2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; gpio_x5_aud_px5 { nvidia,pins = "gpio_x5_aud_px5"; nvidia,function = "spi2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; gpio_x6_aud_px6 { /* MCU_CS */ nvidia,pins = "gpio_x6_aud_px6"; nvidia,function = "spi2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; gpio_x7_aud_px7 { nvidia,pins = "gpio_x7_aud_px7"; nvidia,function = "spi2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; gpio_w2_aud_pw2 { /* MCU_CSEZP */ nvidia,pins = "gpio_w2_aud_pw2"; nvidia,function = "spi2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* PMIC_CLK_32K */ clk_32k_in { nvidia,pins = "clk_32k_in"; nvidia,function = "clk"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* PMIC_CPU_OC_INT */ clk_32k_out_pa0 { nvidia,pins = "clk_32k_out_pa0"; nvidia,function = "soc"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* PWR_I2C */ pwr_i2c_scl_pz6 { nvidia,pins = "pwr_i2c_scl_pz6"; nvidia,function = "i2cpwr"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; nvidia,open-drain = ; }; pwr_i2c_sda_pz7 { nvidia,pins = "pwr_i2c_sda_pz7"; nvidia,function = "i2cpwr"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; nvidia,open-drain = ; }; /* PWR_INT_N */ pwr_int_n { nvidia,pins = "pwr_int_n"; nvidia,function = "pmi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* RESET_MOCI_CTRL */ pu4 { nvidia,pins = "pu4"; nvidia,function = "gmi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* RESET_OUT_N */ reset_out_n { nvidia,pins = "reset_out_n"; nvidia,function = "reset_out_n"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* SHIFT_CTRL_DIR_IN */ kb_row0_pr0 { nvidia,pins = "kb_row0_pr0"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_row1_pr1 { nvidia,pins = "kb_row1_pr1"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* Configure level-shifter as output for HDA */ kb_row11_ps3 { nvidia,pins = "kb_row11_ps3"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* SHIFT_CTRL_DIR_OUT */ kb_col5_pq5 { nvidia,pins = "kb_col5_pq5"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_col6_pq6 { nvidia,pins = "kb_col6_pq6"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_col7_pq7 { nvidia,pins = "kb_col7_pq7"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* SHIFT_CTRL_OE */ kb_col0_pq0 { nvidia,pins = "kb_col0_pq0"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_col1_pq1 { nvidia,pins = "kb_col1_pq1"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_col2_pq2 { nvidia,pins = "kb_col2_pq2"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_col4_pq4 { nvidia,pins = "kb_col4_pq4"; nvidia,function = "kbc"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_row2_pr2 { nvidia,pins = "kb_row2_pr2"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* GPIO_PI6 aka TMP451 ALERT#/THERM2# */ pi6 { nvidia,pins = "pi6"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* TOUCH_INT */ gpio_w3_aud_pw3 { nvidia,pins = "gpio_w3_aud_pw3"; nvidia,function = "spi6"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pc7 { /* NC */ nvidia,pins = "pc7"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pg0 { /* NC */ nvidia,pins = "pg0"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pg1 { /* NC */ nvidia,pins = "pg1"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pg2 { /* NC */ nvidia,pins = "pg2"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pg3 { /* NC */ nvidia,pins = "pg3"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pg4 { /* NC */ nvidia,pins = "pg4"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; ph4 { /* NC */ nvidia,pins = "ph4"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; ph5 { /* NC */ nvidia,pins = "ph5"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; ph6 { /* NC */ nvidia,pins = "ph6"; nvidia,function = "gmi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; ph7 { /* NC */ nvidia,pins = "ph7"; nvidia,function = "gmi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pi0 { /* NC */ nvidia,pins = "pi0"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pi1 { /* NC */ nvidia,pins = "pi1"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pi2 { /* NC */ nvidia,pins = "pi2"; nvidia,function = "rsvd4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pi4 { /* NC */ nvidia,pins = "pi4"; nvidia,function = "gmi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pi7 { /* NC */ nvidia,pins = "pi7"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pk0 { /* NC */ nvidia,pins = "pk0"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pk1 { /* NC */ nvidia,pins = "pk1"; nvidia,function = "rsvd4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pk3 { /* NC */ nvidia,pins = "pk3"; nvidia,function = "gmi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pk4 { /* NC */ nvidia,pins = "pk4"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dap1_fs_pn0 { /* NC */ nvidia,pins = "dap1_fs_pn0"; nvidia,function = "rsvd4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dap1_din_pn1 { /* NC */ nvidia,pins = "dap1_din_pn1"; nvidia,function = "rsvd4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dap1_sclk_pn3 { /* NC */ nvidia,pins = "dap1_sclk_pn3"; nvidia,function = "rsvd4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; ulpi_data7_po0 { /* NC */ nvidia,pins = "ulpi_data7_po0"; nvidia,function = "ulpi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; ulpi_data0_po1 { /* NC */ nvidia,pins = "ulpi_data0_po1"; nvidia,function = "ulpi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; ulpi_data1_po2 { /* NC */ nvidia,pins = "ulpi_data1_po2"; nvidia,function = "ulpi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; ulpi_data2_po3 { /* NC */ nvidia,pins = "ulpi_data2_po3"; nvidia,function = "ulpi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; ulpi_data3_po4 { /* NC */ nvidia,pins = "ulpi_data3_po4"; nvidia,function = "ulpi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; ulpi_data6_po7 { /* NC */ nvidia,pins = "ulpi_data6_po7"; nvidia,function = "ulpi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dap4_fs_pp4 { /* NC */ nvidia,pins = "dap4_fs_pp4"; nvidia,function = "rsvd4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dap4_din_pp5 { /* NC */ nvidia,pins = "dap4_din_pp5"; nvidia,function = "rsvd3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dap4_dout_pp6 { /* NC */ nvidia,pins = "dap4_dout_pp6"; nvidia,function = "rsvd4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dap4_sclk_pp7 { /* NC */ nvidia,pins = "dap4_sclk_pp7"; nvidia,function = "rsvd3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_col3_pq3 { /* NC */ nvidia,pins = "kb_col3_pq3"; nvidia,function = "kbc"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_row3_pr3 { /* NC */ nvidia,pins = "kb_row3_pr3"; nvidia,function = "kbc"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_row4_pr4 { /* NC */ nvidia,pins = "kb_row4_pr4"; nvidia,function = "rsvd3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_row5_pr5 { /* NC */ nvidia,pins = "kb_row5_pr5"; nvidia,function = "rsvd3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_row6_pr6 { /* NC */ nvidia,pins = "kb_row6_pr6"; nvidia,function = "kbc"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_row7_pr7 { /* NC */ nvidia,pins = "kb_row7_pr7"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_row8_ps0 { /* NC */ nvidia,pins = "kb_row8_ps0"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_row9_ps1 { /* NC */ nvidia,pins = "kb_row9_ps1"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_row12_ps4 { /* NC */ nvidia,pins = "kb_row12_ps4"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_row13_ps5 { /* NC */ nvidia,pins = "kb_row13_ps5"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_row14_ps6 { /* NC */ nvidia,pins = "kb_row14_ps6"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_row15_ps7 { /* NC */ nvidia,pins = "kb_row15_ps7"; nvidia,function = "rsvd3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_row16_pt0 { /* NC */ nvidia,pins = "kb_row16_pt0"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; kb_row17_pt1 { /* NC */ nvidia,pins = "kb_row17_pt1"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pu5 { /* NC */ nvidia,pins = "pu5"; nvidia,function = "gmi"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* * PCB Version Indication: V1.2 and later have GPIO_PV0 * wired to GND, was NC before */ pv0 { nvidia,pins = "pv0"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pv1 { /* NC */ nvidia,pins = "pv1"; nvidia,function = "rsvd1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; gpio_x1_aud_px1 { /* NC */ nvidia,pins = "gpio_x1_aud_px1"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; gpio_x3_aud_px3 { /* NC */ nvidia,pins = "gpio_x3_aud_px3"; nvidia,function = "rsvd4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pbb7 { /* NC */ nvidia,pins = "pbb7"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pcc1 { /* NC */ nvidia,pins = "pcc1"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pcc2 { /* NC */ nvidia,pins = "pcc2"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; clk3_req_pee1 { /* NC */ nvidia,pins = "clk3_req_pee1"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; dap_mclk1_req_pee2 { /* NC */ nvidia,pins = "dap_mclk1_req_pee2"; nvidia,function = "rsvd4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* * Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output * driver enabled aka not tristated and input driver * enabled as well as it features some magic properties * even though the external loopback is disabled and the * internal loopback used as per * SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 * bits being set to 0xfffd according to the TRM! */ sdmmc3_clk_lb_out_pee4 { /* NC */ nvidia,pins = "sdmmc3_clk_lb_out_pee4"; nvidia,function = "sdmmc3"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; }; /* TBD */ pinmux_unused_lowpower: unused_lowpower { dap1_din_pn1 { nvidia,pins = "dap1_din_pn1"; nvidia,function = "rsvd4"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; }; drive_default: drive { drive_sdio1 { nvidia,pins = "drive_sdio1"; nvidia,high-speed-mode = ; nvidia,schmitt = ; nvidia,pull-down-strength = <32>; nvidia,pull-up-strength = <42>; nvidia,slew-rate-rising = ; nvidia,slew-rate-falling = ; }; drive_sdio3 { nvidia,pins = "drive_sdio3"; nvidia,high-speed-mode = ; nvidia,schmitt = ; nvidia,pull-down-strength = <20>; nvidia,pull-up-strength = <36>; nvidia,slew-rate-rising = ; nvidia,slew-rate-falling = ; }; drive_gma { nvidia,pins = "drive_gma"; nvidia,high-speed-mode = ; nvidia,schmitt = ; nvidia,pull-down-strength = <1>; nvidia,pull-up-strength = <2>; nvidia,slew-rate-rising = ; nvidia,slew-rate-falling = ; nvidia,drive-type = <1>; }; }; }; };