/*
 * Copyright 2017 NXP
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include "fsl-imx8mq-evk.dts"

&hdmi {
	status = "disabled";
};

&dcss {
	status = "okay";
	disp-dev = "mipi_disp";

	clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
		 <&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
		 <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>,
		 <&clk IMX8MQ_CLK_DC_PIXEL_DIV>,
		 <&clk IMX8MQ_CLK_DUMMY>,
		 <&clk IMX8MQ_CLK_DISP_DTRC_DIV>;
	clock-names = "apb", "axi", "rtrm", "pix_div", "pix_out", "dtrc";
	assigned-clocks = <&clk IMX8MQ_CLK_DC_PIXEL_SRC>,
			  <&clk IMX8MQ_CLK_DISP_AXI_SRC>,
			  <&clk IMX8MQ_CLK_DISP_RTRM_SRC>,
			  <&clk IMX8MQ_CLK_DISP_RTRM_PRE_DIV>;
	assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
				 <&clk IMX8MQ_SYS1_PLL_800M>,
				 <&clk IMX8MQ_SYS1_PLL_800M>;
	assigned-clock-rates = <594000000>,
			       <800000000>,
			       <400000000>,
			       <400000000>;

	dcss_disp0: port@0 {
		reg = <0>;

		dcss_disp0_mipi_dsi: mipi_dsi {
			remote-endpoint = <&mipi_dsi_in>;
		};
	};
};

&i2c1 {
	adv_bridge: adv7535@3d {
		compatible = "adi,adv7533";
		reg = <0x3d>;
		adi,addr-cec = <0x3b>;
		adi,dsi-lanes = <4>;
		status = "okay";

		port {
			adv7535_in: endpoint {
				remote-endpoint = <&mipi_dsi_bridge_adv>;
			};
		};
	};
};

&mipi_dsi_phy {
	status = "okay";
};

&mipi_dsi {
	status = "okay";

	port@1 {
		mipi_dsi_in: endpoint {
			remote-endpoint = <&dcss_disp0_mipi_dsi>;
		};
	};

};

&mipi_dsi_bridge {
	status = "okay";

	port@1 {
		mipi_dsi_bridge_adv: endpoint {
			remote-endpoint = <&adv7535_in>;
		};
	};
};