summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
blob: 53e6c175db6c03121fdd6e899868dcb4e2f6c1e3 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
* Renesas SH-Mobile Serial Communication Interface

Required properties:

  - compatible: Must contain one of the following:

    - "renesas,scif-r8a7790" for R8A7790 (R-Car H2) SCIF compatible UART.
    - "renesas,scifa-r8a7790" for R8A7790 (R-Car H2) SCIFA compatible UART.
    - "renesas,scifb-r8a7790" for R8A7790 (R-Car H2) SCIFB compatible UART.
    - "renesas,hscif-r8a7790" for R8A7790 (R-Car H2) HSCIF compatible UART.
    - "renesas,scif-r8a7791" for R8A7791 (R-Car M2) SCIF compatible UART.
    - "renesas,scifa-r8a7791" for R8A7791 (R-Car M2) SCIFA compatible UART.
    - "renesas,scifb-r8a7791" for R8A7791 (R-Car M2) SCIFB compatible UART.
    - "renesas,hscif-r8a7791" for R8A7791 (R-Car M2) HSCIF compatible UART.
    - "renesas,scif" for generic SCIF compatible UART.
    - "renesas,scifa" for generic SCIFA compatible UART.
    - "renesas,scifb" for generic SCIFB compatible UART.
    - "renesas,hscif" for generic HSCIF compatible UART.

    When compatible with the generic version, nodes must list the
    SoC-specific version corresponding to the platform first followed by the
    generic version.

  - reg: Base address and length of the I/O registers used by the UART.
  - interrupts: Must contain an interrupt-specifier for the SCIx interrupt.

  - clocks: Must contain a phandle and clock-specifier pair for each entry
    in clock-names.
  - clock-names: Must contain "sci_ick" for the SCIx UART interface clock.

Note: Each enabled SCIx UART should have an alias correctly numbered in the
"aliases" node.

Example:
	aliases {
		serial0 = &scifa0;
	};

	scifa0: serial@e6c40000 {
		compatible = "renesas,scifa-r8a7790", "renesas,scifa";
		reg = <0 0xe6c40000 0 64>;
		interrupt-parent = <&gic>;
		interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;
		clock-names = "sci_ick";
	};