arch/arm/boot/dts/imx6qp-sabreauto.dts


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92

// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright 2016 Freescale Semiconductor, Inc.
// Copyright 2020 NXP

/dts-v1/;

#include "imx6qp.dtsi"
#include "imx6qdl-sabreauto.dtsi"

/ {
	model = "Freescale i.MX6 Quad Plus SABRE Automotive Board";
	compatible = "fsl,imx6qp-sabreauto", "fsl,imx6qp";
};

&pre1 {
	status = "okay";
};

&pre2 {
	status = "okay";
};

&pre3 {
	status = "okay";
};

&pre4 {
	status = "okay";
};

&prg1 {
	memory-region = <&memory>;
	status = "okay";
};

&prg2 {
	memory-region = <&memory>;
	status = "okay";
};

&mxcfb1 {
	prefetch;
	status = "okay";
};

&mxcfb2 {
	prefetch;
	status = "okay";
};

&mxcfb3 {
	prefetch;
	status = "okay";
};

&mxcfb4 {
	prefetch;
	status = "okay";
};

&ldb {
	lvds-channel@0 {
		crtc = "ipu2-di0";
	};

	lvds-channel@1 {
		crtc = "ipu2-di1";
	};
};

&i2c2 {
	max7322: gpio@68 {
		compatible = "maxim,max7322";
		reg = <0x68>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&pcie {
	reset-gpio = <&max7310_c 5 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&sata {
	status = "okay";
};

&vgen3_reg {
	regulator-always-on;
};