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/*
* arch/arm/boot/dts/panel-p-wuxga-10-1.dtsi
*
* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
#include <dt-bindings/display/tegra-dc.h>
#include <dt-bindings/display/tegra-panel.h>
/ {
host1x {
dsi {
panel-p-wuxga-10-1 {
status = "okay";
compatible = "p,wuxga-10-1";
nvidia,dsi-instance = <DSI_INSTANCE_0>;
nvidia,dsi-n-data-lanes = <4>;
nvidia,dsi-pixel-format = <TEGRA_DSI_PIXEL_FORMAT_24BIT_P>;
nvidia,dsi-refresh-rate = <60>;
nvidia,dsi-video-data-type = <TEGRA_DSI_VIDEO_TYPE_VIDEO_MODE>;
nvidia,dsi-video-clock-mode = <TEGRA_DSI_VIDEO_CLOCK_TX_ONLY>;
nvidia,dsi-video-burst-mode = <TEGRA_DSI_VIDEO_NONE_BURST_MODE_WITH_SYNC_END>;
nvidia,dsi-virtual-channel = <TEGRA_DSI_VIRTUAL_CHANNEL_0>;
nvidia,dsi-panel-reset = <TEGRA_DSI_ENABLE>;
nvidia,dsi-power-saving-suspend = <TEGRA_DSI_ENABLE>;
nvidia,dsi-pkt-seq =
<CMD_VS LEN_SHORT CMD_BLNK LEN_HSYNC CMD_HE LEN_SHORT PKT_LP LINE_STOP>,
<CMD_VE LEN_SHORT CMD_BLNK LEN_HSYNC CMD_HE LEN_SHORT PKT_LP LINE_STOP>,
<CMD_HS LEN_SHORT CMD_BLNK LEN_HSYNC CMD_HE LEN_SHORT PKT_LP LINE_STOP>,
<CMD_HS LEN_SHORT CMD_BLNK LEN_HSYNC CMD_HE LEN_SHORT CMD_BLNK LEN_HBP CMD_RGB_24BPP LEN_HACTIVE3 CMD_BLNK LEN_HFP LINE_STOP>,
<CMD_HS LEN_SHORT CMD_BLNK LEN_HSYNC CMD_HE LEN_SHORT PKT_LP LINE_STOP>,
<CMD_HS LEN_SHORT CMD_BLNK LEN_HSYNC CMD_HE LEN_SHORT CMD_BLNK LEN_HBP CMD_RGB_24BPP LEN_HACTIVE3 CMD_BLNK LEN_HFP LINE_STOP>;
disp-default-out {
nvidia,out-type = <TEGRA_DC_OUT_DSI>;
nvidia,out-width = <217>;
nvidia,out-height = <135>;
nvidia,out-flags = <TEGRA_DC_OUT_CONTINUOUS_MODE>;
nvidia,out-parent-clk = "pll_d_out0";
nvidia,out-xres = <1920>;
nvidia,out-yres = <1200>;
};
display-timings {
1920x1200-32 {
clock-frequency = <154700000>;
hactive = <1920>;
vactive = <1200>;
hfront-porch = <120>;
hback-porch = <32>;
hsync-len = <16>;
vfront-porch = <17>;
vback-porch = <16>;
vsync-len = <2>;
nvidia,h-ref-to-sync = <4>;
nvidia,v-ref-to-sync = <1>;
};
};
smartdimmer {
status = "okay";
nvidia,use-auto-pwm = <0>;
nvidia,hw-update-delay = <0>;
nvidia,bin-width = <0xffffffff>;
nvidia,aggressiveness = <5>;
nvidia,use-vid-luma = <0>;
nvidia,phase-in-settings = <0>;
nvidia,phase-in-adjustments = <0>;
nvidia,k-limit-enable = <1>;
nvidia,k-limit = <200>;
nvidia,sd-window-enable = <0>;
nvidia,soft-clipping-enable= <1>;
nvidia,soft-clipping-threshold = <128>;
nvidia,smooth-k-enable = <1>;
nvidia,smooth-k-incr = <4>;
nvidia,coeff = <5 9 2>;
nvidia,fc = <0 0>;
nvidia,blp = <1024 255>;
nvidia,bltf = <57 65 73 82
92 103 114 125
138 150 164 178
193 208 224 241>;
nvidia,lut = <255 255 255
199 199 199
153 153 153
116 116 116
85 85 85
59 59 59
36 36 36
17 17 17
0 0 0>;
nvidia,use-vpulse2 = <1>;
nvidia,bl-device-name = "pwm-backlight";
};
cmu {
nvidia,cmu-csc = < 0x138 0x3ba 0x00d
0x3f5 0x120 0x3e6
0x3fe 0x3f8 0x0e9 >;
nvidia,cmu-lut2 = < 0 1 2 3 4 5 6 6
7 8 9 10 11 11 12 13
13 14 15 15 16 17 17 18
18 19 19 20 20 21 21 22
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246 246 246 247 247 247 247 248
248 248 248 248 249 249 249 249
250 250 250 250 251 251 251 251
251 252 252 252 253 253 253 253
254 254 254 254 255 255 255 255 >;
};
};
};
};
};
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