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/*
* arch/arm/mach-tegra/board-bonaire-sdhci.c
*
* Copyright (C) 2010 Google, Inc.
* Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/resource.h>
#include <linux/platform_device.h>
#include <linux/wlan_plat.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/mmc/host.h>
#include <linux/platform_data/mmc-sdhci-tegra.h>
#include <asm/mach-types.h>
#include <mach/irqs.h>
#include <mach/hardware.h>
#include "gpio-names.h"
#include "board.h"
#include "iomap.h"
#define BONAIRE_SD_CD TEGRA_GPIO_PV2
#define BONAIRE_SD_WP TEGRA_GPIO_PQ4
static struct resource sdhci_resource0[] = {
[0] = {
.start = INT_SDMMC1,
.end = INT_SDMMC1,
.flags = IORESOURCE_IRQ,
},
[1] = {
.start = TEGRA_SDMMC1_BASE,
.end = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
.flags = IORESOURCE_MEM,
},
};
static struct resource sdhci_resource1[] = {
[0] = {
.start = INT_SDMMC2,
.end = INT_SDMMC2,
.flags = IORESOURCE_IRQ,
},
[1] = {
.start = TEGRA_SDMMC2_BASE,
.end = TEGRA_SDMMC2_BASE + TEGRA_SDMMC1_SIZE-1,
.flags = IORESOURCE_MEM,
},
};
static struct resource sdhci_resource2[] = {
[0] = {
.start = INT_SDMMC3,
.end = INT_SDMMC3,
.flags = IORESOURCE_IRQ,
},
[1] = {
.start = TEGRA_SDMMC3_BASE,
.end = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
.flags = IORESOURCE_MEM,
},
};
static struct resource sdhci_resource3[] = {
[0] = {
.start = INT_SDMMC4,
.end = INT_SDMMC4,
.flags = IORESOURCE_IRQ,
},
[1] = {
.start = TEGRA_SDMMC4_BASE,
.end = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
.flags = IORESOURCE_MEM,
},
};
static struct tegra_sdhci_platform_data tegra_sdhci_platform_data0 = {
.cd_gpio = -1,
.wp_gpio = -1,
.power_gpio = -1,
.disable_clock_gate = true,
/* .max_clk = 12000000, */
};
static struct tegra_sdhci_platform_data tegra_sdhci_platform_data1 = {
.cd_gpio = -1,
.wp_gpio = -1,
.power_gpio = -1,
/* .max_clk = 12000000, */
};
static struct tegra_sdhci_platform_data tegra_sdhci_platform_data2 = {
.cd_gpio = BONAIRE_SD_CD,
.wp_gpio = BONAIRE_SD_WP,
.power_gpio = -1,
/* .max_clk = 12000000, */
};
static struct tegra_sdhci_platform_data tegra_sdhci_platform_data3 = {
.cd_gpio = -1,
.wp_gpio = -1,
.power_gpio = -1,
.is_8bit = 1,
/* .max_clk = 12000000, */
};
static struct platform_device tegra_sdhci_device0 = {
.name = "sdhci-tegra",
.id = 0,
.resource = sdhci_resource0,
.num_resources = ARRAY_SIZE(sdhci_resource0),
.dev = {
.platform_data = &tegra_sdhci_platform_data0,
},
};
static struct platform_device tegra_sdhci_device1 = {
.name = "sdhci-tegra",
.id = 1,
.resource = sdhci_resource1,
.num_resources = ARRAY_SIZE(sdhci_resource1),
.dev = {
.platform_data = &tegra_sdhci_platform_data1,
},
};
static struct platform_device tegra_sdhci_device2 = {
.name = "sdhci-tegra",
.id = 2,
.resource = sdhci_resource2,
.num_resources = ARRAY_SIZE(sdhci_resource2),
.dev = {
.platform_data = &tegra_sdhci_platform_data2,
},
};
static struct platform_device tegra_sdhci_device3 = {
.name = "sdhci-tegra",
.id = 3,
.resource = sdhci_resource3,
.num_resources = ARRAY_SIZE(sdhci_resource3),
.dev = {
.platform_data = &tegra_sdhci_platform_data3,
},
};
int __init bonaire_sdhci_init(void)
{
if (tegra_cpu_is_asim()) {
tegra_sdhci_platform_data0.mmc_data.built_in = 1;
tegra_sdhci_platform_data1.mmc_data.built_in = 1;
tegra_sdhci_platform_data2.mmc_data.built_in = 1;
tegra_sdhci_platform_data3.mmc_data.built_in = 1;
}
platform_device_register(&tegra_sdhci_device3);
platform_device_register(&tegra_sdhci_device2);
return 0;
}
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