blob: 9e4c8e0e77b954f4e349f5b26e5d9cec75eb0b39 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
|
/*
* Copyright 2018 NXP
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "fsl-imx8qm-mek.dts"
&iomuxc {
imx8qm-mek {
pinctrl_mipi_csi0: mipicsi0grp{
fsl,pins = <
SC_P_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT 0xC0000041
>;
};
};
};
&isi_0 {
status = "okay";
};
&isi_1 {
status = "disabled";
};
&isi_2 {
status = "disabled";
};
&isi_3 {
status = "disabled";
};
&i2c0_mipi_csi0 {
clock-frequency = <100000>;
status = "okay";
ov5640_mipi: ov5640_mipi@3c {
compatible = "ovti,ov5640_mipi_v3";
reg = <0x3c>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mipi_csi0>;
clocks = <&clk IMX8QM_CLK_DUMMY>;
clock-names = "csi_mclk";
csi_id = <0>;
pwn-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
rst-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
mclk = <24000000>;
mclk_source = <0>;
mipi_csi;
status = "okay";
port {
ov5640_mipi_ep: endpoint {
remote-endpoint = <&mipi_csi0_ep>;
};
};
};
max9286_mipi@6A {
status = "disabled";
};
};
&mipi_csi_0 {
/delete-property/virtual-channel;
status = "okay";
port@0 {
reg = <0>;
mipi_csi0_ep: endpoint {
remote-endpoint = <&ov5640_mipi_ep>;
data-lanes = <1 2>;
};
};
};
|