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path: root/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2018 Linaro Ltd.
 */

/dts-v1/;
#include "rk3399-rock960.dtsi"

/ {
	model = "96boards Rock960";
	compatible = "vamrs,rock960", "rockchip,rk3399";

	chosen {
		stdout-path = "serial2:1500000n8";
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&user_led1>, <&user_led2>, <&user_led3>,
			    <&user_led4>, <&wlan_led>, <&bt_led>;

		user_led1 {
			label = "green:user1";
			gpios = <&gpio4 RK_PC2 0>;
			linux,default-trigger = "heartbeat";
		};

		user_led2 {
			label = "green:user2";
			gpios = <&gpio4 RK_PC6 0>;
			linux,default-trigger = "mmc0";
		};

		user_led3 {
			label = "green:user3";
			gpios = <&gpio4 RK_PD0 0>;
			linux,default-trigger = "mmc1";
		};

		user_led4 {
			label = "green:user4";
			gpios = <&gpio4 RK_PD4 0>;
			panic-indicator;
			linux,default-trigger = "none";
		};

		wlan_active_led {
			label = "yellow:wlan";
			gpios = <&gpio4 RK_PD5 0>;
			linux,default-trigger = "phy0tx";
			default-state = "off";
		};

		bt_active_led {
			label = "blue:bt";
			gpios = <&gpio4 RK_PD6 0>;
			linux,default-trigger = "hci0-power";
			default-state = "off";
		};
	};

};

&pcie0 {
	ep-gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>;
};

&pinctrl {
	leds {
		user_led1: user_led1 {
			rockchip,pins =
				<4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		user_led2: user_led2 {
			rockchip,pins =
				<4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		user_led3: user_led3 {
			rockchip,pins =
				<4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		user_led4: user_led4 {
			rockchip,pins =
				<4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		wlan_led: wlan_led {
			rockchip,pins =
				<4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		bt_led: bt_led {
			rockchip,pins =
				<4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	pcie {
		pcie_drv: pcie-drv {
			rockchip,pins =
				<2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
			};
	};

	usb2 {
		host_vbus_drv: host-vbus-drv {
			rockchip,pins =
				<4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};
};

&usbdrd_dwc3_0 {
	dr_mode = "otg";
};

&usbdrd_dwc3_1 {
	dr_mode = "host";
};

&vcc3v3_pcie {
	gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>;
};

&vcc5v0_host {
	gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
};