summaryrefslogtreecommitdiff
path: root/arch/powerpc/boot/dts/ebony.dts
blob: 5079dc890e0e47915f9c5dfce531093f0f26e618 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
/*
 * Device Tree Source for IBM Ebony
 *
 * Copyright (c) 2006, 2007 IBM Corp.
 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
 *
 * FIXME: Draft only!
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without
 * any warranty of any kind, whether express or implied.
 */

/ {
	#address-cells = <2>;
	#size-cells = <1>;
	model = "ibm,ebony";
	compatible = "ibm,ebony";
	dcr-parent = <&/cpus/cpu@0>;

	aliases {
		ethernet0 = &EMAC0;
		ethernet1 = &EMAC1;
		serial0 = &UART0;
		serial1 = &UART1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			model = "PowerPC,440GP";
			reg = <0>;
			clock-frequency = <0>; // Filled in by zImage
			timebase-frequency = <0>; // Filled in by zImage
			i-cache-line-size = <20>;
			d-cache-line-size = <20>;
			i-cache-size = <8000>; /* 32 kB */
			d-cache-size = <8000>; /* 32 kB */
			dcr-controller;
			dcr-access-method = "native";
		};
	};

	memory {
		device_type = "memory";
		reg = <0 0 0>; // Filled in by zImage
	};

	UIC0: interrupt-controller0 {
		compatible = "ibm,uic-440gp", "ibm,uic";
		interrupt-controller;
		cell-index = <0>;
		dcr-reg = <0c0 009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;

	};

	UIC1: interrupt-controller1 {
		compatible = "ibm,uic-440gp", "ibm,uic";
		interrupt-controller;
		cell-index = <1>;
		dcr-reg = <0d0 009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <1e 4 1f 4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	CPC0: cpc {
		compatible = "ibm,cpc-440gp";
		dcr-reg = <0b0 003 0e0 010>;
		// FIXME: anything else?
	};

	plb {
		compatible = "ibm,plb-440gp", "ibm,plb4";
		#address-cells = <2>;
		#size-cells = <1>;
		ranges;
		clock-frequency = <0>; // Filled in by zImage

		SDRAM0: memory-controller {
			compatible = "ibm,sdram-440gp";
			dcr-reg = <010 2>;
			// FIXME: anything else?
		};

		SRAM0: sram {
			compatible = "ibm,sram-440gp";
			dcr-reg = <020 8 00a 1>;
		};

		DMA0: dma {
			// FIXME: ???
			compatible = "ibm,dma-440gp";
			dcr-reg = <100 027>;
		};

		MAL0: mcmal {
			compatible = "ibm,mcmal-440gp", "ibm,mcmal";
			dcr-reg = <180 62>;
			num-tx-chans = <4>;
			num-rx-chans = <4>;
			interrupt-parent = <&MAL0>;
			interrupts = <0 1 2 3 4>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
					 /*RXEOB*/ 1 &UIC0 b 4
					 /*SERR*/  2 &UIC1 0 4
					 /*TXDE*/  3 &UIC1 1 4
					 /*RXDE*/  4 &UIC1 2 4>;
			interrupt-map-mask = <ffffffff>;
		};

		POB0: opb {
			compatible = "ibm,opb-440gp", "ibm,opb";
			#address-cells = <1>;
			#size-cells = <1>;
			/* Wish there was a nicer way of specifying a full 32-bit
			   range */
			ranges = <00000000 1 00000000 80000000
				  80000000 1 80000000 80000000>;
			dcr-reg = <090 00b>;
			interrupt-parent = <&UIC1>;
			interrupts = <7 4>;
			clock-frequency = <0>; // Filled in by zImage

			EBC0: ebc {
				compatible = "ibm,ebc-440gp", "ibm,ebc";
				dcr-reg = <012 2>;
				#address-cells = <2>;
				#size-cells = <1>;
				clock-frequency = <0>; // Filled in by zImage
				// ranges property is supplied by zImage
				// based on firmware's configuration of the
				// EBC bridge
				interrupts = <5 4>;
				interrupt-parent = <&UIC1>;

				small-flash@0,80000 {
					compatible = "jedec-flash";
					bank-width = <1>;
					reg = <0 80000 80000>;
					#address-cells = <1>;
					#size-cells = <1>;
					partition@0 {
						label = "OpenBIOS";
						reg = <0 80000>;
						read-only;
					};
				};

				nvram@1,0 {
					/* NVRAM & RTC */
					compatible = "ds1743-nvram";
					#bytes = <2000>;
					reg = <1 0 2000>;
				};

				large-flash@2,0 {
					compatible = "jedec-flash";
					bank-width = <1>;
					reg = <2 0 400000>;
					#address-cells = <1>;
					#size-cells = <1>;
					partition@0 {
						label = "fs";
						reg = <0 380000>;
					};
					partition@380000 {
						label = "firmware";
						reg = <380000 80000>;
					};
				};

				ir@3,0 {
					reg = <3 0 10>;
				};

				fpga@7,0 {
					compatible = "Ebony-FPGA";
					reg = <7 0 10>;
					virtual-reg = <e8300000>;
				};
			};

			UART0: serial@40000200 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <40000200 8>;
				virtual-reg = <e0000200>;
				clock-frequency = <A8C000>;
				current-speed = <2580>;
				interrupt-parent = <&UIC0>;
				interrupts = <0 4>;
			};

			UART1: serial@40000300 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <40000300 8>;
				virtual-reg = <e0000300>;
				clock-frequency = <A8C000>;
				current-speed = <2580>;
				interrupt-parent = <&UIC0>;
				interrupts = <1 4>;
			};

			IIC0: i2c@40000400 {
				/* FIXME */
				compatible = "ibm,iic-440gp", "ibm,iic";
				reg = <40000400 14>;
				interrupt-parent = <&UIC0>;
				interrupts = <2 4>;
			};
			IIC1: i2c@40000500 {
				/* FIXME */
				compatible = "ibm,iic-440gp", "ibm,iic";
				reg = <40000500 14>;
				interrupt-parent = <&UIC0>;
				interrupts = <3 4>;
			};

			GPIO0: gpio@40000700 {
				/* FIXME */
				compatible = "ibm,gpio-440gp";
				reg = <40000700 20>;
			};

			ZMII0: emac-zmii@40000780 {
				compatible = "ibm,zmii-440gp", "ibm,zmii";
				reg = <40000780 c>;
			};

			EMAC0: ethernet@40000800 {
				device_type = "network";
				compatible = "ibm,emac-440gp", "ibm,emac";
				interrupt-parent = <&UIC1>;
				interrupts = <1c 4 1d 4>;
				reg = <40000800 70>;
				local-mac-address = [000000000000]; // Filled in by zImage
				mal-device = <&MAL0>;
				mal-tx-channel = <0 1>;
				mal-rx-channel = <0>;
				cell-index = <0>;
				max-frame-size = <5dc>;
				rx-fifo-size = <1000>;
				tx-fifo-size = <800>;
				phy-mode = "rmii";
				phy-map = <00000001>;
				zmii-device = <&ZMII0>;
				zmii-channel = <0>;
			};
			EMAC1: ethernet@40000900 {
				device_type = "network";
				compatible = "ibm,emac-440gp", "ibm,emac";
				interrupt-parent = <&UIC1>;
				interrupts = <1e 4 1f 4>;
				reg = <40000900 70>;
				local-mac-address = [000000000000]; // Filled in by zImage
				mal-device = <&MAL0>;
				mal-tx-channel = <2 3>;
				mal-rx-channel = <1>;
				cell-index = <1>;
				max-frame-size = <5dc>;
				rx-fifo-size = <1000>;
				tx-fifo-size = <800>;
				phy-mode = "rmii";
				phy-map = <00000001>;
				zmii-device = <&ZMII0>;
				zmii-channel = <1>;
			};


			GPT0: gpt@40000a00 {
				/* FIXME */
				reg = <40000a00 d4>;
				interrupt-parent = <&UIC0>;
				interrupts = <12 4 13 4 14 4 15 4 16 4>;
			};

		};

		PCIX0: pci@20ec00000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
			primary;
			reg = <2 0ec00000 8	/* Config space access */
			       0 0 0		/* no IACK cycles */
			       2 0ed00000 4     /* Special cycles */
			       2 0ec80000 f0	/* Internal registers */
			       2 0ec80100 fc>;	/* Internal messaging registers */

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed
			 */
			ranges = <02000000 0 80000000 00000003 80000000 0 80000000
				  01000000 0 00000000 00000002 08000000 0 00010000>;

			/* Inbound 2GB range starting at 0 */
			dma-ranges = <42000000 0 0 0 0 0 80000000>;

			/* Ebony has all 4 IRQ pins tied together per slot */
			interrupt-map-mask = <f800 0 0 0>;
			interrupt-map = <
				/* IDSEL 1 */
				0800 0 0 0 &UIC0 17 8

				/* IDSEL 2 */
				1000 0 0 0 &UIC0 18 8

				/* IDSEL 3 */
				1800 0 0 0 &UIC0 19 8

				/* IDSEL 4 */
				2000 0 0 0 &UIC0 1a 8
			>;
		};
	};

	chosen {
		linux,stdout-path = "/plb/opb/serial@40000200";
	};
};