summaryrefslogtreecommitdiff
path: root/arch/powerpc/platforms/wsp/opb_pic.c
blob: cb565bf93650ef7e49f1f57ae162c996b062b109 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
/*
 * IBM Onboard Peripheral Bus Interrupt Controller
 *
 * Copyright 2010 Jack Miller, IBM Corporation.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/of.h>
#include <linux/slab.h>
#include <linux/time.h>

#include <asm/reg_a2.h>
#include <asm/irq.h>

#define OPB_NR_IRQS 32

#define OPB_MLSASIER	0x04    /* MLS Accumulated Status IER */
#define OPB_MLSIR	0x50	/* MLS Interrupt Register */
#define OPB_MLSIER	0x54	/* MLS Interrupt Enable Register */
#define OPB_MLSIPR	0x58	/* MLS Interrupt Polarity Register */
#define OPB_MLSIIR	0x5c	/* MLS Interrupt Inputs Register */

static int opb_index = 0;

struct opb_pic {
	struct irq_domain *host;
	void *regs;
	int index;
	spinlock_t lock;
};

static u32 opb_in(struct opb_pic *opb, int offset)
{
	return in_be32(opb->regs + offset);
}

static void opb_out(struct opb_pic *opb, int offset, u32 val)
{
	out_be32(opb->regs + offset, val);
}

static void opb_unmask_irq(struct irq_data *d)
{
	struct opb_pic *opb;
	unsigned long flags;
	u32 ier, bitset;

	opb = d->chip_data;
	bitset = (1 << (31 - irqd_to_hwirq(d)));

	spin_lock_irqsave(&opb->lock, flags);

	ier = opb_in(opb, OPB_MLSIER);
	opb_out(opb, OPB_MLSIER, ier | bitset);
	ier = opb_in(opb, OPB_MLSIER);

	spin_unlock_irqrestore(&opb->lock, flags);
}

static void opb_mask_irq(struct irq_data *d)
{
	struct opb_pic *opb;
	unsigned long flags;
	u32 ier, mask;

	opb = d->chip_data;
	mask = ~(1 << (31 - irqd_to_hwirq(d)));

	spin_lock_irqsave(&opb->lock, flags);

	ier = opb_in(opb, OPB_MLSIER);
	opb_out(opb, OPB_MLSIER, ier & mask);
	ier = opb_in(opb, OPB_MLSIER); // Flush posted writes

	spin_unlock_irqrestore(&opb->lock, flags);
}

static void opb_ack_irq(struct irq_data *d)
{
	struct opb_pic *opb;
	unsigned long flags;
	u32 bitset;

	opb = d->chip_data;
	bitset = (1 << (31 - irqd_to_hwirq(d)));

	spin_lock_irqsave(&opb->lock, flags);

	opb_out(opb, OPB_MLSIR, bitset);
	opb_in(opb, OPB_MLSIR); // Flush posted writes

	spin_unlock_irqrestore(&opb->lock, flags);
}

static void opb_mask_ack_irq(struct irq_data *d)
{
	struct opb_pic *opb;
	unsigned long flags;
	u32 bitset;
	u32 ier, ir;

	opb = d->chip_data;
	bitset = (1 << (31 - irqd_to_hwirq(d)));

	spin_lock_irqsave(&opb->lock, flags);

	ier = opb_in(opb, OPB_MLSIER);
	opb_out(opb, OPB_MLSIER, ier & ~bitset);
	ier = opb_in(opb, OPB_MLSIER); // Flush posted writes

	opb_out(opb, OPB_MLSIR, bitset);
	ir = opb_in(opb, OPB_MLSIR); // Flush posted writes

	spin_unlock_irqrestore(&opb->lock, flags);
}

static int opb_set_irq_type(struct irq_data *d, unsigned int flow)
{
	struct opb_pic *opb;
	unsigned long flags;
	int invert, ipr, mask, bit;

	opb = d->chip_data;

	/* The only information we're interested in in the type is whether it's
	 * a high or low trigger. For high triggered interrupts, the polarity
	 * set for it in the MLS Interrupt Polarity Register is 0, for low
	 * interrupts it's 1 so that the proper input in the MLS Interrupt Input
	 * Register is interrupted as asserting the interrupt. */

	switch (flow) {
		case IRQ_TYPE_NONE:
			opb_mask_irq(d);
			return 0;

		case IRQ_TYPE_LEVEL_HIGH:
			invert = 0;
			break;

		case IRQ_TYPE_LEVEL_LOW:
			invert = 1;
			break;

		default:
			return -EINVAL;
	}

	bit = (1 << (31 - irqd_to_hwirq(d)));
	mask = ~bit;

	spin_lock_irqsave(&opb->lock, flags);

	ipr = opb_in(opb, OPB_MLSIPR);
	ipr = (ipr & mask) | (invert ? bit : 0);
	opb_out(opb, OPB_MLSIPR, ipr);
	ipr = opb_in(opb, OPB_MLSIPR);  // Flush posted writes

	spin_unlock_irqrestore(&opb->lock, flags);

	/* Record the type in the interrupt descriptor */
	irqd_set_trigger_type(d, flow);

	return 0;
}

static struct irq_chip opb_irq_chip = {
	.name		= "OPB",
	.irq_mask	= opb_mask_irq,
	.irq_unmask	= opb_unmask_irq,
	.irq_mask_ack	= opb_mask_ack_irq,
	.irq_ack	= opb_ack_irq,
	.irq_set_type	= opb_set_irq_type
};

static int opb_host_map(struct irq_domain *host, unsigned int virq,
		irq_hw_number_t hwirq)
{
	struct opb_pic *opb;

	opb = host->host_data;

	/* Most of the important stuff is handled by the generic host code, like
	 * the lookup, so just attach some info to the virtual irq */

	irq_set_chip_data(virq, opb);
	irq_set_chip_and_handler(virq, &opb_irq_chip, handle_level_irq);
	irq_set_irq_type(virq, IRQ_TYPE_NONE);

	return 0;
}

static const struct irq_domain_ops opb_host_ops = {
	.map = opb_host_map,
	.xlate = irq_domain_xlate_twocell,
};

irqreturn_t opb_irq_handler(int irq, void *private)
{
	struct opb_pic *opb;
	u32 ir, src, subvirq;

	opb = (struct opb_pic *) private;

	/* Read the OPB MLS Interrupt Register for
	 * asserted interrupts */
	ir = opb_in(opb, OPB_MLSIR);
	if (!ir)
		return IRQ_NONE;

	do {
		/* Get 1 - 32 source, *NOT* bit */
		src = 32 - ffs(ir);

		/* Translate from the OPB's conception of interrupt number to
		 * Linux's virtual IRQ */

		subvirq = irq_linear_revmap(opb->host, src);

		generic_handle_irq(subvirq);
	} while ((ir = opb_in(opb, OPB_MLSIR)));

	return IRQ_HANDLED;
}

struct opb_pic *opb_pic_init_one(struct device_node *dn)
{
	struct opb_pic *opb;
	struct resource res;

	if (of_address_to_resource(dn, 0, &res)) {
		printk(KERN_ERR "opb: Couldn't translate resource\n");
		return  NULL;
	}

	opb = kzalloc(sizeof(struct opb_pic), GFP_KERNEL);
	if (!opb) {
		printk(KERN_ERR "opb: Failed to allocate opb struct!\n");
		return NULL;
	}

	/* Get access to the OPB MMIO registers */
	opb->regs = ioremap(res.start + 0x10000, 0x1000);
	if (!opb->regs) {
		printk(KERN_ERR "opb: Failed to allocate register space!\n");
		goto free_opb;
	}

	/* Allocate an irq domain so that Linux knows that despite only
	 * having one interrupt to issue, we're the controller for multiple
	 * hardware IRQs, so later we can lookup their virtual IRQs. */

	opb->host = irq_domain_add_linear(dn, OPB_NR_IRQS, &opb_host_ops, opb);
	if (!opb->host) {
		printk(KERN_ERR "opb: Failed to allocate IRQ host!\n");
		goto free_regs;
	}

	opb->index = opb_index++;
	spin_lock_init(&opb->lock);

	/* Disable all interrupts by default */
	opb_out(opb, OPB_MLSASIER, 0);
	opb_out(opb, OPB_MLSIER, 0);

	/* ACK any interrupts left by FW */
	opb_out(opb, OPB_MLSIR, 0xFFFFFFFF);

	return opb;

free_regs:
	iounmap(opb->regs);
free_opb:
	kfree(opb);
	return NULL;
}

void __init opb_pic_init(void)
{
	struct device_node *dn;
	struct opb_pic *opb;
	int virq;
	int rc;

	/* Call init_one for each OPB device */
	for_each_compatible_node(dn, NULL, "ibm,opb") {

		/* Fill in an OPB struct */
		opb = opb_pic_init_one(dn);
		if (!opb) {
			printk(KERN_WARNING "opb: Failed to init node, skipped!\n");
			continue;
		}

		/* Map / get opb's hardware virtual irq */
		virq = irq_of_parse_and_map(dn, 0);
		if (virq <= 0) {
			printk("opb: irq_op_parse_and_map failed!\n");
			continue;
		}

		/* Attach opb interrupt handler to new virtual IRQ */
		rc = request_irq(virq, opb_irq_handler, IRQF_NO_THREAD,
				 "OPB LS Cascade", opb);
		if (rc) {
			printk("opb: request_irq failed: %d\n", rc);
			continue;
		}

		printk("OPB%d init with %d IRQs at %p\n", opb->index,
				OPB_NR_IRQS, opb->regs);
	}
}