diff options
| author | Max Krummenacher <max.krummenacher@toradex.com> | 2018-08-21 14:39:13 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2018-09-27 19:13:04 +0200 |
| commit | 87123df10ba43492e2f8d20da5d92c56057db316 (patch) | |
| tree | 92733721be67e01f303bd079af7fded57e1f94c2 | |
| parent | 9967afe7f2bdc9473667f3f059828f22ecb8bc8b (diff) | |
mx6: ddr: use consistent debug output
Print all ddr calibration output in the same style.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/ddr.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c index 0cf391eb9c..3e6fe29c84 100644 --- a/arch/arm/cpu/armv7/mx6/ddr.c +++ b/arch/arm/cpu/armv7/mx6/ddr.c @@ -191,14 +191,14 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo) writel(esdmisc_val, &mmdc0->mdref); writel(zq_val, &mmdc0->mpzqhwctrl); - debug("\tMMDC_MPWLDECTRL0 after write level cal: 0x%08X\n", + debug("\tMPWLDECTRL0 PHY0: 0x%08X\n", readl(&mmdc0->mpwldectrl0)); - debug("\tMMDC_MPWLDECTRL1 after write level cal: 0x%08X\n", + debug("\tMPWLDECTRL1 PHY0: 0x%08X\n", readl(&mmdc0->mpwldectrl1)); if (sysinfo->dsize == 2) { - debug("\tMMDC_MPWLDECTRL0 after write level cal: 0x%08X\n", + debug("\tMPWLDECTRL0 PHY1: 0x%08X\n", readl(&mmdc1->mpwldectrl0)); - debug("\tMMDC_MPWLDECTRL1 after write level cal: 0x%08X\n", + debug("\tMPWLDECTRL1 PHY1: 0x%08X\n", readl(&mmdc1->mpwldectrl1)); } |