summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorVadim Bendebury <vbendeb@chromium.org>2012-03-27 11:06:48 +0800
committerGerrit <chrome-bot@google.com>2012-03-29 15:01:28 -0700
commit2f2f858faddd3cce54f7c64bc8fc8b596c1ddfaf (patch)
treea2129ced49c5d0ccdeba1c25b6d879a0e43b51d9
parent3a092d3ca1af2c719603468f27da7964010bd897 (diff)
Make u-boot recognize full range of PPT LPC controllers
The full range of LPC controllers should be accepted by u-boot when looking for the SPI controller. The values come from Intel's Panther_Point_EDS_v072.pdf (document #472178). BUG=chrome-os-partner:7734 TEST=manual . program the new image on the target . reboot it and observe coming up to ChromeOS login screen Change-Id: Id8f7068c3b48885f868a1f30e7927e678d2154b6 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/19147 Reviewed-by: Jon Salz <jsalz@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/19310 Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
-rw-r--r--include/pci_ids.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/pci_ids.h b/include/pci_ids.h
index fe49c4b494..602fb0f093 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -2524,8 +2524,8 @@
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f
#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE 0x1e03
-#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN 0x1e55
-#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX 0x1e55
+#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN 0x1e41
+#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX 0x1e5d
#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22
#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC 0x1d40
#define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410