diff options
| author | Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> | 2015-07-29 14:15:03 +0200 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2015-08-10 16:00:09 +0200 |
| commit | bc3d349e79879cc7ec00baeb313b0e59f7f8dd57 (patch) | |
| tree | 76b47d39595b40b85206e80db08d9504b3975b96 | |
| parent | 6cfaccd9320fa2a7c8b4eab9eb7d209ee5f41e5c (diff) | |
arm: vf610: Add iomux support for DSPI
Add iomux definitions for DSPI second instance.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
| -rw-r--r-- | arch/arm/include/asm/arch-vf610/iomux-vf610.h | 9 | ||||
| -rw-r--r-- | board/toradex/colibri_vf/colibri_vf.c | 21 |
2 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-vf610/iomux-vf610.h b/arch/arm/include/asm/arch-vf610/iomux-vf610.h index a320cb3909..3b6a5f3838 100644 --- a/arch/arm/include/asm/arch-vf610/iomux-vf610.h +++ b/arch/arm/include/asm/arch-vf610/iomux-vf610.h @@ -38,6 +38,11 @@ #define VF610_GPIO_PAD_CTRL (PAD_CTL_SPEED_MED | PAD_CTL_DSE_50ohm | \ PAD_CTL_PUS_47K_UP | PAD_CTL_IBE_ENABLE) +#define VF610_DSPI_PAD_CTRL (PAD_CTL_OBE_ENABLE | PAD_CTL_DSE_20ohm | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH) +#define VF610_DSPI_SIN_PAD_CTRL (PAD_CTL_IBE_ENABLE | PAD_CTL_DSE_20ohm | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH) + enum { VF610_PAD_PTA6__RMII0_CLKIN = IOMUX_PAD(0x0000, 0x0000, 2, __NA_, 0, VF610_ENET_PAD_CTRL), VF610_PAD_PTA6__RMII0_CLKOUT = IOMUX_PAD(0x0000, 0x0000, 1, __NA_, 0, VF610_ENET_PAD_CTRL), @@ -64,6 +69,10 @@ enum { VF610_PAD_PTC6__RMII0_TD1 = IOMUX_PAD(0x00cc, 0x00cc, 1, __NA_, 0, VF610_ENET_PAD_CTRL), VF610_PAD_PTC7__RMII0_TD0 = IOMUX_PAD(0x00D0, 0x00D0, 1, __NA_, 0, VF610_ENET_PAD_CTRL), VF610_PAD_PTC8__RMII0_TXEN = IOMUX_PAD(0x00D4, 0x00D4, 1, __NA_, 0, VF610_ENET_PAD_CTRL), + VF610_PAD_PTD5__DSPI1_CS0 = IOMUX_PAD(0x0150, 0x0150, 3, 0x300, 1, VF610_DSPI_PAD_CTRL), + VF610_PAD_PTD6__DSPI1_SIN = IOMUX_PAD(0x0154, 0x0154, 3, 0x2fc, 1, VF610_DSPI_SIN_PAD_CTRL), + VF610_PAD_PTD7__DSPI1_SOUT = IOMUX_PAD(0x0158, 0x0158, 3, __NA_, 0, VF610_DSPI_PAD_CTRL), + VF610_PAD_PTD8__DSPI1_SCK = IOMUX_PAD(0x015c, 0x015c, 3, 0x2f8, 1, VF610_DSPI_PAD_CTRL), VF610_PAD_PTC10__RMII1_MDIO = IOMUX_PAD(0x00dc, 0x00dc, 1, __NA_, 0, VF610_ENET_PAD_CTRL), VF610_PAD_PTC9__RMII1_MDC = IOMUX_PAD(0x00d8, 0x00d8, 1, __NA_, 0, VF610_ENET_PAD_CTRL), VF610_PAD_PTC11__RMII1_CRS_DV = IOMUX_PAD(0x00e0, 0x00e0, 1, __NA_, 0, VF610_ENET_PAD_CTRL), diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index e9e28ce6ea..cbbba0fa55 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -164,6 +164,20 @@ static void setup_iomux_nfc(void) } #endif +#ifdef CONFIG_FSL_DSPI +static void setup_iomux_dspi(void) +{ + static const iomux_v3_cfg_t dspi1_pads[] = { + VF610_PAD_PTD5__DSPI1_CS0, + VF610_PAD_PTD6__DSPI1_SIN, + VF610_PAD_PTD7__DSPI1_SOUT, + VF610_PAD_PTD8__DSPI1_SCK, + }; + + imx_iomux_v3_setup_multiple_pads(dspi1_pads, ARRAY_SIZE(dspi1_pads)); +} +#endif + #ifdef CONFIG_FSL_DCU_FB static void setup_iomux_fsl_dcu(void) { @@ -277,6 +291,9 @@ static void clock_init(void) clrsetbits_le32(&ccm->ccgr0, CCM_REG_CTRL_MASK, CCM_CCGR0_UART0_CTRL_MASK | CCM_CCGR0_UART2_CTRL_MASK); +#ifdef CONFIG_FSL_DSPI + setbits_le32(&ccm->ccgr0, CCM_CCGR0_DSPI1_CTRL_MASK); +#endif clrsetbits_le32(&ccm->ccgr1, CCM_REG_CTRL_MASK, CCM_CCGR1_PIT_CTRL_MASK | CCM_CCGR1_WDOGA5_CTRL_MASK | CCM_CCGR1_USBC0_CTRL_MASK); @@ -393,6 +410,10 @@ int board_early_init_f(void) setup_iomux_gpio(); #endif +#ifdef CONFIG_FSL_DSPI + setup_iomux_dspi(); +#endif + return 0; } |