Update to Atmel's 1.7 patch for 1.1.51.1.5-at91-200806161731

This patch came from Atmel.  It fixes a number of NAND issues, as well as the
9263 rev B SPI bug.

Signed-off-by: Justin Waters <justin.waters@timesys.com>

12 files changed, 217 insertions, 291 deletions

diff --git a/Makefile b/Makefile
index ce2050f0ca..6b934df7f2 100644
--- a/Makefile
+++ b/Makefile
@@ -2013,24 +2013,77 @@ zylonite_config :
 #########################################################################
 ## ARM926EJS Systems
 #########################################################################
-
+at91sam9260ek_nandflash_config \
+at91sam9260ek_dataflash_config \
 at91sam9260ek_config	:	unconfig
-	@./mkconfig $(@:_config=) arm arm926ejs at91sam9260ek NULL at91sam926x
-
+	@if [ "$(findstring _nandflash,$@)" ] ; then \
+		echo "#define CFG_ENV_IS_IN_NAND 1"		>>$(obj)include/config.h ; \
+		echo "... with environment variable in NAND FLASH" ; \
+	else \
+		echo "#define CFG_ENV_IS_IN_DATAFLASH 1"	>>$(obj)include/config.h ; \
+		echo "... with environment variable in SPI DATAFLASH CS1" ; \
+	fi;
+	@$(MKCONFIG) -a at91sam9260ek arm arm926ejs at91sam9260ek NULL at91sam926x
+ 
+at91sam9xeek_nandflash_config \
+at91sam9xeek_dataflash_config \
 at91sam9xeek_config	:	unconfig
-	@./mkconfig -n at91sam9xeek at91sam9260ek arm arm926ejs at91sam9260ek NULL at91sam926x
+	@if [ "$(findstring _nandflash,$@)" ] ; then \
+		echo "#define CFG_ENV_IS_IN_NAND 1"		>>$(obj)include/config.h ; \
+		echo "... with environment variable in NAND FLASH" ; \
+	else \
+		echo "#define CFG_ENV_IS_IN_DATAFLASH 1"	>>$(obj)include/config.h ; \
+		echo "... with environment variable in SPI DATAFLASH CS1" ; \
+	fi;
+	@$(MKCONFIG) -n at91sam9xeek -a at91sam9260ek arm arm926ejs at91sam9260ek NULL at91sam926x
 
+at91sam9g20ek_nandflash_config \
+at91sam9g20ek_dataflash_config \
 at91sam9g20ek_config	:	unconfig
-	@./mkconfig $(@:_config=) arm arm926ejs at91sam9g20ek NULL at91sam926x
+	@if [ "$(findstring _nandflash,$@)" ] ; then \
+		echo "#define CFG_ENV_IS_IN_NAND 1"		>>$(obj)include/config.h ; \
+		echo "... with environment variable in NAND FLASH" ; \
+	else \
+		echo "#define CFG_ENV_IS_IN_DATAFLASH 1"	>>$(obj)include/config.h ; \
+		echo "... with environment variable in SPI DATAFLASH CS1" ; \
+	fi;
+	@$(MKCONFIG) -a at91sam9g20ek arm arm926ejs at91sam9g20ek NULL at91sam926x
 
+at91sam9261ek_nandflash_config \
+at91sam9261ek_dataflash_config \
 at91sam9261ek_config	:	unconfig
-	@./mkconfig $(@:_config=) arm arm926ejs at91sam9261ek NULL at91sam926x
+	@if [ "$(findstring _nandflash,$@)" ] ; then \
+		echo "#define CFG_ENV_IS_IN_NAND 1"		>>$(obj)include/config.h ; \
+		echo "... with environment variable in NAND FLASH" ; \
+	else \
+		echo "#define CFG_ENV_IS_IN_DATAFLASH 1"	>>$(obj)include/config.h ; \
+		echo "... with environment variable in SPI DATAFLASH CS0" ; \
+	fi;
+	@$(MKCONFIG) -a at91sam9261ek arm arm926ejs at91sam9261ek NULL at91sam926x
 
+at91sam9rlek_nandflash_config \
+at91sam9rlek_dataflash_config \
 at91sam9rlek_config	:	unconfig
-	@./mkconfig $(@:_config=) arm arm926ejs at91sam9rlek NULL at91sam926x
-
+	@if [ "$(findstring _nandflash,$@)" ] ; then \
+		echo "#define CFG_ENV_IS_IN_NAND 1"		>>$(obj)include/config.h ; \
+		echo "... with environment variable in NAND FLASH" ; \
+	else \
+		echo "#define CFG_ENV_IS_IN_DATAFLASH 1"	>>$(obj)include/config.h ; \
+		echo "... with environment variable in SPI DATAFLASH CS0" ; \
+	fi;
+	@$(MKCONFIG) -a at91sam9rlek arm arm926ejs at91sam9rlek NULL at91sam926x
+	
+at91sam9263ek_nandflash_config \
+at91sam9263ek_dataflash_config \
 at91sam9263ek_config	:	unconfig
-	@./mkconfig $(@:_config=) arm arm926ejs at91sam9263ek NULL at91sam926x
+	@if [ "$(findstring _nandflash,$@)" ] ; then \
+		echo "#define CFG_ENV_IS_IN_NAND 1"		>>$(obj)include/config.h ; \
+		echo "... with environment variable in NAND FLASH" ; \
+	else \
+		echo "#define CFG_ENV_IS_IN_DATAFLASH 1"	>>$(obj)include/config.h ; \
+		echo "... with environment variable in SPI DATAFLASH CS0" ; \
+	fi;
+	@$(MKCONFIG) -a at91sam9263ek arm arm926ejs at91sam9263ek NULL at91sam926x
 
 #########################################################################
 ## ARM1136 Systems
diff --git a/board/at91sam9260ek/nand.c b/board/at91sam9260ek/nand.c
index 2a339a9ed7..53da6fd108 100644
--- a/board/at91sam9260ek/nand.c
+++ b/board/at91sam9260ek/nand.c
@@ -52,7 +52,7 @@ void at91sam9260ek_nand_init (struct nand_chip *nand)
   
   if ((nand->options & NAND_BUSWIDTH_16) == NAND_BUSWIDTH_16)
   {
-  	AT91C_BASE_SMC->SMC_CTRL3 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
+	AT91C_BASE_SMC->SMC_CTRL3 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
 				       AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF);
   } else {
     	AT91C_BASE_SMC->SMC_CTRL3 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
@@ -65,8 +65,9 @@ void at91sam9260ek_nand_init (struct nand_chip *nand)
   AT91C_BASE_PIOC->PIO_ODR  = AT91C_PIO_PC13;
   AT91C_BASE_PIOC->PIO_PER  = AT91C_PIO_PC13;
 
-  AT91C_BASE_PIOC->PIO_PPUER = AT91C_PIO_PC13;   /* Enable pull-up */
-    
+  /* Enable pull-up */
+  AT91C_BASE_PIOC->PIO_PPUER = AT91C_PIO_PC13;     
+
   /* Enable NandFlash */
   AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC14;
   AT91C_BASE_PIOC->PIO_OER = AT91C_PIO_PC14;
@@ -97,6 +98,19 @@ static int at91sam9260ek_nand_ready(struct mtd_info *mtd)
 
 void board_nand_init(struct nand_chip *nand)
 {
+	/* Init due to switch 8/16 bits mode */
+
+	if (nand->write_byte)
+		nand->write_byte = NULL;
+	if (nand->read_byte)
+		nand->read_byte = NULL;
+	if (nand->write_buf)
+		nand->write_buf = NULL;
+	if (nand->read_buf)
+		nand->read_buf = NULL;
+	if (nand->verify_buf)
+		nand->verify_buf = NULL;
+
 	nand->eccmode = NAND_ECC_SOFT;
 	nand->hwcontrol = at91sam9260ek_nand_hwcontrol;
 	nand->dev_ready = at91sam9260ek_nand_ready;
diff --git a/board/at91sam9rlek/nand.c b/board/at91sam9rlek/nand.c
index 62623f5fbe..60973458ab 100644
--- a/board/at91sam9rlek/nand.c
+++ b/board/at91sam9rlek/nand.c
@@ -53,12 +53,14 @@ void at91sam9RLek_nand_init (struct nand_chip *nand)
   AT91C_BASE_SMC->SMC_CTRL3 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
                                 AT91C_SMC_DBW_WIDTH_EIGTH_BITS | AT91C_SM_TDF);
   
-  /* Clock PIOD */
-  AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOD;
+  /* Clock PIOD & PIOB */
+  AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_PIOD);
+  AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_PIOB);
 
   /* Configure Ready/Busy signal */
   AT91C_BASE_PIOD->PIO_ODR  = AT91C_PIO_PD17;
   AT91C_BASE_PIOD->PIO_PER  = AT91C_PIO_PD17;
+
   /* Configure pull-up */
   AT91C_BASE_PIOD->PIO_PPUER = AT91C_PIO_PD17;
   
@@ -80,8 +82,8 @@ static void at91sam9RLek_nand_hwcontrol(struct mtd_info *mtd, int cmd)
 	switch (cmd) {
 		case NAND_CTL_SETCLE: IO_ADDR_W |= MASK_CLE; break;
 		case NAND_CTL_SETALE: IO_ADDR_W |= MASK_ALE; break;
-		case NAND_CTL_CLRNCE: *AT91C_PIOC_SODR = AT91C_PIO_PC14; break;
-		case NAND_CTL_SETNCE: *AT91C_PIOC_CODR = AT91C_PIO_PC14; break;
+		case NAND_CTL_CLRNCE: *AT91C_PIOB_SODR = AT91C_PIO_PB6; break;
+		case NAND_CTL_SETNCE: *AT91C_PIOB_CODR = AT91C_PIO_PB6; break;
 	}
 	this->IO_ADDR_W = (void *) IO_ADDR_W;
 }
diff --git a/cpu/arm926ejs/at91sam926x/spi.c b/cpu/arm926ejs/at91sam926x/spi.c
index bd855283b9..185874ed3d 100644
--- a/cpu/arm926ejs/at91sam926x/spi.c
+++ b/cpu/arm926ejs/at91sam926x/spi.c
@@ -98,7 +98,10 @@ void AT91F_SpiInit(void) {
 
   /* Reset the SPI */
   AT91C_BASE_SPI0->SPI_CR = AT91C_SPI_SWRST;
-  
+#ifdef CONFIG_AT91SAM9263EK
+  AT91C_BASE_SPI0->SPI_CR = AT91C_SPI_SWRST;
+#endif
+
   /* Configure SPI in Master Mode with No CS selected !!! */
   AT91C_BASE_SPI0->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS;
   
diff --git a/drivers/nand/nand_base.c b/drivers/nand/nand_base.c
index c531ef8e79..193aa8a907 100644
--- a/drivers/nand/nand_base.c
+++ b/drivers/nand/nand_base.c
@@ -2354,18 +2354,21 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
 			busw = nand_flash_ids[i].options & NAND_BUSWIDTH_16;
 		}
 
+		/* Try to identify manufacturer */
+		for (j = 0; nand_manuf_ids[j].id != 0x0; j++) {
+			if (nand_manuf_ids[j].id == nand_maf_id)
+				break;
+		}
+
 		/* Check, if buswidth is correct. Hardware drivers should set
 		 * this correct ! */
-		printk (KERN_INFO "NAND device: Manufacturer ID:"
-			" 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
-			nand_manuf_ids[i].name , mtd->name);
-		printk(KERN_INFO "NAND: Pagesize: %u, Blocksize: %uK, OOBsize: %u\n",
-				mtd->oobblock, mtd->erasesize/1024, mtd->oobsize);
-		if (busw != (this->options & NAND_BUSWIDTH_16)) {
-/* 			printk (KERN_WARNING */
-/* 				"NAND bus width %d instead %d bit\n", */
-/* 					(this->options & NAND_BUSWIDTH_16) ? 16 : 8, */
-/* 					busw ? 16 : 8); */
+		if (busw == (this->options & NAND_BUSWIDTH_16)) {
+			printk (KERN_INFO "NAND device: Manufacturer ID:"
+				" 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
+				nand_manuf_ids[j].name , mtd->name);
+			printk(KERN_INFO "NAND: Pagesize: %u, Blocksize: %uK, OOBsize: %u\n",
+					mtd->oobblock, mtd->erasesize/1024, mtd->oobsize);
+		} else {
 			this->select_chip(mtd, -1);
 			return 1;
 		}
diff --git a/go_build_u-boot.sh b/go_build_u-boot.sh
new file mode 100644
index 0000000000..c9f6da5c28
--- /dev/null
+++ b/go_build_u-boot.sh
@@ -0,0 +1,46 @@
+#!/bin/bash
+
+ALL_AT91_BOARD="at91sam9260ek at91sam9261ek at91sam9263ek at91sam9xeek at91sam9rlek at91sam9g20ek"
+MAKE=/usr/local/bin/make-3.80
+X_COMPILE=/opt/codesourcery/arm-2007q1/bin/arm-none-linux-gnueabi-
+
+#########################################################
+if [ "$2" == "" ]; then
+	echo "syntax go_build_u-boot.sh [board:all] [directory]"
+	exit 0
+fi
+
+mkdir -p $2
+> $2/build.log
+> $2/configure.log 
+
+if [ "$1" == "all" ]; then
+	AT91_BOARD=${ALL_AT91_BOARD}
+else
+	AT91_BOARD=$1
+fi
+
+
+for board in ${AT91_BOARD}; do
+	echo -n "building for ${board} :"
+	for media in dataflash nandflash default; do
+		echo -n " ${media}"
+		${MAKE} CROSS_COMPILE=${X_COMPILE} mrproper >> /dev/null
+		if [ "${media}" == "default" ]; then 
+			${MAKE} CROSS_COMPILE=${X_COMPILE} ${board}_config  >> configure.log 2>&1
+		else
+			${MAKE} CROSS_COMPILE=${X_COMPILE} ${board}_${media}_config  >> configure.log 2>&1
+		fi
+		if [ "$?" -ne 0 ]; then
+			echo " error."
+			exit 1
+		fi
+		${MAKE} CROSS_COMPILE=${X_COMPILE} >> build.log 2>&1
+		if [ "$?" -ne 0 ]; then
+			echo " error."
+			exit 1
+		fi
+		mv -f u-boot.bin $2/u-boot-${board}-${media}.bin
+	done
+	echo "."
+done
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index e9a9f4eddc..a4883d68ce 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -112,76 +112,23 @@
 #define NAND_MAX_FLOORS                1
 #undef  CFG_NAND_WP
 
-/*#define AT91_SMART_MEDIA_ALE           (1 << 21)*/	/* our ALE is AD21 */
-/*#define AT91_SMART_MEDIA_CLE           (1 << 22)*/	/* our CLE is AD22 */
-
-/* SMC Chip Select 3 Timings for NandFlash K9F1216U0A (samsung)
- * for MASTER_CLOCK = 48000000. They were generated according to 
- * K9F1216U0A timings and for MASTER_CLOCK = 48000000.
- * Please refer to SMC section in AT91SAM9261 datasheet to learn how 
- * to generate these values.
- */
- 
-/*
-#define AT91C_SM_NWE_SETUP	(0 << 0)		
-#define AT91C_SM_NCS_WR_SETUP	(0 << 8)		
-#define AT91C_SM_NRD_SETUP	(0 << 16)		
-#define AT91C_SM_NCS_RD_SETUP	(0 << 24)		
-  
-#define AT91C_SM_NWE_PULSE 	(2 << 0)		
-#define AT91C_SM_NCS_WR_PULSE	(3 << 8)		
-#define AT91C_SM_NRD_PULSE	(2 << 16)		
-#define AT91C_SM_NCS_RD_PULSE	(4 << 24)		
-  
-#define AT91C_SM_NWE_CYCLE 	(3 << 0)		
-#define AT91C_SM_NRD_CYCLE	(5 << 16)		
-  
-#define AT91C_SM_TDF	        (1 << 16)		
-*/
-
-/* SMC Chip Select 3 Timings for NandFlash K9F1216U0A (samsung)
- * for MASTER_CLOCK = 100000000. They were generated according to 
- * K9F1216U0A timings and for MASTER_CLOCK = 100000000.
- * Please refer to SMC section in AT91SAM9261 datasheet to learn how 
- * to generate these values.
- */
-
-/* These timings are specific to K9F1216U0A (samsung) */
-/*
-#define AT91C_SM_NWE_SETUP	(0 << 0)		
-#define AT91C_SM_NCS_WR_SETUP	(0 << 8)		
-#define AT91C_SM_NRD_SETUP	(0 << 16)		
-#define AT91C_SM_NCS_RD_SETUP	(0 << 24)		
-  
-#define AT91C_SM_NWE_PULSE 	(3 << 0)		
-#define AT91C_SM_NCS_WR_PULSE	(3 << 8)		
-#define AT91C_SM_NRD_PULSE	(4 << 16)		
-#define AT91C_SM_NCS_RD_PULSE	(4 << 24)		
-  
-#define AT91C_SM_NWE_CYCLE 	(5 << 0)		
-#define AT91C_SM_NRD_CYCLE	(5 << 16)		
-*/
-
 /* These timings are specific to MT29F2G16AAB 256Mb (Micron) 
  * at MCK = 100 MHZ
  */
-
-#define AT91C_SM_NWE_SETUP	(0 << 0)
+#define AT91C_SM_NWE_SETUP	(1 << 0)
 #define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-#define AT91C_SM_NRD_SETUP	(0 << 16)
+#define AT91C_SM_NRD_SETUP	(1 << 16)
 #define AT91C_SM_NCS_RD_SETUP	(0 << 24)
   
-#define AT91C_SM_NWE_PULSE 	(4 << 0)
-#define AT91C_SM_NCS_WR_PULSE	(6 << 8)
-#define AT91C_SM_NRD_PULSE	(3 << 16)
-#define AT91C_SM_NCS_RD_PULSE	(5 << 24)
+#define AT91C_SM_NWE_PULSE 	(3 << 0)
+#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
+#define AT91C_SM_NRD_PULSE	(3<< 16)
+#define AT91C_SM_NCS_RD_PULSE	(3<< 24)
   
-#define AT91C_SM_NWE_CYCLE 	(6 << 0)
+#define AT91C_SM_NWE_CYCLE 	(5 << 0)
 #define AT91C_SM_NRD_CYCLE	(5 << 16)
 
-#define AT91C_SM_TDF	        (1 << 16)		
-
-
+#define AT91C_SM_TDF	        (2 << 16)		
 
 #define CONFIG_NR_DRAM_BANKS            1
 #define PHYS_SDRAM                      0x20000000
@@ -222,13 +169,6 @@
 
 #define CFG_NO_FLASH			1
 
-#undef  CFG_ENV_IS_IN_FLASH
-#define	CFG_ENV_IS_IN_DATAFLASH         1
-#undef CFG_ENV_IS_IN_NAND              
-
-/*#define CONFIG_MTD_DEBUG		1
-#define CONFIG_MTD_DEBUG_VERBOSE	MTD_DEBUG_LEVEL3
-*/
 #ifdef CFG_ENV_IS_IN_NAND
 #define CFG_ENV_OFFSET	0x60000		/* environment starts here  */
 #define	CFG_ENV_OFFSET_REDUND	 0x80000	/* redundant environment starts here */
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index ce21a97cdf..9483ec81f6 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -82,6 +82,7 @@
 #define CONFIG_COMMANDS		\
 		       ((CONFIG_CMD_DFL	| \
                         CFG_CMD_NET | \
+			CFG_CMD_PING | \
                         CFG_CMD_ENV | \
                         CFG_CMD_USB | \
                         CFG_CMD_FLASH | \
@@ -111,71 +112,23 @@
 #define NAND_MAX_FLOORS                1
 #undef  CFG_NAND_WP
 
-/* SMC Chip Select 3 Timings for NandFlash K9F1216U0A (samsung)
- * for MASTER_CLOCK = 48000000. They were generated according to 
- * K9F1216U0A timings and for MASTER_CLOCK = 48000000.
- * Please refer to SMC section in AT91SAM9261 datasheet to learn how 
- * to generate these values.
- */
- 
-/*
-#define AT91C_SM_NWE_SETUP	(0 << 0)		
-#define AT91C_SM_NCS_WR_SETUP	(0 << 8)		
-#define AT91C_SM_NRD_SETUP	(0 << 16)		
-#define AT91C_SM_NCS_RD_SETUP	(0 << 24)		
-  
-#define AT91C_SM_NWE_PULSE 	(2 << 0)		
-#define AT91C_SM_NCS_WR_PULSE	(3 << 8)		
-#define AT91C_SM_NRD_PULSE	(2 << 16)		
-#define AT91C_SM_NCS_RD_PULSE	(4 << 24)		
-  
-#define AT91C_SM_NWE_CYCLE 	(3 << 0)		
-#define AT91C_SM_NRD_CYCLE	(5 << 16)		
-  
-#define AT91C_SM_TDF	        (1 << 16)		
-*/
-
-/* SMC Chip Select 3 Timings for NandFlash K9F1216U0A (samsung)
- * for MASTER_CLOCK = 100000000. They were generated according to 
- * K9F1216U0A timings and for MASTER_CLOCK = 100000000.
- * Please refer to SMC section in AT91SAM9261 datasheet to learn how 
- * to generate these values.
- */
-
-/* These timing are specific to K9F1216U0A (samsung) */
-/*
-#define AT91C_SM_NWE_SETUP	(0 << 0)		
-#define AT91C_SM_NCS_WR_SETUP	(0 << 8)		
-#define AT91C_SM_NRD_SETUP	(0 << 16)		
-#define AT91C_SM_NCS_RD_SETUP	(0 << 24)		
-  
-#define AT91C_SM_NWE_PULSE 	(3 << 0)		
-#define AT91C_SM_NCS_WR_PULSE	(3 << 8)		
-#define AT91C_SM_NRD_PULSE	(4 << 16)		
-#define AT91C_SM_NCS_RD_PULSE	(4 << 24)		
-  
-#define AT91C_SM_NWE_CYCLE 	(5 << 0)		
-#define AT91C_SM_NRD_CYCLE	(5 << 16)		
-*/
-
 /* These timings are specific to MT29F2G16AAB 256Mb (Micron) 
  * at MCK = 100 MHZ
  */
-
-#define AT91C_SM_NWE_SETUP	(0 << 0)
+#define AT91C_SM_NWE_SETUP	(1 << 0)
 #define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-#define AT91C_SM_NRD_SETUP	(0 << 16)
+#define AT91C_SM_NRD_SETUP	(1 << 16)
 #define AT91C_SM_NCS_RD_SETUP	(0 << 24)
   
-#define AT91C_SM_NWE_PULSE 	(4 << 0)
-#define AT91C_SM_NCS_WR_PULSE	(6 << 8)
+#define AT91C_SM_NWE_PULSE 	(3 << 0)
+#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
 #define AT91C_SM_NRD_PULSE	(3 << 16)
-#define AT91C_SM_NCS_RD_PULSE	(5 << 24)
+#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
   
-#define AT91C_SM_NWE_CYCLE 	(6 << 0)
+#define AT91C_SM_NWE_CYCLE 	(5 << 0)
 #define AT91C_SM_NRD_CYCLE	(5 << 16)
 
-#define AT91C_SM_TDF	        (1 << 16)		
+#define AT91C_SM_TDF	        (2 << 16)		
 
 
 
@@ -271,15 +224,18 @@
 #define CFG_FLASH_ERASE_TOUT		(2*CFG_HZ) /* Timeout for Flash Erase */
 #define CFG_FLASH_WRITE_TOUT		(2*CFG_HZ) /* Timeout for Flash Write */
 
-#define	CFG_ENV_IS_IN_DATAFLASH         1
-#undef  CFG_ENV_IS_IN_FLASH
-
 #ifdef CFG_ENV_IS_IN_DATAFLASH
 #define CFG_ENV_OFFSET			0x4000
 #define CFG_ENV_ADDR			(CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
 #define CFG_ENV_SIZE			0x4000  /* 0x8000 */
 #endif
 
+#ifdef CFG_ENV_IS_IN_NAND
+#define CFG_ENV_OFFSET		0x60000		/* environment starts here  */
+#define	CFG_ENV_OFFSET_REDUND	0x80000		/* redundant environment starts here */
+#define CFG_ENV_SIZE    	0x20000 	/* 1 sector = 128kB */
+#endif
+
 #ifdef CFG_ENV_IS_IN_FLASH
 #ifdef CONFIG_BOOTBINFUNC
 #define CFG_ENV_ADDR			(PHYS_FLASH_1 + 0x60000)  /* after u-boot.bin */
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index f942393739..86a528b315 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -32,27 +32,20 @@
  * If we are developing, we might want to start armboot from ram
  * so we MUST NOT initialize critical regs like mem-timing ...
  */
-#undef  CONFIG_INIT_CRITICAL		/* undef for developing */
 
 /* ARM asynchronous clock */
 #define	CRYSTAL_16_36766MHZ	1
 
 #ifdef CRYSTAL_16_36766MHZ
-
-#define AT91C_MAIN_CLOCK	199919000	/* from 16.367 MHz crystal (16367000 / 14 * 171) */
-#define AT91C_MASTER_CLOCK	(199919000/2)	/* peripheral clock (AT91C_MAIN_CLOCK / 2) */
-
+	#define AT91C_MAIN_CLOCK	199919000	/* from 16.367 MHz crystal (16367000 / 14 * 171) */
+	#define AT91C_MASTER_CLOCK	(199919000/2)	/* peripheral clock (AT91C_MAIN_CLOCK / 2) */
 #endif
 
 #ifdef CRYSTAL_18_432MHZ
-
-#define AT91C_MAIN_CLOCK	198656000	/* from 16.367 MHz crystal (16367000 / 5 * 61) */
-#define AT91C_MASTER_CLOCK	(198656000/2)	/* peripheral clock (AT91C_MAIN_CLOCK / 2) */
-
+	#define AT91C_MAIN_CLOCK	198656000	/* from 16.367 MHz crystal (16367000 / 5 * 61) */
+	#define AT91C_MASTER_CLOCK	(198656000/2)	/* peripheral clock (AT91C_MAIN_CLOCK / 2) */
 #endif
 
-/* #define AT91C_MASTER_CLOCK	48000000 */
-
 #define AT91_SLOW_CLOCK		32768	/* slow clock */
 
 #define CFG_HZ 1000
@@ -70,7 +63,7 @@
 /*
  * Size of malloc() pool
  */
-#define CFG_MALLOC_LEN		(CFG_ENV_SIZE + 128*1024)
+#define CFG_MALLOC_LEN		(3*CFG_ENV_SIZE + 128*1024)
 #define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
 
 #define CONFIG_BAUDRATE         115200
@@ -113,9 +106,9 @@
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>
 
-#define NAND_MAX_CHIPS		       1	/* Max number of NAND devices	*/
-#define CFG_MAX_NAND_DEVICE            1	/* Max number of NAND devices	*/
-#define CFG_NAND_BASE           0x40000000
+#define NAND_MAX_CHIPS		1	/* Max number of NAND devices	*/
+#define CFG_MAX_NAND_DEVICE	1	/* Max number of NAND devices	*/
+#define CFG_NAND_BASE		0x40000000
 #define CONFIG_NEW_NAND_CODE
 
 #define ADDR_COLUMN                    1
@@ -124,7 +117,7 @@
 
 #define NAND_ChipID_UNKNOWN	       0
 #define NAND_MAX_FLOORS                1
-#define NAND_MAX_CHIPS                 1
+#undef  CFG_NAND_WP
 
 /* SMC Chip select 0 timings for NorFlash S29JL032H
    for MASTER_CLOCK = 100 MHZ.
@@ -142,108 +135,25 @@
 #define AT91C_FLASH_NWE_CYCLE 	        (7 << 0)		
 #define AT91C_FLASH_NRD_CYCLE	        (7 << 16)		
 
-
-/* SMC Chip select 0 timings for NorFlash S29JL032H
-   for MASTER_CLOCK = 48 MHZ.
-*/
-/*#define AT91C_FLASH_NWE_SETUP	        (1 << 0)		
-#define AT91C_FLASH_NCS_WR_SETUP	(0 << 8)		
-#define AT91C_FLASH_NRD_SETUP	        (0 << 16)		
-#define AT91C_FLASH_NCS_RD_SETUP	(0 << 24)		
-  
-#define AT91C_FLASH_NWE_PULSE 	        (2 << 0)		
-#define AT91C_FLASH_NCS_WR_PULSE	(5 << 8)		
-#define AT91C_FLASH_NRD_PULSE	        (4 << 16)		
-#define AT91C_FLASH_NCS_RD_PULSE	(4 << 24)		
-  
-#define AT91C_FLASH_NWE_CYCLE 	        (5 << 0)		
-#define AT91C_FLASH_NRD_CYCLE	        (4 << 16)		
-*/
 #define AT91C_FLASH_TDF	                (7 << 16)
 
-
-
-
-/* SMC Chip Select 3 Timings for NandFlash K9F1216U0A (samsung)
-   for MASTER_CLOCK = 48000000. They were generated according to 
-   K9F1216U0A timings and for MASTER_CLOCK = 48000000.
-   Please refer to SMC section in AT91SAM9263 datasheet to learn how 
-   to generate these values.
-*/
-/*
-#define AT91C_SM_NWE_SETUP	(0 << 0)		
-#define AT91C_SM_NCS_WR_SETUP	(0 << 8)		
-#define AT91C_SM_NRD_SETUP	(0 << 16)		
-#define AT91C_SM_NCS_RD_SETUP	(0 << 24)		
-  
-#define AT91C_SM_NWE_PULSE 	(2 << 0)		
-#define AT91C_SM_NCS_WR_PULSE	(3 << 8)		
-#define AT91C_SM_NRD_PULSE	(2 << 16)		
-#define AT91C_SM_NCS_RD_PULSE	(4 << 24)		
-  
-#define AT91C_SM_NWE_CYCLE 	(3 << 0)		
-#define AT91C_SM_NRD_CYCLE	(5 << 16)		
-  
-#define AT91C_SM_TDF	        (1 << 16)		
-*/
-
-/* SMC Chip Select 3 Timings for NandFlash K9F1216U0A (samsung)
- for MASTER_CLOCK = 100000000. They were generated according to 
- K9F1216U0A timings and for MASTER_CLOCK = 100000000.
- Please refer to SMC section in AT91SAM9263 datasheet to learn how 
- to generate these values.
-
- These timings are specific to K9F1216U0A (samsung)
-*/
-/*
-#define AT91C_SM_NWE_SETUP	(0 << 0)		
-#define AT91C_SM_NCS_WR_SETUP	(0 << 8)		
-#define AT91C_SM_NRD_SETUP	(0 << 16)		
-#define AT91C_SM_NCS_RD_SETUP	(0 << 24)		
-  
-#define AT91C_SM_NWE_PULSE 	(3 << 0)		
-#define AT91C_SM_NCS_WR_PULSE	(3 << 8)		
-#define AT91C_SM_NRD_PULSE	(4 << 16)		
-#define AT91C_SM_NCS_RD_PULSE	(4 << 24)		
-  
-#define AT91C_SM_NWE_CYCLE 	(5 << 0)		
-#define AT91C_SM_NRD_CYCLE	(5 << 16)		
-*/
-
-/* These timings are specific to TC58DVG02AFT1 (Toshiba) 
-   at MCK = 100 MHZ
-*/
-#define AT91C_SM_NWE_SETUP	(0 << 0)
+/* These timings are specific to 256Mb (Micron) 
+ * at MCK = 100 MHZ
+ */
+#define AT91C_SM_NWE_SETUP	(1 << 0)
 #define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-#define AT91C_SM_NRD_SETUP	(5 << 16)
+#define AT91C_SM_NRD_SETUP	(1 << 16)
 #define AT91C_SM_NCS_RD_SETUP	(0 << 24)
   
 #define AT91C_SM_NWE_PULSE 	(3 << 0)
-#define AT91C_SM_NCS_WR_PULSE	(6 << 8)
-#define AT91C_SM_NRD_PULSE	(4 << 16)
-#define AT91C_SM_NCS_RD_PULSE	(11 << 24)
-  
-#define AT91C_SM_NWE_CYCLE 	(6 << 0)
-#define AT91C_SM_NRD_CYCLE	(11 << 16)
-
-/* These timings are specific to TC58DVG02AFT1 (Toshiba) 
-   at MCK = 48 MHZ
-*/
-/*#define AT91C_SM_NWE_SETUP	(0 << 0)
-#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-#define AT91C_SM_NRD_SETUP	(3 << 16)
-#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
-  
-#define AT91C_SM_NWE_PULSE 	(2 << 0)
-#define AT91C_SM_NCS_WR_PULSE	(4 << 8)
-#define AT91C_SM_NRD_PULSE	(2 << 16)
-#define AT91C_SM_NCS_RD_PULSE	(6 << 24)
+#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
+#define AT91C_SM_NRD_PULSE	(3 << 16)
+#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
   
-#define AT91C_SM_NWE_CYCLE 	(4 << 0)
-#define AT91C_SM_NRD_CYCLE	(6 << 16)
-*/
-#define AT91C_SM_TDF	        (1 << 16)		
+#define AT91C_SM_NWE_CYCLE 	(5 << 0)
+#define AT91C_SM_NRD_CYCLE	(5 << 16)
 
+#define AT91C_SM_TDF	        (2 << 16)	
 
 #define CONFIG_NR_DRAM_BANKS            1
 #define PHYS_SDRAM                      0x20000000
@@ -284,8 +194,11 @@
 #define CFG_FLASH_ERASE_TOUT		(1000*CFG_HZ) /* Timeout for Flash Erase */
 #define CFG_FLASH_WRITE_TOUT		(2*CFG_HZ) /* Timeout for Flash Write */
 
-#undef CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_IS_IN_DATAFLASH         1
+#ifdef CFG_ENV_IS_IN_NAND
+#define CFG_ENV_OFFSET		0x60000		/* environment starts here  */
+#define	CFG_ENV_OFFSET_REDUND	0x80000		/* redundant environment starts here */
+#define CFG_ENV_SIZE    	0x20000 	/* 1 sector = 128kB */
+#endif
 
 #ifdef CFG_ENV_IS_IN_DATAFLASH
 #define CFG_ENV_OFFSET			0x4000
@@ -293,7 +206,6 @@
 #define CFG_ENV_SIZE			0x4000  /* 0x8000 */
 #endif
 
-
 #ifdef CFG_ENV_IS_IN_FLASH
 #define CFG_ENV_ADDR			(PHYS_FLASH_1 + 0xe000)  /* between boot.bin and u-boot.bin.gz */
 #define CFG_ENV_SIZE			0x2000  /* 0x8000 */
diff --git a/include/configs/at91sam9g20ek.h b/include/configs/at91sam9g20ek.h
index 306f294083..81eb84eca9 100644
--- a/include/configs/at91sam9g20ek.h
+++ b/include/configs/at91sam9g20ek.h
@@ -36,7 +36,6 @@
 /* ARM asynchronous clock */
 #define AT91C_MASTER_CLOCK	132096000	/* peripheral clock */
 
-
 #define AT91_SLOW_CLOCK		32768	/* slow clock */
 
 #define CFG_HZ 			1000
@@ -115,21 +114,20 @@
 /* These timings are specific to MT29F2G16AAB 256Mb (Micron) 
  * at MCK = 100 MHZ
  */
-
-#define AT91C_SM_NWE_SETUP	(0 << 0)
+#define AT91C_SM_NWE_SETUP	(2 << 0)
 #define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-#define AT91C_SM_NRD_SETUP	(0 << 16)
+#define AT91C_SM_NRD_SETUP	(2 << 16)
 #define AT91C_SM_NCS_RD_SETUP	(0 << 24)
   
 #define AT91C_SM_NWE_PULSE 	(4 << 0)
-#define AT91C_SM_NCS_WR_PULSE	(6 << 8)
-#define AT91C_SM_NRD_PULSE	(3 << 16)
-#define AT91C_SM_NCS_RD_PULSE	(5 << 24)
+#define AT91C_SM_NCS_WR_PULSE	(4 << 8)
+#define AT91C_SM_NRD_PULSE	(4 << 16)
+#define AT91C_SM_NCS_RD_PULSE	(4 << 24)
   
-#define AT91C_SM_NWE_CYCLE 	(6 << 0)
-#define AT91C_SM_NRD_CYCLE	(5 << 16)
+#define AT91C_SM_NWE_CYCLE 	(7 << 0)
+#define AT91C_SM_NRD_CYCLE	(7 << 16)
 
-#define AT91C_SM_TDF	        (1 << 16)		
+#define AT91C_SM_TDF	        (3 << 16)		
 
 
 
@@ -169,10 +167,6 @@
 #define CFG_FLASH_ERASE_TOUT		(2*CFG_HZ) /* Timeout for Flash Erase */
 #define CFG_FLASH_WRITE_TOUT		(2*CFG_HZ) /* Timeout for Flash Write */
 
-#undef	CFG_ENV_IS_IN_FLASH
-#define	CFG_ENV_IS_IN_DATAFLASH         1
-#undef CFG_ENV_IS_IN_NAND              
-
 #ifdef CFG_ENV_IS_IN_NAND
 #define CFG_ENV_OFFSET		0x60000		/* environment starts here  */
 #define	CFG_ENV_OFFSET_REDUND	0x80000		/* redundant environment starts here */
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index 1618df1dd7..0be53dd622 100644
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -51,7 +51,7 @@
 /*
  * Size of malloc() pool
  */
-#define CFG_MALLOC_LEN	(CFG_ENV_SIZE + 128*1024)
+#define CFG_MALLOC_LEN	(3*CFG_ENV_SIZE + 128*1024)
 #define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
 
 #define CONFIG_BAUDRATE         115200
@@ -111,20 +111,20 @@
  * at MCK = 100 MHZ
  */
 
-#define AT91C_SM_NWE_SETUP	(0 << 0)
+#define AT91C_SM_NWE_SETUP	(1 << 0)
 #define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-#define AT91C_SM_NRD_SETUP	(0 << 16)
+#define AT91C_SM_NRD_SETUP	(1 << 16)
 #define AT91C_SM_NCS_RD_SETUP	(0 << 24)
   
-#define AT91C_SM_NWE_PULSE 	(4 << 0)
-#define AT91C_SM_NCS_WR_PULSE	(6 << 8)
+#define AT91C_SM_NWE_PULSE 	(3 << 0)
+#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
 #define AT91C_SM_NRD_PULSE	(3 << 16)
-#define AT91C_SM_NCS_RD_PULSE	(5 << 24)
+#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
   
-#define AT91C_SM_NWE_CYCLE 	(6 << 0)
+#define AT91C_SM_NWE_CYCLE 	(5 << 0)
 #define AT91C_SM_NRD_CYCLE	(5 << 16)
 
-#define AT91C_SM_TDF	        (1 << 16)		
+#define AT91C_SM_TDF	        (2 << 16)		
 
 
 
@@ -157,15 +157,18 @@
 #define CFG_FLASH_ERASE_TOUT		(2*CFG_HZ) /* Timeout for Flash Erase */
 #define CFG_FLASH_WRITE_TOUT		(2*CFG_HZ) /* Timeout for Flash Write */
 
-#define	CFG_ENV_IS_IN_DATAFLASH         1
-#undef  CFG_ENV_IS_IN_FLASH
-
 #ifdef CFG_ENV_IS_IN_DATAFLASH
 #define CFG_ENV_OFFSET			0x4000
 #define CFG_ENV_ADDR			(CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
 #define CFG_ENV_SIZE			0x4000  /* 0x8000 */
 #endif
 
+#ifdef CFG_ENV_IS_IN_NAND
+#define CFG_ENV_OFFSET		0x60000		/* environment starts here  */
+#define	CFG_ENV_OFFSET_REDUND	0x80000		/* redundant environment starts here */
+#define CFG_ENV_SIZE    	0x20000 	/* 1 sector = 128kB */
+#endif
+
 #ifdef CFG_ENV_IS_IN_FLASH
 #ifdef CONFIG_BOOTBINFUNC
 #define CFG_ENV_ADDR			(PHYS_FLASH_1 + 0x60000)  /* after u-boot.bin */
diff --git a/tools/logos/atmel.bmp b/tools/logos/atmel.bmp
deleted file mode 100644
index 3c445c9bc3..0000000000
--- a/tools/logos/atmel.bmp
+++ /dev/null