diff options
author | Tom Rini <trini@ti.com> | 2015-02-02 12:37:34 -0500 |
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committer | Tom Rini <trini@ti.com> | 2015-02-02 12:37:34 -0500 |
commit | 37ffffb98d78c46c840fa6e3c835d915c4247827 (patch) | |
tree | 9ecc87c3bdb7b3c821798fee7ef64bf73a5e597f /arch/arm/cpu/armv7/omap3/sdrc.c | |
parent | ade8bc14ad419f698406b162c9c5dfeee7406b4c (diff) | |
parent | f3b4bc458de3285a04c5f60df6372ad5ca79fa60 (diff) |
Merge branch 'master' of git://git.denx.de/u-boot-ti
Diffstat (limited to 'arch/arm/cpu/armv7/omap3/sdrc.c')
-rw-r--r-- | arch/arm/cpu/armv7/omap3/sdrc.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c index 7a291318ab..4f15ac9cb5 100644 --- a/arch/arm/cpu/armv7/omap3/sdrc.c +++ b/arch/arm/cpu/armv7/omap3/sdrc.c @@ -135,6 +135,9 @@ void do_sdrc_init(u32 cs, u32 early) sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE; sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE; + /* set some default timings */ + timings.sharing = SDRC_SHARING; + /* * When called in the early context this may be SPL and we will * need to set all of the timings. This ends up being board @@ -145,6 +148,7 @@ void do_sdrc_init(u32 cs, u32 early) * setup CS1. */ #ifdef CONFIG_SPL_BUILD + /* set/modify board-specific timings */ get_board_mem_timings(&timings); #endif if (early) { @@ -155,7 +159,7 @@ void do_sdrc_init(u32 cs, u32 early) writel(0, &sdrc_base->sysconfig); /* setup sdrc to ball mux */ - writel(SDRC_SHARING, &sdrc_base->sharing); + writel(timings.sharing, &sdrc_base->sharing); /* Disable Power Down of CKE because of 1 CKE on combo part */ writel(WAKEUPPROC | SRFRONRESET | PAGEPOLICY_HIGH, |