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authorThierry Reding <treding@nvidia.com>2014-08-26 17:34:15 +0200
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2014-10-11 01:12:00 +0200
commit7cd58eb14318672276a50cffc1a320c10d371589 (patch)
tree1983919b6c0b384345147230709667e5ab0cc71e /board
parent4fcf4bf0cef2d5bd3b1670426ae0671c0c66ea1e (diff)
ARM: tegra: Enable PCIe on Cardhu
The PCIe bus on Cardhu is routed to the dock connector. An ethernet NIC is available on the dock over the PCIe bus. Enable the PCIe controller and the network device driver so that the device can boot over the network. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'board')
-rw-r--r--board/nvidia/cardhu/cardhu.c56
1 files changed, 56 insertions, 0 deletions
diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c
index cc0e5e130f..7893bc3db8 100644
--- a/board/nvidia/cardhu/cardhu.c
+++ b/board/nvidia/cardhu/cardhu.c
@@ -8,8 +8,11 @@
#include <common.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/gp_padctrl.h>
+#include <asm/arch/gpio.h>
+#include <asm/gpio.h>
#include "pinmux-config-cardhu.h"
#include <i2c.h>
+#include <netdev.h>
#define PMU_I2C_ADDRESS 0x2D
#define MAX_I2C_RETRY 3
@@ -76,3 +79,56 @@ void pin_mux_mmc(void)
board_sdmmc_voltage_init();
}
#endif /* MMC */
+
+#ifdef CONFIG_PCI_TEGRA
+int tegra_pcie_board_init(void)
+{
+ unsigned int old_bus;
+ u8 addr, data[1];
+ int err;
+
+ old_bus = i2c_get_bus_num();
+
+ err = i2c_set_bus_num(0);
+ if (err) {
+ debug("failed to set I2C bus\n");
+ return err;
+ }
+
+ /* TPS659110: LDO1_REG = 1.05V, ACTIVE */
+ data[0] = 0x15;
+ addr = 0x30;
+
+ err = i2c_write(PMU_I2C_ADDRESS, addr, 1, data, 1);
+ if (err) {
+ debug("failed to set VDD supply\n");
+ return err;
+ }
+
+ /* GPIO: PEX = 3.3V */
+ err = gpio_request(GPIO_PL7, "PEX");
+ if (err < 0)
+ return err;
+
+ gpio_direction_output(GPIO_PL7, 1);
+
+ /* TPS659110: LDO2_REG = 1.05V, ACTIVE */
+ data[0] = 0x15;
+ addr = 0x31;
+
+ err = i2c_write(PMU_I2C_ADDRESS, addr, 1, data, 1);
+ if (err) {
+ debug("failed to set AVDD supply\n");
+ return err;
+ }
+
+ i2c_set_bus_num(old_bus);
+
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ return pci_eth_init(bis);
+}
+#endif /* PCI */