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authorTom Rini <trini@konsulko.com>2016-11-02 09:41:20 -0400
committerTom Rini <trini@konsulko.com>2016-11-02 09:41:20 -0400
commit7fd117389ec7bbd0ce2fbb98ce47c20f5b8a0cfb (patch)
treee3cac6c8365b63bfa1e5251eebec7f1bf68ac098 /drivers/clk/rockchip/clk_rk3288.c
parentd8bdfc80da39211d95f10d24e79f2e867305f71b (diff)
parent4594ac07847f5c7fe7294ce6c71849fea0a431e0 (diff)
Merge git://git.denx.de/u-boot-rockchip
Diffstat (limited to 'drivers/clk/rockchip/clk_rk3288.c')
-rw-r--r--drivers/clk/rockchip/clk_rk3288.c21
1 files changed, 0 insertions, 21 deletions
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index bd71a96927..ed97e87a95 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -30,12 +30,6 @@ struct rk3288_clk_plat {
#endif
};
-struct rk3288_clk_priv {
- struct rk3288_grf *grf;
- struct rk3288_cru *cru;
- ulong rate;
-};
-
struct pll_div {
u32 nr;
u32 nf;
@@ -140,21 +134,6 @@ static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 1);
static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2);
static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);
-void *rockchip_get_cru(void)
-{
- struct rk3288_clk_priv *priv;
- struct udevice *dev;
- int ret;
-
- ret = rockchip_get_clk(&dev);
- if (ret)
- return ERR_PTR(ret);
-
- priv = dev_get_priv(dev);
-
- return priv->cru;
-}
-
static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
const struct pll_div *div)
{