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authorYe Li <ye.li@nxp.com>2017-04-28 09:36:57 -0500
committerYe Li <ye.li@nxp.com>2018-04-27 02:21:25 -0700
commit8cca3efba0d508b2c267f8a32b302970dd05244d (patch)
treeed171cc93703918b51855936db1dce3583f5242a /drivers/gpio
parent74d68c1b9f098c44992d591616372f0ec5ff13dd (diff)
MLK-14938-22 mxc_gpio: Change to get value from DR register
Currently the driver gets value from PSR register, but this register is only for input mode. For output mode, it always return 0 not the value we set for output. This patch changes to use DR register, which returns the DR value for output mode, and PSR value for input mode. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 4afc3f90943c6b117f79b66d2cd04e64f437b0c2)
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/mxc_gpio.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index 37b8e0ae62..85e469e458 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -169,7 +169,7 @@ int gpio_get_value(unsigned gpio)
regs = (struct gpio_regs *)gpio_ports[port];
- val = (readl(&regs->gpio_psr) >> gpio) & 0x01;
+ val = (readl(&regs->gpio_dr) >> gpio) & 0x01;
RDC_SPINLOCK_DOWN(port);
@@ -254,7 +254,7 @@ static void mxc_gpio_bank_set_value(struct gpio_regs *regs, int offset,
static int mxc_gpio_bank_get_value(struct gpio_regs *regs, int offset)
{
- return (readl(&regs->gpio_psr) >> offset) & 0x01;
+ return (readl(&regs->gpio_dr) >> offset) & 0x01;
}
/* set GPIO pin 'gpio' as an input */