diff options
| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2015-07-12 02:22:50 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2015-07-12 02:22:50 +0200 |
| commit | 5a472ddd7a2a017747d6c05c65eba2cd3804c02f (patch) | |
| tree | bfd3fe2716296254959d3684f7c2591fff3582d7 /drivers/video/tegra.c | |
| parent | 652004b987cb046bd5f5a1a04d1c9d47b01a7ab9 (diff) | |
tegra: lcd: video: integrate display driver for t30
On popular request make the display driver from T20 work on T30 as
well. Turned out to be quite straight forward. However a few notes
about some things encountered during porting: Of course the T30 device
tree was completely missing host1x as well as PWM support but it turns
out this can simply be copied from T20. The only trouble compiling the
Tegra video driver for T30 had to do with some hard-coded PWM pin
muxing for T20 which is quite ugly anyway. On T30 this gets handled by
a board specific complete pin muxing table. The older Chromium U-Boot
2011.06 which to my knowledge was the only prior attempt at enabling a
display driver for T30 for whatever reason got some clocking stuff
mixed up. Turns out at least for a single display controller T20 and
T30 can be clocked quite similar. Enjoy.
Diffstat (limited to 'drivers/video/tegra.c')
| -rw-r--r-- | drivers/video/tegra.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/video/tegra.c b/drivers/video/tegra.c index b8f3431f24..5a5afb9413 100644 --- a/drivers/video/tegra.c +++ b/drivers/video/tegra.c @@ -13,8 +13,8 @@ #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> -#include <asm/arch/pwm.h> -#include <asm/arch/display.h> +#include <asm/arch-tegra/pwm.h> +#include <asm/arch-tegra/display.h> #include <asm/arch-tegra/timer.h> DECLARE_GLOBAL_DATA_PTR; @@ -215,8 +215,10 @@ static int handle_stage(const void *blob) break; case STAGE_PWM: /* Enable PWM at 15/16 high, 32768 Hz with divider 1 */ +#ifdef CONFIG_MACH_T20 pinmux_set_func(PMUX_PINGRP_GPU, PMUX_FUNC_PWM); pinmux_tristate_disable(PMUX_PINGRP_GPU); +#endif pwm_enable(config.pwm_channel, 32768, 0xdf, 1); break; |