diff options
| author | Simon Glass <sjg@chromium.org> | 2016-10-01 20:04:50 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2016-10-30 13:29:06 -0600 |
| commit | 92ac73e4c2579444ee5017f37aa61e116ccf15c9 (patch) | |
| tree | b4bc58e9ca001fdcf7392892516672d93a346e6d /drivers | |
| parent | 8dfb4a28f5645874d9b47cffe44055a3a71ca78b (diff) | |
rockchip: rk3036: Move rockchip_get_cru() out of the driver
This function is called from outside the driver. It should be placed into
common SoC code. Move it.
Also rename the driver symbol to be more consistent with the other rockchip
clock drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/rockchip/clk_rk3036.c | 24 |
1 files changed, 1 insertions, 23 deletions
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c index 8899b0c62d..7e3bf96944 100644 --- a/drivers/clk/rockchip/clk_rk3036.c +++ b/drivers/clk/rockchip/clk_rk3036.c @@ -19,11 +19,6 @@ DECLARE_GLOBAL_DATA_PTR; -struct rk3036_clk_priv { - struct rk3036_cru *cru; - ulong rate; -}; - enum { VCO_MAX_HZ = 2400U * 1000000, VCO_MIN_HZ = 600 * 1000000, @@ -49,23 +44,6 @@ enum { static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1); static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1); -void *rockchip_get_cru(void) -{ - struct udevice *dev; - fdt_addr_t addr; - int ret; - - ret = uclass_get_device(UCLASS_CLK, 0, &dev); - if (ret) - return ERR_PTR(ret); - - addr = dev_get_addr(dev); - if (addr == FDT_ADDR_T_NONE) - return ERR_PTR(-EINVAL); - - return (void *)addr; -} - static int rkclk_set_pll(struct rk3036_cru *cru, enum rk_clk_id clk_id, const struct pll_div *div) { @@ -371,7 +349,7 @@ static const struct udevice_id rk3036_clk_ids[] = { { } }; -U_BOOT_DRIVER(clk_rk3036) = { +U_BOOT_DRIVER(rockchip_rk3036_cru) = { .name = "clk_rk3036", .id = UCLASS_CLK, .of_match = rk3036_clk_ids, |