diff options
124 files changed, 2736 insertions, 1448 deletions
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index cfe5657bf8..a776306e4c 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -23,7 +23,7 @@ stages: stage: all-in-one-stage before_script: # Clone uboot-test-hooks - - git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks + - git clone --depth=1 https://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks - ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname` - ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname` - grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd @@ -71,7 +71,7 @@ build all 64bit Toradex boards: variables: ARCH: arm64 CROSS_COMPILE: /opt/gcc-7.3.0-nolibc/aarch64-linux/bin/aarch64-linux- - TARGETS: "apalis-imx8 apalis-imx8x colibri-imx8x verdin-imx8mm verdin-imx8mp" + TARGETS: "apalis-imx8 colibri-imx8x verdin-imx8mm verdin-imx8mp" script: | for TARGET in $TARGETS; do echo -ne "#\n#\n#\n#\n#\n#\n# Building ${TARGET}\n#\n#\n#\n#\n#\n#\n" diff --git a/.travis.yml b/.travis.yml index c59bd7790b..84c1634768 100644 --- a/.travis.yml +++ b/.travis.yml @@ -43,7 +43,7 @@ addons: install: # Clone uboot-test-hooks - - git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks + - git clone --depth=1 https://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks - ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname` - ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname` # prepare buildman environment diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 3174f2e2a5..82000449f7 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -766,7 +766,6 @@ dtb-$(CONFIG_ARCH_IMX8) += \ fsl-imx8qm-mek-auto.dtb \ imx8qm-rom7720-a1.dtb \ fsl-imx8qxp-ai_ml.dtb \ - fsl-imx8qxp-apalis.dtb \ fsl-imx8qxp-colibri.dtb \ fsl-imx8qxp-mek.dtb \ fsl-imx8qxp-lpddr4-val.dtb \ diff --git a/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi index e0ee0ec694..54ce05fa6d 100644 --- a/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi @@ -139,6 +139,12 @@ &gpio4 { u-boot,dm-pre-proper; + + usbh_en { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + }; }; &gpio5 { @@ -179,6 +185,7 @@ }; &usbotg1 { + dr_mode = "host"; u-boot,dm-pre-proper; }; diff --git a/arch/arm/dts/fsl-imx8qxp-apalis-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-apalis-u-boot.dtsi deleted file mode 100644 index b0aed20904..0000000000 --- a/arch/arm/dts/fsl-imx8qxp-apalis-u-boot.dtsi +++ /dev/null @@ -1,187 +0,0 @@ -/ { - - aliases { - usbhost1 = &usbh3; - usbgadget0 = &usbg1; - }; - - usbh3: usbh3 { - compatible = "Cadence,usb3-host"; - dr_mode = "host"; - cdns3,usb = <&usbotg3>; - status = "okay"; - }; - - usbg1: usbg1 { - compatible = "fsl,imx27-usb-gadget"; - dr_mode = "peripheral"; - chipidea,usb = <&usbotg1>; - status = "okay"; - u-boot,dm-pre-proper; - }; - -}; - -&{/imx8qx-pm} { - - u-boot,dm-pre-proper; -}; - -&mu { - u-boot,dm-pre-proper; -}; - -&clk { - u-boot,dm-pre-proper; -}; - -&iomuxc { - u-boot,dm-pre-proper; -}; - -&pd_lsio { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio0 { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio1 { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio2 { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio3 { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio4 { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio5 { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio6 { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio7 { - u-boot,dm-pre-proper; -}; - -&pd_dma { - u-boot,dm-pre-proper; -}; - -&pd_dma_lpuart0 { - u-boot,dm-pre-proper; -}; - -&pd_dma_lpuart3 { - u-boot,dm-pre-proper; -}; - -&pd_conn { - u-boot,dm-pre-proper; -}; - -&pd_conn_usbotg0 { - u-boot,dm-spl; -}; - -&pd_conn_usbotg0_phy { - u-boot,dm-spl; -}; - -&pd_conn_usb2 { - u-boot,dm-spl; -}; - -&pd_conn_usb2_phy { - u-boot,dm-spl; -}; - -&pd_conn_sdch0 { - u-boot,dm-pre-proper; -}; - -&pd_conn_sdch1 { - u-boot,dm-pre-proper; -}; - -&pd_conn_sdch2 { - u-boot,dm-pre-proper; -}; - -&gpio0 { - u-boot,dm-pre-proper; -}; - -&gpio1 { - u-boot,dm-pre-proper; -}; - -&gpio2 { - u-boot,dm-pre-proper; -}; - -&gpio3 { - u-boot,dm-pre-proper; -}; - -&gpio4 { - u-boot,dm-pre-proper; -}; - -&gpio5 { - u-boot,dm-pre-proper; -}; - -&gpio6 { - u-boot,dm-pre-proper; -}; - -&gpio7 { - u-boot,dm-pre-proper; -}; - -&lpuart3 { - u-boot,dm-pre-proper; -}; - -&usdhc1 { - u-boot,dm-pre-proper; - /delete-property/ assigned-clock-parents; -}; - -&usdhc2 { - u-boot,dm-pre-proper; - /delete-property/ assigned-clock-parents; -}; - -&usbphy1 { - u-boot,dm-pre-proper; -}; - -&usbotg1 { - dr_mode = "otg"; - u-boot,dm-pre-proper; -}; - -&usbotg3 { - phys = <&usbphynop1>; - u-boot,dm-pre-proper; -}; - -&usbphynop1 { - compatible = "cdns,usb3-phy"; - reg = <0x0 0x5B160000 0x0 0x40000>; - #phy-cells = <0>; - u-boot,dm-pre-proper; -}; diff --git a/arch/arm/dts/fsl-imx8qxp-apalis.dts b/arch/arm/dts/fsl-imx8qxp-apalis.dts deleted file mode 100644 index 76b9f3850d..0000000000 --- a/arch/arm/dts/fsl-imx8qxp-apalis.dts +++ /dev/null @@ -1,308 +0,0 @@ -/* - * Copyright 2017 NXP - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/dts-v1/; - -#include "fsl-imx8qxp.dtsi" -#include "fsl-imx8qxp-apalis-u-boot.dtsi" - -/ { - model = "Toradex Apalis iMX8X"; - compatible = "toradex,apalis-imx8x", "fsl,imx8qxp"; - - chosen { - bootargs = "console=ttyLP1,115200"; - stdout-path = &lpuart1; - }; - - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_usb_otg1_vbus: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "usb_otg1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - }; -}; - -&gpio4 { - usb_host_vbus { - gpio-hog; - gpios = <4 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "USBH_EN"; - }; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog0>, <&pinctrl_hog1>, <&pinctrl_reset_moci>, <&pinctrl_usbh_en>; - - apalis-imx8x { - /* Apalis UART1 */ - pinctrl_lpuart1: lpuart1grp { - fsl,pins = < - SC_P_UART1_RX_ADMA_UART1_RX 0x06000020 /* SODIMM 118 */ - SC_P_UART1_TX_ADMA_UART1_TX 0x06000020 /* SODIMM 112 */ - >; - }; - - /* On-module Gigabit Ethernet PHY Micrel KSZ9031 */ - pinctrl_fec1: fec1grp { - fsl,pins = < - SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD 0x14a0 - SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1_PAD 0x14a0 - SC_P_ENET0_MDC_CONN_ENET0_MDC 0x06000020 - SC_P_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 - SC_P_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x61 - SC_P_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x61 - SC_P_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x61 - SC_P_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x61 - SC_P_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x61 - SC_P_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x61 - SC_P_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x61 - SC_P_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x61 - SC_P_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x61 - SC_P_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x61 - SC_P_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x61 - SC_P_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x61 - /* On-module ETH_RESET# */ - SC_P_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04 0x06000020 - /* On-module ETH_INT# */ - SC_P_ADC_IN2_LSIO_GPIO1_IO12 0x21 - >; - }; - - /* Apalis BKL_ON */ - pinctrl_gpio_bkl_on: gpio-bkl-on { - fsl,pins = < - SC_P_QSPI0A_DQS_LSIO_GPIO3_IO13 0x40 /* SODIMM 286 */ - >; - }; - - pinctrl_hog0: hog0grp { - fsl,pins = < - SC_P_COMP_CTL_GPIO_1V8_3V3_GPIORHB_PAD 0x000514a0 - >; - }; - - pinctrl_hog1: hog1grp { - fsl,pins = < - /* Apalis USBO1_EN */ - SC_P_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x41 /* SODIMM 274 */ - >; - }; - - /* Apalis RESET_MOCI# */ - pinctrl_reset_moci: gpioresetmocigrp { - fsl,pins = < - SC_P_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x21 - >; - }; - - /* On-module eMMC */ - pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - SC_P_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 - SC_P_EMMC0_CMD_CONN_EMMC0_CMD 0x21 - SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 - SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 - SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 - SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 - SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 - SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 - SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 - SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 - SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 - SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 - >; - }; - - pinctrl_usdhc1_100mhz: usdhc1grp100mhz { - fsl,pins = < - SC_P_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 - SC_P_EMMC0_CMD_CONN_EMMC0_CMD 0x21 - SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 - SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 - SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 - SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 - SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 - SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 - SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 - SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 - SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 - SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 - >; - }; - - pinctrl_usdhc1_200mhz: usdhc1grp200mhz { - fsl,pins = < - SC_P_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 - SC_P_EMMC0_CMD_CONN_EMMC0_CMD 0x21 - SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 - SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 - SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 - SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 - SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 - SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 - SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 - SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 - SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 - SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 - >; - }; - - /* Apalis MMC1_CD# */ - pinctrl_usdhc2_gpio: mmc1gpiogrp { - fsl,pins = < - SC_P_USDHC1_CD_B_LSIO_GPIO4_IO22 0x06000021 /* SODIMM 164 */ - >; - }; - - pinctrl_usdhc2_gpio_sleep: usdhc1gpioslpgrp { - fsl,pins = < - SC_P_USDHC1_CD_B_LSIO_GPIO4_IO22 0x60 /* SODIMM 164 */ - >; - }; - - /* Apalis USBH_EN */ - pinctrl_usbh_en: usbhen { - fsl,pins = < - SC_P_USB_SS3_TC1_LSIO_GPIO4_IO04 0x40 /* SODIMM 84 */ - >; - }; - - /* Apalis MMC1 */ - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - SC_P_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 154 */ - SC_P_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 150 */ - SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 160 */ - SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 162 */ - SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 144 */ - SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 146 */ - SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; - }; - - pinctrl_usdhc2_100mhz: usdhc2grp100mhz { - fsl,pins = < - SC_P_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 154 */ - SC_P_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 150 */ - SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 160 */ - SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 162 */ - SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 144 */ - SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 146 */ - SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; - }; - - pinctrl_usdhc2_200mhz: usdhc2grp200mhz { - fsl,pins = < - SC_P_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 154 */ - SC_P_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 150 */ - SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 160 */ - SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 162 */ - SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 144 */ - SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 146 */ - SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; - }; - - pinctrl_usdhc2_sleep: usdhc2slpgrp { - fsl,pins = < - SC_P_USDHC1_CLK_LSIO_GPIO4_IO23 0x60 /* SODIMM 154 */ - SC_P_USDHC1_CMD_LSIO_GPIO4_IO24 0x60 /* SODIMM 150 */ - SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 0x60 /* SODIMM 160 */ - SC_P_USDHC1_DATA1_LSIO_GPIO4_IO26 0x60 /* SODIMM 162 */ - SC_P_USDHC1_DATA2_LSIO_GPIO4_IO27 0x60 /* SODIMM 144 */ - SC_P_USDHC1_DATA3_LSIO_GPIO4_IO28 0x60 /* SODIMM 146 */ - SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; - }; - }; -}; - -/* Apalis Gigabit LAN */ -&fec1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec1>; - fsl,magic-packet; - phy-handle = <ðphy0>; - phy-mode = "rgmii"; - phy-reset-duration = <10>; - phy-reset-post-delay = <150>; - phy-reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - ethphy0: ethernet-phy@4 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <4>; - }; - }; -}; - -/* Apalis UART1 */ -&lpuart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lpuart1>; - status = "okay"; -}; - -&usbotg1 { - vbus-supply = <®_usb_otg1_vbus>; - hnp-srp-disable; - disable-over-current; - status = "okay"; -}; - -&usbotg3 { - dr_mode = "host"; - status = "okay"; -}; - -/* On-module eMMC */ -&usdhc1 { - bus-width = <8>; - non-removable; - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz>; - status = "okay"; -}; - -/* Apalis MMC1 */ -&usdhc2 { - bus-width = <4>; - cd-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; - pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; - pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; - pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; - pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>; - disable-wp; - status = "okay"; -}; diff --git a/arch/arm/dts/fsl-imx8qxp-colibri.dtsi b/arch/arm/dts/fsl-imx8qxp-colibri.dtsi index 55440a73fb..88a24f002c 100644 --- a/arch/arm/dts/fsl-imx8qxp-colibri.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-colibri.dtsi @@ -140,6 +140,13 @@ >; }; + pinctrl_i2c0: i2c0grp { + fsl,pins = < + SC_P_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL 0x0C000020 + SC_P_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA 0x0C000020 + >; + }; + /*INT*/ pinctrl_usb3503a: usb3503a-grp { fsl,pins = < @@ -315,6 +322,15 @@ }; }; +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0>; + status = "okay"; +}; + &i2c1 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/dts/imx8mm-ab2-u-boot.dtsi b/arch/arm/dts/imx8mm-ab2-u-boot.dtsi index b19020f70d..37a4e826c8 100644 --- a/arch/arm/dts/imx8mm-ab2-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-ab2-u-boot.dtsi @@ -4,12 +4,23 @@ */ / { + aliases { + usbgadget0 = &usbg1; + }; + firmware { optee { compatible = "linaro,optee-tz"; method = "smc"; }; }; + + usbg1: usbg1 { + compatible = "fsl,imx27-usb-gadget"; + dr_mode = "peripheral"; + chipidea,usb = <&usbotg1>; + status = "okay"; + }; }; &{/soc@0} { diff --git a/arch/arm/dts/imx8mm-ab2.dts b/arch/arm/dts/imx8mm-ab2.dts index 4f346c20c0..442a7188ee 100644 --- a/arch/arm/dts/imx8mm-ab2.dts +++ b/arch/arm/dts/imx8mm-ab2.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include <dt-bindings/usb/pd.h> #include "imx8mm.dtsi" / { @@ -455,6 +456,31 @@ scl-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; sda-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; status = "okay"; + + ptn5150: tcpc@1d { + compatible = "nxp,ptn5150"; + reg = <0x1d>; + status = "okay"; + + port { + typec1_dr_sw: endpoint { + remote-endpoint = <&usb1_drd_sw>; + }; + }; + + typec1_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + power-role = "dual"; + data-role = "dual"; + try-power-role = "sink"; + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM) + PDO_VAR(5000, 20000, 3000)>; + op-sink-microwatt = <15000000>; + self-powered; + }; + }; }; &i2c3 { @@ -498,6 +524,23 @@ status = "okay"; }; +&usbotg1 { + picophy,pre-emp-curr-control = <3>; + picophy,dc-vol-level-adjust = <7>; + dr_mode = "host"; + hnp-disable; + srp-disable; + adp-disable; + usb-role-switch; + status = "okay"; + + port { + usb1_drd_sw: endpoint { + remote-endpoint = <&typec1_dr_sw>; + }; + }; +}; + &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog>; diff --git a/arch/arm/dts/imx8mm-verdin.dts b/arch/arm/dts/imx8mm-verdin.dts index e134a13fb9..2c08a92550 100644 --- a/arch/arm/dts/imx8mm-verdin.dts +++ b/arch/arm/dts/imx8mm-verdin.dts @@ -107,6 +107,14 @@ assigned-clock-rates = <786432000>, <722534400>; }; +&cpu_alert0 { + temperature = <95000>; +}; + +&cpu_crit0 { + temperature = <105000>; +}; + &fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec1>; @@ -451,38 +459,38 @@ imx8mm-verdin { pinctrl_can1_int: can1intgrp { fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x1c4 + MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x146 >; }; pinctrl_can2_int: can2intgrp { fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x1c4 + MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x106 >; }; pinctrl_ecspi2: ecspi2grp { fsl,pins = < - MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x4 /* SODIMM 196 */ - MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x4 /* SODIMM 200 */ - MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x1c4 /* SODIMM 198 */ - MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x1c4 /* SODIMM 202 */ + MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x6 /* SODIMM 196 */ + MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x6 /* SODIMM 200 */ + MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x6 /* SODIMM 198 */ + MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x6 /* SODIMM 202 */ >; }; pinctrl_ecspi3: ecspi3grp { fsl,pins = < - MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x4 - MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x4 - MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x1c4 - MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x1c4 - MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x1c4 + MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x6 + MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x6 + MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x6 + MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x6 + MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x146 >; }; pinctrl_fec1: fec1grp { fsl,pins = < - MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 + MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f @@ -496,108 +504,108 @@ MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f - MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x1c4 + MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x146 >; }; pinctrl_flexspi0: flexspi0grp { fsl,pins = < - MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2 /* SODIMM 52 */ - MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82 /* SODIMM 54 */ - MX8MM_IOMUXC_NAND_CE1_B_QSPI_A_SS1_B 0x82 /* SODIMM 64 */ - MX8MM_IOMUXC_NAND_DQS_QSPI_A_DQS 0x82 /* SODIMM 66 */ - MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82 /* SODIMM 56 */ - MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82 /* SODIMM 58 */ - MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82 /* SODIMM 60 */ - MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82 /* SODIMM 62 */ + MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x106 /* SODIMM 52 */ + MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x106 /* SODIMM 54 */ + MX8MM_IOMUXC_NAND_CE1_B_QSPI_A_SS1_B 0x106 /* SODIMM 64 */ + MX8MM_IOMUXC_NAND_DQS_QSPI_A_DQS 0x106 /* SODIMM 66 */ + MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x106 /* SODIMM 56 */ + MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x106 /* SODIMM 58 */ + MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x106 /* SODIMM 60 */ + MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x106 /* SODIMM 62 */ >; }; /* (MEZ_)DSI_1_INT# shared with (MEZ_)GPIO_1 on Verdin Development Board */ pinctrl_gpio_hpd: gpiohpdgrp { fsl,pins = < - MX8MM_IOMUXC_NAND_RE_B_GPIO3_IO15 0x184 /* SODIMM 17 */ + MX8MM_IOMUXC_NAND_RE_B_GPIO3_IO15 0x146 /* SODIMM 17 */ >; }; /* (MEZ_)GPIO_1 shared with (MEZ_)DSI_1_INT# on Verdin Development Board */ pinctrl_gpio1: gpio1grp { fsl,pins = < - MX8MM_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x184 /* SODIMM 206 */ + MX8MM_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x106 /* SODIMM 206 */ >; }; pinctrl_gpio2: gpio2grp { fsl,pins = < - MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x184 /* SODIMM 208 */ + MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x106 /* SODIMM 208 */ >; }; pinctrl_gpio3: gpio3grp { fsl,pins = < - MX8MM_IOMUXC_UART3_RXD_GPIO5_IO26 0x184 /* SODIMM 210 */ + MX8MM_IOMUXC_UART3_RXD_GPIO5_IO26 0x106 /* SODIMM 210 */ >; }; pinctrl_gpio4: gpio4grp { fsl,pins = < - MX8MM_IOMUXC_UART3_TXD_GPIO5_IO27 0x184 /* SODIMM 212 */ + MX8MM_IOMUXC_UART3_TXD_GPIO5_IO27 0x106 /* SODIMM 212 */ >; }; pinctrl_gpio5: gpio5grp { fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x184 /* SODIMM 216 */ + MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x106 /* SODIMM 216 */ >; }; pinctrl_gpio6: gpio6grp { fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x184 /* SODIMM 218 */ + MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x106 /* SODIMM 218 */ >; }; pinctrl_gpio7: gpio7grp { fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x184 /* SODIMM 220 */ + MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x106 /* SODIMM 220 */ >; }; pinctrl_gpio8: gpio8grp { fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x184 /* SODIMM 222 */ + MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x106 /* SODIMM 222 */ >; }; /* On Module I2C */ pinctrl_i2c1: i2c1grp { fsl,pins = < - MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c6 - MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c6 + MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000146 + MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x40000146 >; }; /* Verdin I2C_4_CSI */ pinctrl_i2c2: i2c2grp { fsl,pins = < - MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c6 /* SODIMM 55 */ - MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c6 /* SODIMM 53 */ + MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000146 /* SODIMM 55 */ + MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x40000146 /* SODIMM 53 */ >; }; /* Verdin I2C_2_DSI */ pinctrl_i2c3: i2c3grp { fsl,pins = < - MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c6 /* SODIMM 95 */ - MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c6 /* SODIMM 93 */ + MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000146 /* SODIMM 95 */ + MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x40000146 /* SODIMM 93 */ >; }; /* Verdin I2C_1 */ pinctrl_i2c4: i2c4grp { fsl,pins = < - MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c6 /* SODIMM 14 */ - MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c6 /* SODIMM 12 */ + MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000146 /* SODIMM 14 */ + MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000146 /* SODIMM 12 */ >; }; @@ -610,13 +618,13 @@ pinctrl_pmic: pmicirq { fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41 + MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141 >; }; pinctrl_reg_eth: regethgrp { fsl,pins = < - MX8MM_IOMUXC_SD2_WP_GPIO2_IO20 0x184 + MX8MM_IOMUXC_SD2_WP_GPIO2_IO20 0x146 >; }; @@ -641,58 +649,58 @@ pinctrl_se050_ena: se050enagrp { fsl,pins = < - MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19 0x184 + MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19 0x106 >; }; pinctrl_uart1: uart1grp { fsl,pins = < - MX8MM_IOMUXC_SAI2_RXFS_UART1_TX 0x1c4 /* SODIMM 149 */ - MX8MM_IOMUXC_SAI2_RXC_UART1_RX 0x1c4 /* SODIMM 147 */ + MX8MM_IOMUXC_SAI2_RXFS_UART1_TX 0x146 /* SODIMM 149 */ + MX8MM_IOMUXC_SAI2_RXC_UART1_RX 0x146 /* SODIMM 147 */ >; }; pinctrl_uart2: uart2grp { fsl,pins = < - MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x1c4 /* SODIMM 129 */ - MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x1c4 /* SODIMM 131 */ - MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x1c4 /* SODIMM 133 */ - MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x1c4 /* SODIMM 135 */ + MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x146 /* SODIMM 129 */ + MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x146 /* SODIMM 131 */ + MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x146 /* SODIMM 133 */ + MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x146 /* SODIMM 135 */ >; }; pinctrl_uart3: uart3grp { fsl,pins = < - MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x1c4 /* SODIMM 137 */ - MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x1c4 /* SODIMM 139 */ - MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x1c4 /* SODIMM 141 */ - MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x1c4 /* SODIMM 143 */ + MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x146 /* SODIMM 137 */ + MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x146 /* SODIMM 139 */ + MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x146 /* SODIMM 141 */ + MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x146 /* SODIMM 143 */ >; }; pinctrl_uart4: uart4grp { fsl,pins = < - MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x1c4 /* SODIMM 151 */ - MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x1c4 /* SODIMM 153 */ + MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x146 /* SODIMM 151 */ + MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x146 /* SODIMM 153 */ >; }; pinctrl_reg_usb1_en: regusb1en { fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x184 /* SODIMM 155 */ + MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x106 /* SODIMM 155 */ >; }; pinctrl_reg_usb2_en: regusb2en { fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x184 /* SODIMM 185 */ + MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x106 /* SODIMM 185 */ >; }; pinctrl_usdhc1: usdhc1grp { fsl,pins = < - MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 - MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0 + MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 + MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0 @@ -708,8 +716,8 @@ pinctrl_usdhc1_100mhz: usdhc1grp100mhz { fsl,pins = < - MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194 - MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4 + MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194 + MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4 @@ -725,8 +733,8 @@ pinctrl_usdhc1_200mhz: usdhc1grp200mhz { fsl,pins = < - MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196 - MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6 + MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196 + MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6 @@ -742,102 +750,102 @@ pinctrl_usdhc2_cd: usdhc2cdgrp { fsl,pins = < - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4 /* SODIMM 84 */ + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x6 /* SODIMM 84 */ >; }; pinctrl_usdhc2_pwr_en: usdhc2pwrengrp { fsl,pins = < - MX8MM_IOMUXC_NAND_CLE_GPIO3_IO5 0x184 /* SODIMM 76 */ + MX8MM_IOMUXC_NAND_CLE_GPIO3_IO5 0x6 /* SODIMM 76 */ >; }; pinctrl_usdhc2: usdhc2grp { fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 /* SODIMM 78 */ - MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 /* SODIMM 74 */ - MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 /* SODIMM 80 */ - MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 /* SODIMM 82 */ - MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 /* SODIMM 70 */ - MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 /* SODIMM 72 */ - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x90 /* SODIMM 78 */ + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0xd0 /* SODIMM 74 */ + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xd0 /* SODIMM 80 */ + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xd0 /* SODIMM 82 */ + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xd0 /* SODIMM 70 */ + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xd0 /* SODIMM 72 */ + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x10 >; }; pinctrl_usdhc2_100mhz: usdhc2grp100mhz { fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 - MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 - MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 - MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 - MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 - MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x94 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0xd4 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xd4 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xd4 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xd4 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xd4 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x10 >; }; pinctrl_usdhc2_200mhz: usdhc2grp200mhz { fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 - MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 - MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 - MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 - MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 - MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x96 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0xd6 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xd6 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xd6 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xd6 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xd6 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x10 >; }; pinctrl_usdhc3: usdhc3grp { fsl,pins = < - MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 - MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 - MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 - MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 - MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 - MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x150 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x150 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x150 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x150 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x150 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x150 >; }; pinctrl_usdhc3_100mhz: usdhc3grp100mhz { fsl,pins = < - MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 - MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 - MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 - MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 - MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 - MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x154 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x154 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x154 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x154 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x154 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x154 >; }; pinctrl_usdhc3_200mhz: usdhc3grp200mhz { fsl,pins = < - MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 - MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 - MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 - MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 - MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 - MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x156 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x156 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x156 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x156 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x156 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x156 >; }; pinctrl_wdog: wdoggrp { fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 + MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x166 >; }; pinctrl_wifi_ctrl: wifictrlgrp { fsl,pins = < - MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x1c4 /* WIFI_WKUP_BT */ - MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x1c4 /* WIFI_WKUP_WLAN */ - MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9 0x1c4 /* WIFI_W_WKUP_HOST */ + MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x46 /* WIFI_WKUP_BT */ + MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x46 /* WIFI_WKUP_WLAN */ + MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9 0x146 /* WIFI_W_WKUP_HOST */ >; }; pinctrl_wifi_pwr_en: wifipwrengrp { fsl,pins = < - MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x184 /* PMIC_EN_WIFI */ + MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x6 /* PMIC_EN_WIFI */ >; }; diff --git a/arch/arm/dts/imx8mn-ab2-u-boot.dtsi b/arch/arm/dts/imx8mn-ab2-u-boot.dtsi index d4c5e43477..8b5115b2fb 100644 --- a/arch/arm/dts/imx8mn-ab2-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ab2-u-boot.dtsi @@ -4,12 +4,23 @@ */ / { + aliases { + usbgadget0 = &usbg1; + }; + firmware { optee { compatible = "linaro,optee-tz"; method = "smc"; }; }; + + usbg1: usbg1 { + compatible = "fsl,imx27-usb-gadget"; + dr_mode = "peripheral"; + chipidea,usb = <&usbotg1>; + status = "okay"; + }; }; &{/soc@0} { diff --git a/arch/arm/dts/imx8mn-ab2.dts b/arch/arm/dts/imx8mn-ab2.dts index 9685eeb3d5..119f90b02d 100644 --- a/arch/arm/dts/imx8mn-ab2.dts +++ b/arch/arm/dts/imx8mn-ab2.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include <dt-bindings/usb/pd.h> #include "imx8mn.dtsi" / { @@ -418,6 +419,31 @@ scl-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; sda-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; status = "okay"; + + ptn5150: tcpc@1d { + compatible = "nxp,ptn5150"; + reg = <0x1d>; + status = "okay"; + + port { + typec1_dr_sw: endpoint { + remote-endpoint = <&usb1_drd_sw>; + }; + }; + + typec1_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + power-role = "dual"; + data-role = "dual"; + try-power-role = "sink"; + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM) + PDO_VAR(5000, 20000, 3000)>; + op-sink-microwatt = <15000000>; + self-powered; + }; + }; }; &i2c3 { @@ -498,6 +524,23 @@ status = "okay"; }; +&usbotg1 { + picophy,pre-emp-curr-control = <3>; + picophy,dc-vol-level-adjust = <7>; + dr_mode = "host"; + hnp-disable; + srp-disable; + adp-disable; + usb-role-switch; + status = "okay"; + + port { + usb1_drd_sw: endpoint { + remote-endpoint = <&typec1_dr_sw>; + }; + }; +}; + &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog>; diff --git a/arch/arm/dts/imx8mp-verdin.dts b/arch/arm/dts/imx8mp-verdin.dts index e72b1bd4a9..053f84b627 100644 --- a/arch/arm/dts/imx8mp-verdin.dts +++ b/arch/arm/dts/imx8mp-verdin.dts @@ -16,6 +16,9 @@ eeprom0 = &eeprom_module; eeprom1 = &eeprom_carrier; eeprom2 = &eeprom_mipi_dsi; + /* Ethernet aliases to ensure correct MAC addresses */ + ethernet0 = &eqos; + ethernet1 = &fec; }; chosen { @@ -61,6 +64,14 @@ }; }; +&cpu_alert0 { + temperature = <95000>; +}; + +&cpu_crit0 { + temperature = <105000>; +}; + &eqos { phy-handle = <ðphy0>; phy-mode = "rgmii-id"; diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index b6e84538d1..f6ead7218d 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -97,11 +97,6 @@ config TARGET_APALIS_IMX8 select BOARD_LATE_INIT select IMX8QM -config TARGET_APALIS_IMX8X - bool "Support Apalis iMX8X module" - select BOARD_LATE_INIT - select IMX8QXP - config TARGET_COLIBRI_IMX8X bool "Support Colibri iMX8X module" select BOARD_LATE_INIT @@ -189,7 +184,6 @@ source "board/freescale/imx8dxl_phantom_mek/Kconfig" source "board/freescale/imx8dxl_evk/Kconfig" source "board/advantech/imx8qm_rom7720_a1/Kconfig" source "board/toradex/apalis-imx8/Kconfig" -source "board/toradex/apalis-imx8x/Kconfig" source "board/toradex/colibri-imx8x/Kconfig" source "board/siemens/capricorn/Kconfig" diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index c8fa86c929..8685196912 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -949,18 +949,25 @@ u32 get_cpu_rev(void) u32 id = 0, rev = 0; int ret; + /* returns ID - chip id [4:0], chip revision [9:5]*/ ret = sc_misc_get_control(-1, SC_R_SYSTEM, SC_C_ID, &id); if (ret) return 0; + /* Extract silicon version */ rev = (id >> 5) & 0xf; + /* Extract chip ID and add dummy */ id = (id & 0x1f) + MXC_SOC_IMX8; /* Dummy ID for chip */ - /* 8DXL uses A1/A2, so generate dummy rev to differentiate with B/C */ - if (id == MXC_CPU_IMX8DXL && rev != 0) - rev = 0x10 + rev; + /* 8DXL A1: use dummy rev to differentiate from B */ + if (id == MXC_CPU_IMX8DXL && rev == CHIP_REV_B) + rev = CHIP_REV_A1; + /* 8DXL B0: detect as B instead of C */ + else if (id == MXC_CPU_IMX8DXL && rev == CHIP_REV_C) + rev = CHIP_REV_B; - return (id << 12) | rev; + /* return Chip ID in [31:12] and silicon ver in [11:0]*/ + return (id << 12) | (rev & 0xfff); } static bool check_device_power_off(struct udevice *dev, diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index e93ecd2846..b451ece91f 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -1001,6 +1001,49 @@ static int disable_cpu_nodes(void *blob, u32 disabled_cores) return 0; } +int fixup_thermal_trips(void *blob, const char *name) +{ + int minc, maxc; + int node, trip; + + node = fdt_path_offset(blob, "/thermal-zones"); + if (node < 0) + return node; + + node = fdt_subnode_offset(blob, node, name); + if (node < 0) + return node; + + node = fdt_subnode_offset(blob, node, "trips"); + if (node < 0) + return node; + + get_cpu_temp_grade(&minc, &maxc); + + fdt_for_each_subnode(trip, blob, node) { + const char *type; + int temp, ret; + + type = fdt_getprop(blob, trip, "type", NULL); + if (!type) + continue; + + temp = 0; + if (!strcmp(type, "critical")) { + temp = 1000 * maxc; + } else if (!strcmp(type, "passive")) { + temp = 1000 * (maxc - 10); + } + if (temp) { + ret = fdt_setprop_u32(blob, trip, "temperature", temp); + if (ret) + return ret; + } + } + + return 0; +} + int ft_system_setup(void *blob, bd_t *bd) { #ifdef CONFIG_IMX8MQ @@ -1128,6 +1171,13 @@ usb_modify_speed: disable_cpu_nodes(blob, 2); #endif + if (fixup_thermal_trips(blob, "cpu-thermal")) + printf("Failed to update cpu-thermal trip(s)"); +#ifdef CONFIG_IMX8MP + if (fixup_thermal_trips(blob, "soc-thermal")) + printf("Failed to update soc-thermal trip(s)"); +#endif + return ft_add_optee_node(blob, bd); } #endif diff --git a/board/freescale/imx8mm_ab2/imx8mm_ab2.c b/board/freescale/imx8mm_ab2/imx8mm_ab2.c index 4483a8a81d..544211bec9 100644 --- a/board/freescale/imx8mm_ab2/imx8mm_ab2.c +++ b/board/freescale/imx8mm_ab2/imx8mm_ab2.c @@ -25,6 +25,8 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/mxc_i2c.h> #include <spl.h> +#include <usb.h> +#include "../common/tcpc.h" DECLARE_GLOBAL_DATA_PTR; @@ -121,12 +123,84 @@ int board_phy_config(struct phy_device *phydev) return 0; } +#ifdef CONFIG_USB_TCPC +struct tcpc_port port1; + +struct tcpc_port_config port1_config = { + .i2c_bus = 1, /* i2c2*/ + .addr = 0x1d, + .port_type = TYPEC_PORT_UFP, + .max_snk_mv = 5000, + .max_snk_ma = 3000, + .max_snk_mw = 15000, + .op_snk_mv = 9000, +}; + +static int setup_typec(void) +{ + int ret; + + ret = tcpc_init(&port1, port1_config, NULL); + if (ret) { + printf("%s: tcpc port1 init failed, err=%d\n", __func__, ret); + } + + return ret; +} + +int board_usb_init(int index, enum usb_init_type init) +{ + int ret = 0; + + imx8m_usb_power(index, true); + + if (init == USB_INIT_HOST) + tcpc_setup_dfp_mode(&port1); + else + tcpc_setup_ufp_mode(&port1); + + return ret; +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + int ret = 0; + + if (init == USB_INIT_HOST) + ret = tcpc_disable_src_vbus(&port1); + + imx8m_usb_power(index, false); + + return ret; +} + +int board_ehci_usb_phy_mode(struct udevice *dev) +{ + enum typec_cc_polarity pol; + enum typec_cc_state state; + int ret = 0; + + tcpc_setup_ufp_mode(&port1); + ret = tcpc_get_cc_status(&port1, &pol, &state); + if (!ret) { + if (state == TYPEC_STATE_SRC_RD_RA || state == TYPEC_STATE_SRC_RD) + return USB_INIT_HOST; + } + + return USB_INIT_DEVICE; +} +#endif + int board_init(void) { #ifdef CONFIG_DM_REGULATOR regulators_enable_boot_on(false); #endif +#ifdef CONFIG_USB_TCPC + setup_typec(); +#endif + #ifdef CONFIG_FEC_MXC setup_fec(); #endif diff --git a/board/freescale/imx8mm_ab2/spl.c b/board/freescale/imx8mm_ab2/spl.c index 8dd03906a6..e1dd434242 100644 --- a/board/freescale/imx8mm_ab2/spl.c +++ b/board/freescale/imx8mm_ab2/spl.c @@ -51,7 +51,7 @@ int spl_board_boot_device(enum boot_device boot_dev_spl) case NAND_BOOT: return BOOT_DEVICE_NAND; case USB_BOOT: - return BOOT_DEVICE_NONE; + return BOOT_DEVICE_BOARD; default: return BOOT_DEVICE_NONE; } diff --git a/board/freescale/imx8mp_evk/lpddr4_timing.c b/board/freescale/imx8mp_evk/lpddr4_timing.c index a532595687..2a95580c72 100644..100755 --- a/board/freescale/imx8mp_evk/lpddr4_timing.c +++ b/board/freescale/imx8mp_evk/lpddr4_timing.c @@ -11,6 +11,16 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d400304, 0x1 }, { 0x3d400030, 0x1 }, { 0x3d400000, 0xa3080020 }, +#ifdef CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS + { 0x3d400020, 0x223 }, + { 0x3d400024, 0x124f800 }, + { 0x3d400064, 0x4900a8 }, + { 0x3d400070, 0x1027f90 }, + { 0x3d400074, 0x790 }, + { 0x3d4000d0, 0xc0030495 }, + { 0x3d4000d4, 0x770000 }, + { 0x3d4000dc, 0xc40024 }, +#else { 0x3d400020, 0x1323 }, { 0x3d400024, 0x1e84800 }, { 0x3d400064, 0x7a017c }, @@ -23,9 +33,29 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d4000d0, 0xc00307a3 }, { 0x3d4000d4, 0xc50000 }, { 0x3d4000dc, 0xf4003f }, +#endif { 0x3d4000e0, 0x330000 }, { 0x3d4000e8, 0x660048 }, { 0x3d4000ec, 0x160048 }, +#ifdef CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS + { 0x3d400100, 0x1618141a }, + { 0x3d400104, 0x504a6 }, + { 0x3d40010c, 0x909000 }, + { 0x3d400110, 0xb04060b }, + { 0x3d400114, 0x2030909 }, + { 0x3d400118, 0x1010006 }, + { 0x3d40011c, 0x301 }, + { 0x3d400130, 0x20500 }, + { 0x3d400134, 0xb100002 }, + { 0x3d400138, 0xad }, + { 0x3d400144, 0x78003c }, + { 0x3d400180, 0x2580012 }, + { 0x3d400184, 0x1e0493e }, + { 0x3d400188, 0x0 }, + { 0x3d400190, 0x4938208 }, + { 0x3d400194, 0x80303 }, + { 0x3d4001b4, 0x1308 }, +#else { 0x3d400100, 0x2028222a }, { 0x3d400104, 0x807bf }, { 0x3d40010c, 0xe0e000 }, @@ -43,6 +73,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d400190, 0x49f820e }, { 0x3d400194, 0x80303 }, { 0x3d4001b4, 0x1f0e }, +#endif { 0x3d4001a0, 0xe0400018 }, { 0x3d4001a4, 0xdf00e4 }, { 0x3d4001a8, 0x80000000 }, @@ -50,6 +81,30 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d4001c0, 0x1 }, { 0x3d4001c4, 0x1 }, { 0x3d4000f4, 0xc99 }, +#ifdef CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS + { 0x3d400108, 0x60c1514 }, + { 0x3d400200, 0x16 }, + { 0x3d40020c, 0x0 }, + { 0x3d400210, 0x1f1f }, + { 0x3d400204, 0x80808 }, + { 0x3d400214, 0x7070707 }, + { 0x3d400218, 0x68070707 }, + { 0x3d40021c, 0xf08 }, + { 0x3d400250, 0x1f05 }, + { 0x3d400254, 0x1f }, + { 0x3d400264, 0x90003ff }, + { 0x3d40026c, 0x20003ff }, + { 0x3d400400, 0x111 }, + { 0x3d400408, 0x72ff }, + { 0x3d400494, 0x1000e00 }, + { 0x3d400498, 0x3ff0000 }, + { 0x3d40049c, 0x1000e00 }, + { 0x3d4004a0, 0x3ff0000 }, + { 0x3d402020, 0x21 }, + { 0x3d402024, 0x30d400 }, + { 0x3d402050, 0x20d000 }, + { 0x3d402064, 0xc001c }, +#else { 0x3d400108, 0x9121c1c }, #ifdef CONFIG_IMX8M_DRAM_INLINE_ECC { 0x3d400200, 0x13 }, @@ -83,6 +138,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d402024, 0x30d400 }, { 0x3d402050, 0x20d000 }, { 0x3d402064, 0xc0026 }, +#endif { 0x3d4020dc, 0x840000 }, { 0x3d4020e0, 0x330000 }, { 0x3d4020e8, 0x660048 }, @@ -104,10 +160,17 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d402194, 0x80303 }, { 0x3d4021b4, 0x100 }, { 0x3d4020f4, 0xc99 }, +#ifdef CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS + { 0x3d403020, 0x21 }, + { 0x3d403024, 0xc3500 }, + { 0x3d403050, 0x20d000 }, + { 0x3d403064, 0x30007 }, +#else { 0x3d403020, 0x1021 }, { 0x3d403024, 0xc3500 }, { 0x3d403050, 0x20d000 }, { 0x3d403064, 0x3000a }, +#endif { 0x3d4030dc, 0x840000 }, { 0x3d4030e0, 0x330000 }, { 0x3d4030e8, 0x660048 }, @@ -200,7 +263,11 @@ struct dram_cfg_param ddr_ddrphy_cfg[] = { { 0x7055, 0x1ff }, { 0x8055, 0x1ff }, { 0x9055, 0x1ff }, +#ifdef CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS + { 0x200c5, 0xa }, +#else { 0x200c5, 0x18 }, +#endif { 0x1200c5, 0x7 }, { 0x2200c5, 0x7 }, { 0x2002e, 0x2 }, @@ -279,7 +346,11 @@ struct dram_cfg_param ddr_ddrphy_cfg[] = { { 0x20018, 0x3 }, { 0x20075, 0x4 }, { 0x20050, 0x0 }, +#ifdef CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS + { 0x20008, 0x258 }, +#else { 0x20008, 0x3e8 }, +#endif { 0x120008, 0x64 }, { 0x220008, 0x19 }, { 0x20088, 0x9 }, @@ -1066,6 +1137,38 @@ struct dram_cfg_param ddr_ddrphy_trained_csr[] = { /* P0 message block paremeter for training firmware */ struct dram_cfg_param ddr_fsp0_cfg[] = { +#ifdef CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS + { 0xd0000, 0x0 }, + { 0x54003, 0x960 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x131f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x310 }, + { 0x54019, 0x24c4 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x24c4 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x3 }, + { 0x54032, 0xc400 }, + { 0x54033, 0x3324 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0xc400 }, + { 0x54039, 0x3324 }, +#else { 0xd0000, 0x0 }, { 0x54003, 0xfa0 }, { 0x54004, 0x2 }, @@ -1096,6 +1199,7 @@ struct dram_cfg_param ddr_fsp0_cfg[] = { { 0x54037, 0x1600 }, { 0x54038, 0xf400 }, { 0x54039, 0x333f }, +#endif { 0x5403a, 0x6600 }, { 0x5403b, 0x48 }, { 0x5403c, 0x48 }, @@ -1186,6 +1290,39 @@ struct dram_cfg_param ddr_fsp2_cfg[] = { /* P0 2D message block paremeter for training firmware */ struct dram_cfg_param ddr_fsp0_2d_cfg[] = { { 0xd0000, 0x0 }, +#ifdef CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS + { 0x54003, 0x960 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x61 }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400d, 0x100 }, + { 0x5400f, 0x100 }, + { 0x54010, 0x1f7f }, + { 0x54012, 0x310 }, + { 0x54019, 0x24c4 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x24c4 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x3 }, + { 0x54032, 0xc400 }, + { 0x54033, 0x3324 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0xc400 }, + { 0x54039, 0x3324 }, +#else { 0x54003, 0xfa0 }, { 0x54004, 0x2 }, { 0x54005, 0x2228 }, @@ -1217,6 +1354,7 @@ struct dram_cfg_param ddr_fsp0_2d_cfg[] = { { 0x54037, 0x1600 }, { 0x54038, 0xf400 }, { 0x54039, 0x333f }, +#endif { 0x5403a, 0x6600 }, { 0x5403b, 0x48 }, { 0x5403c, 0x48 }, @@ -1705,10 +1843,16 @@ struct dram_cfg_param ddr_phy_pie[] = { { 0x400d6, 0x20a }, { 0x400d7, 0x20b }, { 0x2003a, 0x2 }, +#ifdef CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS + { 0x2000b, 0x4b }, + { 0x2000c, 0x96 }, + { 0x2000d, 0x5dc }, +#else { 0x200be, 0x3 }, { 0x2000b, 0x7d }, { 0x2000c, 0xfa }, { 0x2000d, 0x9c4 }, +#endif { 0x2000e, 0x2c }, { 0x12000b, 0xc }, { 0x12000c, 0x19 }, @@ -1728,6 +1872,12 @@ struct dram_cfg_param ddr_phy_pie[] = { { 0x90013, 0x6152 }, { 0x20010, 0x5a }, { 0x20011, 0x3 }, +#ifdef CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS + { 0x120010, 0x5a }, + { 0x120011, 0x3 }, + { 0x220010, 0x5a }, + { 0x220011, 0x3 }, +#endif { 0x40080, 0xe0 }, { 0x40081, 0x12 }, { 0x40082, 0xe0 }, @@ -1811,8 +1961,13 @@ struct dram_cfg_param ddr_phy_pie[] = { struct dram_fsp_msg ddr_dram_fsp_msg[] = { { +#ifdef CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS + /* P0 2400mts 1D */ + .drate = 2400, +#else /* P0 4000mts 1D */ .drate = 4000, +#endif .fw_type = FW_1D_IMAGE, .fsp_cfg = ddr_fsp0_cfg, .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), @@ -1832,8 +1987,13 @@ struct dram_fsp_msg ddr_dram_fsp_msg[] = { .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), }, { - /* P0 4000mts 2D */ - .drate = 4000, +#ifdef CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS + /* P0 2400mts 2D */ + .drate = 2400, +#else + /* P0 4000mts 2D */ + .drate = 4000, +#endif .fw_type = FW_2D_IMAGE, .fsp_cfg = ddr_fsp0_2d_cfg, .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), @@ -1852,9 +2012,14 @@ struct dram_timing_info dram_timing = { .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), .ddrphy_pie = ddr_phy_pie, .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), - .fsp_table = { 4000, 400, 100, }, +#ifdef CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS + .fsp_table = { 2400, 400, 100, }, +#else + .fsp_table = { 4000, 400, 100, }, +#endif }; +#ifndef CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS #ifdef CONFIG_IMX8M_DRAM_INLINE_ECC void board_dram_ecc_scrub(void) { @@ -1882,3 +2047,4 @@ void board_dram_ecc_scrub(void) ddrc_inline_ecc_scrub_end(0x0,0x5fffffff); } #endif +#endif diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c index a26bc85633..f3723e947d 100644 --- a/board/freescale/imx8mp_evk/spl.c +++ b/board/freescale/imx8mp_evk/spl.c @@ -194,7 +194,12 @@ int power_init_board(void) * Enable DVS control through PMIC_STBY_REQ and * set B1_ENMODE=1 (ON by PMIC_ON_REQ=H) */ +#ifdef CONFIG_IMX8M_VDD_SOC_850MV + /* set DVS0 to 0.85v for special case*/ + pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x14); +#else pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C); +#endif pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14); pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59); diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c index bb8211dd7c..120810a111 100644 --- a/board/freescale/imx8mq_evk/spl.c +++ b/board/freescale/imx8mq_evk/spl.c @@ -218,6 +218,21 @@ int board_fit_config_name_match(const char *name) } #endif +#define GPR_PCIE_VREG_BYPASS BIT(12) +static void enable_pcie_vreg(bool enable) +{ + struct iomuxc_gpr_base_regs *gpr = + (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; + + if (!enable) { + setbits_le32(&gpr->gpr[14], GPR_PCIE_VREG_BYPASS); + setbits_le32(&gpr->gpr[16], GPR_PCIE_VREG_BYPASS); + } else { + clrbits_le32(&gpr->gpr[14], GPR_PCIE_VREG_BYPASS); + clrbits_le32(&gpr->gpr[16], GPR_PCIE_VREG_BYPASS); + } +} + void board_init_f(ulong dummy) { int ret; @@ -225,6 +240,9 @@ void board_init_f(ulong dummy) /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); + /* PCIE_VPH connects to 3.3v on EVK, enable VREG to generate 1.8V to PHY */ + enable_pcie_vreg(true); + arch_cpu_init(); init_uart_clk(0); diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c index 1add6fba66..b9e390003c 100644 --- a/board/toradex/apalis-imx8/apalis-imx8.c +++ b/board/toradex/apalis-imx8/apalis-imx8.c @@ -17,6 +17,7 @@ #include <env.h> #include <errno.h> #include <linux/libfdt.h> +#include <linux/bitops.h> #include <mmc.h> #include <power-domain.h> @@ -44,11 +45,22 @@ DECLARE_GLOBAL_DATA_PTR; (SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT) | \ (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT)) +#define TDX_USER_FUSE_BLOCK1_A 276 +#define TDX_USER_FUSE_BLOCK1_B 277 +#define TDX_USER_FUSE_BLOCK2_A 278 +#define TDX_USER_FUSE_BLOCK2_B 279 + typedef enum { PCB_VERSION_1_0, PCB_VERSION_1_1 } pcb_rev_t; +struct tdx_user_fuses { + uint16_t pid4; + uint16_t vers; + uint8_t ramid; +}; + static iomux_cfg_t pcb_vers_detect[] = { SC_P_MIPI_DSI0_GPIO0_00 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(PCB_VERS_DETECT), SC_P_MIPI_DSI0_GPIO0_01 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(PCB_VERS_DETECT), @@ -69,12 +81,54 @@ static void setup_iomux_uart(void) imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); } +static uint32_t do_get_tdx_user_fuse(int a, int b) +{ + sc_err_t sciErr; + uint32_t val_a = 0; + uint32_t val_b = 0; + + sciErr = sc_misc_otp_fuse_read(-1, a, &val_a); + if (sciErr != SC_ERR_NONE) { + printf("Error reading out user fuse %d\n", a); + return 0; + } + + sciErr = sc_misc_otp_fuse_read(-1, b, &val_b); + if (sciErr != SC_ERR_NONE) { + printf("Error reading out user fuse %d\n", b); + return 0; + } + + return ((val_a & 0xffff) << 16) | (val_b & 0xffff); +} + +static void get_tdx_user_fuse(struct tdx_user_fuses* tdxuserfuse) +{ + uint32_t fuse_block; + + fuse_block = do_get_tdx_user_fuse(TDX_USER_FUSE_BLOCK2_A, + TDX_USER_FUSE_BLOCK2_B); + + /* + * Fuse block 2 acts as a backup area, if this reads 0 we want to + * use fuse block 1 + */ + if (fuse_block == 0) + fuse_block = do_get_tdx_user_fuse(TDX_USER_FUSE_BLOCK1_A, + TDX_USER_FUSE_BLOCK1_B); + + tdxuserfuse->pid4 = (fuse_block >> 18) & GENMASK(13, 0); + tdxuserfuse->vers = (fuse_block >> 4) & GENMASK(13, 0); + tdxuserfuse->ramid = fuse_block & GENMASK(3, 0); +} + void board_mem_get_layout(uint64_t *phys_sdram_1_start, uint64_t *phys_sdram_1_size, uint64_t *phys_sdram_2_start, uint64_t *phys_sdram_2_size) { uint32_t is_quadplus = 0, val = 0; + struct tdx_user_fuses tdxramfuses; sc_err_t sciErr = sc_misc_otp_fuse_read(-1, 6, &val); if (sciErr == SC_ERR_NONE) { @@ -82,14 +136,33 @@ void board_mem_get_layout(uint64_t *phys_sdram_1_start, is_quadplus = ((val >> 4) & 0x3) != 0x0; } + get_tdx_user_fuse(&tdxramfuses); + *phys_sdram_1_start = PHYS_SDRAM_1; *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; *phys_sdram_2_start = PHYS_SDRAM_2; - if (is_quadplus) - /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */ + + switch (tdxramfuses.ramid) { + case 1: + *phys_sdram_2_size = SZ_2G; + break; + case 2: *phys_sdram_2_size = 0x0UL; - else - *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; + break; + case 3: + *phys_sdram_2_size = SZ_2G; + break; + case 4: + *phys_sdram_2_size = SZ_4G + SZ_2G; + break; + default: + if (is_quadplus) + /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */ + *phys_sdram_2_size = 0x0UL; + else + *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; + break; + } } int board_early_init_f(void) @@ -221,21 +294,25 @@ static pcb_rev_t get_pcb_revision(void) static void select_dt_from_module_version(void) { - char *fdt_env = env_get("fdtfile"); - - switch(get_pcb_revision()) { - case PCB_VERSION_1_0: - if (strcmp(FDT_FILE_V1_0, fdt_env)) { - env_set("fdtfile", FDT_FILE_V1_0); - printf("Detected a V1.0 module, setting " \ - "correct devicetree\n"); -#ifndef CONFIG_ENV_IS_NOWHERE - env_save(); -#endif - } + env_set("soc", "imx8qm"); + env_set("variant", "-v1.1"); + + switch (tdx_hw_tag.prodid) { + /* Select Apalis iMX8QM device trees */ + case APALIS_IMX8QM_IT: + case APALIS_IMX8QM_WIFI_BT_IT: + if (get_pcb_revision() == PCB_VERSION_1_0) + env_set("variant", ""); break; - default: + + /* Select Apalis iMX8QP device trees */ + case APALIS_IMX8QP_WIFI_BT: + case APALIS_IMX8QP: + env_set("soc", "imx8qp"); break; + default: + printf("Unknown Apalis iMX8 module\n"); + return; } } diff --git a/board/toradex/apalis-imx8x/Kconfig b/board/toradex/apalis-imx8x/Kconfig deleted file mode 100644 index ee61e09736..0000000000 --- a/board/toradex/apalis-imx8x/Kconfig +++ /dev/null @@ -1,30 +0,0 @@ -if TARGET_APALIS_IMX8X - -config SYS_BOARD - default "apalis-imx8x" - -config SYS_VENDOR - default "toradex" - -config SYS_CONFIG_NAME - default "apalis-imx8x" - -config TDX_CFG_BLOCK - default y - -config TDX_HAVE_MMC - default y - -config TDX_CFG_BLOCK_DEV - default "0" - -config TDX_CFG_BLOCK_PART - default "1" - -# Toradex config block in eMMC, at the end of 1st "boot sector" -config TDX_CFG_BLOCK_OFFSET - default "-512" - -source "board/toradex/common/Kconfig" - -endif diff --git a/board/toradex/apalis-imx8x/MAINTAINERS b/board/toradex/apalis-imx8x/MAINTAINERS deleted file mode 100644 index 21b8675eb8..0000000000 --- a/board/toradex/apalis-imx8x/MAINTAINERS +++ /dev/null @@ -1,9 +0,0 @@ -Apalis iMX8X -M: Marcel Ziswiler <marcel.ziswiler@toradex.com> -W: http://developer.toradex.com/software/linux/linux-software -S: Maintained -F: arch/arm/dts/fsl-imx8x-apalis.dts -F: arch/arm/dts/fsl-imx8x-apalis-u-boot.dtsi -F: board/toradex/apalis-imx8x/ -F: configs/apalis-imx8x_defconfig -F: include/configs/apalis-imx8x.h diff --git a/board/toradex/apalis-imx8x/Makefile b/board/toradex/apalis-imx8x/Makefile deleted file mode 100644 index 19025863e8..0000000000 --- a/board/toradex/apalis-imx8x/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright 2018-2019 Toradex -# - -obj-y += apalis-imx8x.o diff --git a/board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg b/board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg deleted file mode 100644 index e8868cd8e3..0000000000 --- a/board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2019 Toradex - * - * Refer doc/README.imx8image for more details about how-to configure - * and create imx8image boot image - */ - -#define __ASSEMBLY__ - -/* Boot from SD, sector size 0x400 */ -BOOT_FROM EMMC_FASTBOOT 0x400 -/* SoC type IMX8QX */ -SOC_TYPE IMX8QX -/* Append seco container image */ -APPEND mx8qx-ahab-container.img -/* Create the 2nd container */ -CONTAINER -/* Add scfw image with exec attribute */ -IMAGE SCU mx8qx-apalis-scfw-tcm.bin -/* Add ATF image with exec attribute */ -IMAGE A35 bl31.bin 0x80000000 -/* Add U-Boot image with load attribute */ -DATA A35 u-boot-dtb.bin 0x80020000 diff --git a/board/toradex/apalis-imx8x/apalis-imx8x.c b/board/toradex/apalis-imx8x/apalis-imx8x.c deleted file mode 100644 index 493fd126df..0000000000 --- a/board/toradex/apalis-imx8x/apalis-imx8x.c +++ /dev/null @@ -1,237 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2018-2019 Toradex - */ -#include <common.h> -#include <cpu_func.h> -#include <env.h> -#include <errno.h> -#include <init.h> -#include <linux/libfdt.h> -#include <fsl_esdhc_imx.h> -#include <fdt_support.h> - -#include <asm/io.h> -#include <asm/gpio.h> -#include <asm/arch/clock.h> -#include <asm/arch-imx8/sci/sci.h> -#include <asm/arch/imx8-pins.h> -#include <asm/arch/snvs_security_sc.h> -#include <asm/arch/iomux.h> -#include <asm/arch/sys_proto.h> - -#include <power-domain.h> -#include <usb.h> - -#include "../common/tdx-cfg-block.h" - -DECLARE_GLOBAL_DATA_PTR; - -#define ESDHC_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \ - | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) - -#define ESDHC_CLK_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \ - | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) - -#define GPIO_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \ - | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) - -#define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \ - | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) - -static iomux_cfg_t uart1_pads[] = { - SC_P_UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL), - SC_P_UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -static void setup_iomux_uart(void) -{ - imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); -} - -void board_mem_get_layout(uint64_t *phys_sdram_1_start, - uint64_t *phys_sdram_1_size, - uint64_t *phys_sdram_2_start, - uint64_t *phys_sdram_2_size) -{ - uint32_t is_dualx = 0, val = 0; - sc_err_t sciErr = sc_misc_otp_fuse_read(-1, 6, &val); - - if (sciErr == SC_ERR_NONE) { - /* DX has two A35 cores disabled */ - is_dualx = (val & 0xf) != 0x0; - } - - *phys_sdram_1_start = PHYS_SDRAM_1; - if (is_dualx) - /* Our DX based SKUs only have 1 GB RAM */ - *phys_sdram_1_size = SZ_1G; - else - *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; - *phys_sdram_2_start = PHYS_SDRAM_2; - *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; -} - -int board_early_init_f(void) -{ - sc_pm_clock_rate_t rate = SC_80MHZ; - int ret; - - /* - * This works around that having only UART1 up the baudrate is 1.2M - * instead of 115.2k. Set UART0 clock root to 80 MHz - */ - ret = sc_pm_setup_uart(SC_R_UART_0, rate); - if (ret) - return ret; - - /* Set UART0 clock root to 80 MHz */ - ret = sc_pm_setup_uart(SC_R_UART_1, rate); - if (ret) - return ret; - - setup_iomux_uart(); - - return 0; -} - - -#ifdef CONFIG_FEC_MXC -#include <miiphy.h> - -int board_phy_config(struct phy_device *phydev) -{ - if (phydev->drv->config) - phydev->drv->config(phydev); - - return 0; -} -#endif - -#undef CONFIG_MXC_GPIO /* TODO */ -#ifdef CONFIG_MXC_GPIO -#define IOEXP_RESET IMX_GPIO_NR(1, 1) - -static iomux_cfg_t board_gpios[] = { - SC_P_SPI2_SDO | MUX_MODE_ALT(4) | MUX_PAD_CTRL(GPIO_PAD_CTRL), - SC_P_ENET0_REFCLK_125M_25M | MUX_MODE_ALT(4) | MUX_PAD_CTRL(GPIO_PAD_CTRL), -}; - -static void board_gpio_init(void) -{ - int ret; - struct gpio_desc desc; - - ret = dm_gpio_lookup_name("gpio@1a_3", &desc); - if (ret) - return; - - ret = dm_gpio_request(&desc, "bb_per_rst_b"); - if (ret) - return; - - dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT); - dm_gpio_set_value(&desc, 0); - udelay(50); - dm_gpio_set_value(&desc, 1); - - imx8_iomux_setup_multiple_pads(board_gpios, ARRAY_SIZE(board_gpios)); - - /* enable i2c port expander assert reset line */ - gpio_request(IOEXP_RESET, "ioexp_rst"); - gpio_direction_output(IOEXP_RESET, 1); -} -#endif - -int board_init(void) -{ -#ifdef CONFIG_MXC_GPIO - board_gpio_init(); -#endif - -#ifdef CONFIG_SNVS_SEC_SC_AUTO - { - int ret = snvs_security_sc_init(); - - if (ret) - return ret; - } -#endif - - return 0; -} - -/* With this function there is no console output in linux, drop that for now */ -#if 0 -void board_quiesce_devices(void) -{ - const char *power_on_devices[] = { - "dma_lpuart1", - - /* HIFI DSP boot */ - "audio_sai0", - "audio_ocram", - }; - - power_off_pd_devices(power_on_devices, ARRAY_SIZE(power_on_devices)); -} -#endif - -void detail_board_ddr_info(void) -{ - puts("\nDDR "); -} - -/* - * Board specific reset that is system reset. - */ -void reset_cpu(ulong addr) -{ - sc_pm_reboot(-1, SC_PM_RESET_TYPE_COLD); - while(1); - -} - -#ifdef CONFIG_OF_BOARD_SETUP -int ft_board_setup(void *blob, bd_t *bd) -{ - return ft_common_board_setup(blob, bd); -} -#endif -void board_late_mmc_env_init() {} -int board_mmc_get_env_dev(int devno) -{ - return devno; -} - -int board_late_init(void) -{ -#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG -/* TODO move to common */ - env_set("board_name", "Apalis iMX8QXP"); - env_set("board_rev", "v1.0"); -#endif - - build_info(); - -#ifdef CONFIG_AHAB_BOOT - env_set("sec_boot", "yes"); -#else - env_set("sec_boot", "no"); -#endif - -#ifdef CONFIG_ENV_IS_IN_MMC - board_late_mmc_env_init(); -#endif - - return 0; -} - -#ifdef CONFIG_FSL_FASTBOOT -#ifdef CONFIG_ANDROID_RECOVERY -int is_recovery_key_pressing(void) -{ - return 0; /*TODO*/ -} -#endif /*CONFIG_ANDROID_RECOVERY*/ -#endif /*CONFIG_FSL_FASTBOOT*/ diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c b/board/toradex/colibri-imx8x/colibri-imx8x.c index da0da1829f..0758ad3f57 100644 --- a/board/toradex/colibri-imx8x/colibri-imx8x.c +++ b/board/toradex/colibri-imx8x/colibri-imx8x.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2018-2019 Toradex + * Copyright 2018-2021 Toradex */ #include <common.h> #include <cpu_func.h> @@ -20,6 +20,7 @@ #include <asm/arch/iomux.h> #include <asm/arch/sys_proto.h> +#include <i2c.h> #include <power-domain.h> #include <usb.h> @@ -27,15 +28,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define ESDHC_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \ - | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) - -#define ESDHC_CLK_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \ - | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) - -#define GPIO_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \ - | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) - #define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \ | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) @@ -67,21 +59,25 @@ int board_ci_udc_phy_mode(void *__iomem phy_base, int phy_off) } } -void board_mem_get_layout(uint64_t *phys_sdram_1_start, - uint64_t *phys_sdram_1_size, - uint64_t *phys_sdram_2_start, - uint64_t *phys_sdram_2_size) +static int is_imx8dx(void) { - uint32_t is_dualx = 0, val = 0; + uint32_t val = 0; sc_err_t sciErr = sc_misc_otp_fuse_read(-1, 6, &val); if (sciErr == SC_ERR_NONE) { /* DX has two A35 cores disabled */ - is_dualx = (val & 0xf) != 0x0; + return (val & 0xf) != 0x0; } + return false; +} +void board_mem_get_layout(uint64_t *phys_sdram_1_start, + uint64_t *phys_sdram_1_size, + uint64_t *phys_sdram_2_start, + uint64_t *phys_sdram_2_size) +{ *phys_sdram_1_start = PHYS_SDRAM_1; - if (is_dualx) + if (is_imx8dx()) /* Our DX based SKUs only have 1 GB RAM */ *phys_sdram_1_size = SZ_1G; else @@ -134,46 +130,75 @@ int board_phy_config(struct phy_device *phydev) } #endif -#undef CONFIG_MXC_GPIO /* TODO */ -#ifdef CONFIG_MXC_GPIO -#define IOEXP_RESET IMX_GPIO_NR(1, 1) - -static iomux_cfg_t board_gpios[] = { - SC_P_SPI2_SDO | MUX_MODE_ALT(4) | MUX_PAD_CTRL(GPIO_PAD_CTRL), - SC_P_ENET0_REFCLK_125M_25M | MUX_MODE_ALT(4) | MUX_PAD_CTRL(GPIO_PAD_CTRL), -}; - -static void board_gpio_init(void) +#define I2C_ONMODULE_BUS 0 +#define I2C_GPIO_EXPANDER 0x43 +#define FXL6408_REG_IODIR 0x3 +#define FXL6408_REG_OUTPUT 0x5 +#define FXL6408_REG_OPENDR 0x7 +/* + * On-module GPIO expander FXL6408 drives management signals for + * on-module USB Hub. + */ +static void init_gpio_expander(void) { +#ifdef CONFIG_DM_I2C + struct udevice *dev; int ret; - struct gpio_desc desc; + u8 temp; - ret = dm_gpio_lookup_name("gpio@1a_3", &desc); - if (ret) - return; - - ret = dm_gpio_request(&desc, "bb_per_rst_b"); - if (ret) + ret = i2c_get_chip_for_busnum(I2C_ONMODULE_BUS, I2C_GPIO_EXPANDER, + 1, &dev); + if (ret) { + printf("%s: Cannot find dev %d on I2C bus %d\n", __func__, + I2C_GPIO_EXPANDER, I2C_ONMODULE_BUS); return; + } - dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT); - dm_gpio_set_value(&desc, 0); - udelay(50); - dm_gpio_set_value(&desc, 1); + /* + * On-module USB3803 Hub has bypass mode. It connects + * directly its upstream PHY with its downstream PHY#3 port which then + * goes to the carrier board USBH port. + * Turn on the Bypass# and deassert the Reset# signals, + * i.e. BYPASS_N = 0, RESET_N = 1 + * Refer to + * https://www.onsemi.com/pdf/datasheet/fxl6408-d.pdf, Page 9 + */ + temp = 0x30; /* set GPIO 4 and 5 as output */ + dm_i2c_write(dev, 3, &temp, 1); + temp = 0xcf; /* take GPIO 4 and 5 out of tristate */ + dm_i2c_write(dev, 7, &temp, 1); + temp = 0x10; /* set GPIO 4=1 and GPIO5=0 */ + dm_i2c_write(dev, 5, &temp, 1); +#endif +} - imx8_iomux_setup_multiple_pads(board_gpios, ARRAY_SIZE(board_gpios)); +static void select_dt_from_module_version(void) +{ + /* + * The dtb filename is constructed from ${soc}-colibri-${fdt_board}.dtb. + * Set soc depending on the used SoC. + */ + if (is_imx8dx()) + env_set("soc", "imx8dx"); + else + env_set("soc", "imx8qxp"); +} - /* enable i2c port expander assert reset line */ - gpio_request(IOEXP_RESET, "ioexp_rst"); - gpio_direction_output(IOEXP_RESET, 1); +static int do_select_dt_from_module_version(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { + select_dt_from_module_version(); + return 0; } -#endif + +U_BOOT_CMD( + select_dt_from_module_version, CONFIG_SYS_MAXARGS, 1, do_select_dt_from_module_version, + "\n", " - select devicetree from module version" +); int board_init(void) { -#ifdef CONFIG_MXC_GPIO - board_gpio_init(); -#endif + init_gpio_expander(); + gpio_request(USB_CDET_GPIO, "usb_cdet"); #ifdef CONFIG_SNVS_SEC_SC_AUTO @@ -251,6 +276,7 @@ int board_late_init(void) board_late_mmc_env_init(); #endif + select_dt_from_module_version(); return 0; } diff --git a/board/toradex/common/Kconfig b/board/toradex/common/Kconfig index 36068d2e3b..1c1aa11d62 100644 --- a/board/toradex/common/Kconfig +++ b/board/toradex/common/Kconfig @@ -85,3 +85,10 @@ config TDX_CFG_BLOCK_EXTRA adapter EEPROMs. endif + +config TDX_EASY_INSTALLER + bool "Use Toradex Easy Installer specific options." + help + Use Toradex Easy Installer specific options. Currently this is + needed to choose the correct ubiboot options and use correct + name of distro boot script for Easy Installer. diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c index ab23f58973..3e6e204951 100644 --- a/board/toradex/common/tdx-cfg-block.c +++ b/board/toradex/common/tdx-cfg-block.c @@ -12,7 +12,6 @@ #if defined(CONFIG_TARGET_APALIS_IMX6) || \ defined(CONFIG_TARGET_APALIS_IMX8) || \ - defined(CONFIG_TARGET_APALIS_IMX8X) || \ defined(CONFIG_TARGET_COLIBRI_IMX6) || \ defined(CONFIG_TARGET_COLIBRI_IMX8X) || \ defined(CONFIG_TARGET_VERDIN_IMX8MM) || \ @@ -144,6 +143,17 @@ const char * const toradex_modules[] = { [59] = "Verdin iMX8M Mini Quad 2GB IT", [60] = "Verdin iMX8M Mini DualLite 1GB WB IT", [61] = "Verdin iMX8M Plus Quad 2GB", + [62] = "Colibri iMX6ULL 1GB IT (eMMC)", + [63] = "Verdin iMX8M Plus Quad 4GB IT", + [64] = "Verdin iMX8M Plus Quad 2GB Wi-Fi / BT IT", + [65] = "Verdin iMX8M Plus QuadLite 1GB IT", + [66] = "Verdin iMX8M Plus Quad 8GB Wi-Fi / BT", + [67] = "Apalis iMX8 QuadMax 8GB Wi-Fi / BT IT", + [68] = "Verdin iMX8M Mini Quad 2GB WB IT No CAN", + [69] = "UNKNOWN MODULE", + [70] = "Verdin iMX8M Plus Quad 8GB WB IT", + [86] = "Verdin iMX8M Mini DualLite 2GB IT", + [87] = "Verdin iMX8M Mini Quad 2GB IT", }; const char * const toradex_carrier_boards[] = { @@ -158,6 +168,42 @@ const char * const toradex_display_adapters[] = { [159] = "Verdin DSI to LVDS Adapter", }; +const u32 toradex_ouis[] = { + [0] = 0x00142dUL, + [1] = 0x8c06cbUL, +}; + +static u32 get_serial_from_mac(struct toradex_eth_addr *eth_addr) +{ + int i; + u32 oui = ntohl(eth_addr->oui) >> 8; + u32 nic = ntohl(eth_addr->nic) >> 8; + + for (i = 0; i < ARRAY_SIZE(toradex_ouis); i++) { + if (toradex_ouis[i] == oui) + break; + } + + return (u32)((i << 24) + nic); +} + +void get_mac_from_serial(u32 tdx_serial, struct toradex_eth_addr *eth_addr) +{ + u8 oui_index = tdx_serial >> 24; + u32 nic = tdx_serial & GENMASK(23, 0); + u32 oui; + + if (oui_index >= ARRAY_SIZE(toradex_ouis)) { + puts("Can't find OUI for this serial#\n"); + oui_index = 0; + } + + oui = toradex_ouis[oui_index]; + + eth_addr->oui = htonl(oui << 8); + eth_addr->nic = htonl(nic << 8); +} + #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_MMC static int tdx_cfg_block_mmc_storage(u8 *config_block, int write) { @@ -330,8 +376,7 @@ int read_tdx_cfg_block(void) memcpy(&tdx_eth_addr, config_block + offset, 6); - /* NIC part of MAC address is serial number */ - tdx_serial = ntohl(tdx_eth_addr.nic) >> 8; + tdx_serial = get_serial_from_mac(&tdx_eth_addr); break; case TAG_HW: memcpy(&tdx_hw_tag, config_block + offset, 8); @@ -353,13 +398,28 @@ out: return ret; } +static int parse_assembly_string(char *string_to_parse, u16 *assembly) +{ + if (string_to_parse[3] >= 'A' && string_to_parse[3] <= 'Z') + *assembly = string_to_parse[3] - 'A'; + else if (string_to_parse[3] == '#') + *assembly = simple_strtoul(&string_to_parse[4], NULL, 10); + else + return -EINVAL; + + return 0; +} + static int get_cfgblock_interactive(void) { char message[CONFIG_SYS_CBSIZE]; char *soc; char it = 'n'; char wb = 'n'; + char mem8g = 'n'; + char can = 'y'; int len = 0; + int ret = 0; /* Unknown module by default */ tdx_hw_tag.prodid = 0; @@ -373,7 +433,6 @@ static int get_cfgblock_interactive(void) it = console_buffer[0]; #if defined(CONFIG_TARGET_APALIS_IMX8) || \ - defined(CONFIG_TARGET_APALIS_IMX8X) || \ defined(CONFIG_TARGET_COLIBRI_IMX6ULL) || \ defined(CONFIG_TARGET_COLIBRI_IMX8X) || \ defined(CONFIG_TARGET_VERDIN_IMX8MM) || \ @@ -381,6 +440,21 @@ static int get_cfgblock_interactive(void) sprintf(message, "Does the module have Wi-Fi / Bluetooth? [y/N] "); len = cli_readline(message); wb = console_buffer[0]; + +#if defined(CONFIG_TARGET_APALIS_IMX8) + if ((wb == 'y' || wb == 'Y') && (it == 'y' || it == 'Y')) { + sprintf(message, "Does your module have 8GB of RAM? [y/N] "); + len = cli_readline(message); + mem8g = console_buffer[0]; + } +#endif +#if defined(CONFIG_TARGET_VERDIN_IMX8MM) + if (is_cpu_type(MXC_CPU_IMX8MM) && (wb == 'y' || wb == 'Y')) { + sprintf(message, "Does your module have CAN? [y/N] "); + len = cli_readline(message); + can = console_buffer[0]; + } +#endif #endif soc = env_get("soc"); @@ -414,7 +488,10 @@ static int get_cfgblock_interactive(void) if (wb == 'y' || wb == 'Y') tdx_hw_tag.prodid = COLIBRI_IMX6ULL_WIFI_BT_IT; else - tdx_hw_tag.prodid = COLIBRI_IMX6ULL_IT; + if (gd->ram_size == 0x20000000) + tdx_hw_tag.prodid = COLIBRI_IMX6ULL_IT; + else + tdx_hw_tag.prodid = COLIBRI_IMX6ULL_IT_EMMC; } else { if (wb == 'y' || wb == 'Y') tdx_hw_tag.prodid = COLIBRI_IMX6ULL_WIFI_BT; @@ -423,13 +500,20 @@ static int get_cfgblock_interactive(void) } #endif } else if (!strcmp("imx7d", soc)) - tdx_hw_tag.prodid = COLIBRI_IMX7D; + if (gd->ram_size == 0x20000000) + tdx_hw_tag.prodid = COLIBRI_IMX7D; + else + tdx_hw_tag.prodid = COLIBRI_IMX7D_EMMC; else if (!strcmp("imx7s", soc)) tdx_hw_tag.prodid = COLIBRI_IMX7S; else if (is_cpu_type(MXC_CPU_IMX8QM)) { if (it == 'y' || it == 'Y') { - if (wb == 'y' || wb == 'Y') - tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT; + if (wb == 'y' || wb == 'Y') { + if (mem8g == 'y' || mem8g == 'Y') + tdx_hw_tag.prodid = APALIS_IMX8QM_8GB_WIFI_BT_IT; + else + tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT; + } else tdx_hw_tag.prodid = APALIS_IMX8QM_IT; } else { @@ -439,16 +523,7 @@ static int get_cfgblock_interactive(void) tdx_hw_tag.prodid = APALIS_IMX8QP; } } else if (is_cpu_type(MXC_CPU_IMX8QXP)) { -#ifdef CONFIG_TARGET_APALIS_IMX8X - if (it == 'y' || it == 'Y' || wb == 'y' || wb == 'Y') { - tdx_hw_tag.prodid = APALIS_IMX8QXP_WIFI_BT_IT; - } else { - if (gd->ram_size == 0x40000000) - tdx_hw_tag.prodid = APALIS_IMX8DXP; - else - tdx_hw_tag.prodid = APALIS_IMX8QXP; - } -#elif CONFIG_TARGET_COLIBRI_IMX8X +#ifdef CONFIG_TARGET_COLIBRI_IMX8X if (it == 'y' || it == 'Y') { if (wb == 'y' || wb == 'Y') tdx_hw_tag.prodid = COLIBRI_IMX8QXP_WIFI_BT_IT; @@ -467,17 +542,32 @@ static int get_cfgblock_interactive(void) else tdx_hw_tag.prodid = VERDIN_IMX8MMDL; } else if (is_cpu_type(MXC_CPU_IMX8MM)) { - if (wb == 'y' || wb == 'Y') + if (can == 'n' || can == 'N') + tdx_hw_tag.prodid = VERDIN_IMX8MMQ_WIFI_BT_IT_NO_CAN; + else if (wb == 'y' || wb == 'Y') tdx_hw_tag.prodid = VERDIN_IMX8MMQ_WIFI_BT_IT; else tdx_hw_tag.prodid = VERDIN_IMX8MMQ_IT; } else if (is_cpu_type(MXC_CPU_IMX8MN)) { tdx_hw_tag.prodid = VERDIN_IMX8MNQ_WIFI_BT; + } else if (is_cpu_type(MXC_CPU_IMX8MPL)) { + tdx_hw_tag.prodid = VERDIN_IMX8MPQL_IT; } else if (is_cpu_type(MXC_CPU_IMX8MP)) { if (wb == 'y' || wb == 'Y') - tdx_hw_tag.prodid = VERDIN_IMX8MPQ_WIFI_BT_IT; + if (gd->ram_size == 0x80000000) + tdx_hw_tag.prodid = VERDIN_IMX8MPQ_2GB_WIFI_BT_IT; + else if (gd->ram_size == 0x200000000) + if (it == 'y' || it == 'Y') + tdx_hw_tag.prodid = VERDIN_IMX8MPQ_8GB_WIFI_BT_IT; + else + tdx_hw_tag.prodid = VERDIN_IMX8MPQ_8GB_WIFI_BT; + else + tdx_hw_tag.prodid = VERDIN_IMX8MPQ_WIFI_BT_IT; else - tdx_hw_tag.prodid = VERDIN_IMX8MPQ; + if (it == 'y' || it == 'Y') + tdx_hw_tag.prodid = VERDIN_IMX8MPQ_IT; + else + tdx_hw_tag.prodid = VERDIN_IMX8MPQ; } else if (!strcmp("tegra20", soc)) { if (it == 'y' || it == 'Y') if (gd->ram_size == 0x10000000) @@ -533,13 +623,18 @@ static int get_cfgblock_interactive(void) } while (len < 4) { - sprintf(message, "Enter the module version (e.g. V1.1B): V"); + sprintf(message, "Enter the module version (e.g. V1.1B or V1.1#26): V"); len = cli_readline(message); } tdx_hw_tag.ver_major = console_buffer[0] - '0'; tdx_hw_tag.ver_minor = console_buffer[2] - '0'; - tdx_hw_tag.ver_assembly = console_buffer[3] - 'A'; + + ret = parse_assembly_string(console_buffer, &tdx_hw_tag.ver_assembly); + if (ret) { + printf("Parsing module version failed\n"); + return ret; + } if (cpu_is_pxa27x() && tdx_hw_tag.ver_major == 1) tdx_hw_tag.prodid -= (COLIBRI_PXA270_312MHZ - @@ -558,6 +653,8 @@ static int get_cfgblock_interactive(void) static int get_cfgblock_barcode(char *barcode, struct toradex_hw *tag, u32 *serial) { + char revision[3] = {barcode[6], barcode[7], '\0'}; + if (strlen(barcode) < 16) { printf("Argument too short, barcode is 16 chars long\n"); return -1; @@ -566,7 +663,7 @@ static int get_cfgblock_barcode(char *barcode, struct toradex_hw *tag, /* Get hardware information from the first 8 digits */ tag->ver_major = barcode[4] - '0'; tag->ver_minor = barcode[5] - '0'; - tag->ver_assembly = barcode[7] - '0'; + tag->ver_assembly = simple_strtoul(revision, NULL, 10); barcode[4] = '\0'; tag->prodid = simple_strtoul(barcode, NULL, 10); @@ -744,6 +841,7 @@ static int get_cfgblock_carrier_interactive(void) { char message[CONFIG_SYS_CBSIZE]; int len; + int ret = 0; printf("Supported carrier boards:\n"); printf("CARRIER BOARD NAME\t\t [ID]\n"); @@ -757,13 +855,18 @@ static int get_cfgblock_carrier_interactive(void) tdx_car_hw_tag.prodid = simple_strtoul(console_buffer, NULL, 10); do { - sprintf(message, "Enter carrier board version (e.g. V1.1B): V"); + sprintf(message, "Enter carrier board version (e.g. V1.1B or V1.1#26): V"); len = cli_readline(message); } while (len < 4); tdx_car_hw_tag.ver_major = console_buffer[0] - '0'; tdx_car_hw_tag.ver_minor = console_buffer[2] - '0'; - tdx_car_hw_tag.ver_assembly = console_buffer[3] - 'A'; + + ret = parse_assembly_string(console_buffer, &tdx_car_hw_tag.ver_assembly); + if (ret) { + printf("Parsing module version failed\n"); + return ret; + } while (len < 8) { sprintf(message, "Enter carrier board serial number: "); @@ -940,8 +1043,7 @@ static int do_cfgblock_create(cmd_tbl_t *cmdtp, int flag, int argc, } /* Convert serial number to MAC address (the storage format) */ - tdx_eth_addr.oui = htonl(0x00142dUL << 8); - tdx_eth_addr.nic = htonl(tdx_serial << 8); + get_mac_from_serial(tdx_serial, &tdx_eth_addr); /* Valid Tag */ write_tag(config_block, &offset, TAG_VALID, NULL, 0); diff --git a/board/toradex/common/tdx-cfg-block.h b/board/toradex/common/tdx-cfg-block.h index 9debd5f046..cccf8a14b6 100644 --- a/board/toradex/common/tdx-cfg-block.h +++ b/board/toradex/common/tdx-cfg-block.h @@ -82,6 +82,18 @@ enum { VERDIN_IMX8MMQ_IT, VERDIN_IMX8MMDL_WIFI_BT_IT, /* 60 */ VERDIN_IMX8MPQ, + COLIBRI_IMX6ULL_IT_EMMC, + VERDIN_IMX8MPQ_IT, + VERDIN_IMX8MPQ_2GB_WIFI_BT_IT, + VERDIN_IMX8MPQL_IT, /* 65 */ + VERDIN_IMX8MPQ_8GB_WIFI_BT, + APALIS_IMX8QM_8GB_WIFI_BT_IT, + VERDIN_IMX8MMQ_WIFI_BT_IT_NO_CAN, + /* 69 */ + VERDIN_IMX8MPQ_8GB_WIFI_BT_IT = 70, + /* 71-85 */ + VERDIN_IMX8MMDL_2G_IT = 86, + VERDIN_IMX8MMQ_2G_IT_NO_CAN, }; enum { @@ -108,4 +120,6 @@ int read_tdx_cfg_block_carrier(void); int try_migrate_tdx_cfg_block_carrier(void); +void get_mac_from_serial(u32 tdx_serial, struct toradex_eth_addr *eth_addr); + #endif /* _TDX_CFG_BLOCK_H */ diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c index d9edffd79a..eaa2622924 100644 --- a/board/toradex/common/tdx-common.c +++ b/board/toradex/common/tdx-common.c @@ -12,15 +12,17 @@ #include <asm/setup.h> #include "tdx-common.h" -#define TORADEX_OUI 0x00142dUL +#define SERIAL_STR_LEN 8 +#define MODULE_VER_STR_LEN 4 // V1.1 +#define MODULE_REV_STR_LEN 3 // [A-Z] or #[26-99] #ifdef CONFIG_TDX_CFG_BLOCK -static char tdx_serial_str[9]; -static char tdx_board_rev_str[6]; +static char tdx_serial_str[SERIAL_STR_LEN + 1]; +static char tdx_board_rev_str[MODULE_VER_STR_LEN + MODULE_REV_STR_LEN + 1]; #ifdef CONFIG_TDX_CFG_BLOCK_EXTRA -static char tdx_car_serial_str[9]; -static char tdx_car_rev_str[6]; +static char tdx_car_serial_str[SERIAL_STR_LEN + 1]; +static char tdx_car_rev_str[MODULE_VER_STR_LEN + MODULE_REV_STR_LEN + 1]; static char *tdx_carrier_board_name; #endif @@ -71,21 +73,37 @@ void get_board_serial(struct tag_serialnr *serialnr) } #endif /* CONFIG_SERIAL_TAG */ +static const char *get_board_assembly(u16 ver_assembly) +{ + static char ver_name[MODULE_REV_STR_LEN + 1]; + + if (ver_assembly < 26) { + ver_name[0] = (char)ver_assembly + 'A'; + ver_name[1] = '\0'; + } else { + snprintf(ver_name, sizeof(ver_name), + "#%u", ver_assembly); + } + + return ver_name; +} + int show_board_info(void) { unsigned char ethaddr[6]; if (read_tdx_cfg_block()) { printf("MISSING TORADEX CONFIG BLOCK\n"); - tdx_eth_addr.oui = htonl(TORADEX_OUI << 8); - tdx_eth_addr.nic = htonl(tdx_serial << 8); + get_mac_from_serial(tdx_serial, &tdx_eth_addr); checkboard(); } else { - sprintf(tdx_serial_str, "%08u", tdx_serial); - sprintf(tdx_board_rev_str, "V%1d.%1d%c", - tdx_hw_tag.ver_major, - tdx_hw_tag.ver_minor, - (char)tdx_hw_tag.ver_assembly + 'A'); + snprintf(tdx_serial_str, sizeof(tdx_serial_str), + "%08u", tdx_serial); + snprintf(tdx_board_rev_str, sizeof(tdx_board_rev_str), + "V%1d.%1d%s", + tdx_hw_tag.ver_major, + tdx_hw_tag.ver_minor, + get_board_assembly(tdx_hw_tag.ver_assembly)); env_set("serial#", tdx_serial_str); @@ -101,12 +119,13 @@ int show_board_info(void) tdx_carrier_board_name = (char *) toradex_carrier_boards[tdx_car_hw_tag.prodid]; - sprintf(tdx_car_serial_str, "%08u", tdx_car_serial); - sprintf(tdx_car_rev_str, "V%1d.%1d%c", - tdx_car_hw_tag.ver_major, - tdx_car_hw_tag.ver_minor, - (char)tdx_car_hw_tag.ver_assembly + - 'A'); + snprintf(tdx_car_serial_str, sizeof(tdx_car_serial_str), + "%08u", tdx_car_serial); + snprintf(tdx_car_rev_str, sizeof(tdx_car_rev_str), + "V%1d.%1d%s", + tdx_car_hw_tag.ver_major, + tdx_car_hw_tag.ver_minor, + get_board_assembly(tdx_car_hw_tag.ver_assembly)); env_set("carrier_serial#", tdx_car_serial_str); printf("Carrier: Toradex %s %s, Serial# %s\n", @@ -162,7 +181,7 @@ int ft_common_board_setup(void *blob, bd_t *bd) if (tdx_hw_tag.ver_major) { char prod_id[5]; - sprintf(prod_id, "%04u", tdx_hw_tag.prodid); + snprintf(prod_id, sizeof(prod_id), "%04u", tdx_hw_tag.prodid); fdt_setprop(blob, 0, "toradex,product-id", prod_id, 5); fdt_setprop(blob, 0, "toradex,board-rev", tdx_board_rev_str, diff --git a/board/toradex/verdin-imx8mm/lpddr4_timing.c b/board/toradex/verdin-imx8mm/lpddr4_timing.c index d114abf9d6..4dfec679b1 100644 --- a/board/toradex/verdin-imx8mm/lpddr4_timing.c +++ b/board/toradex/verdin-imx8mm/lpddr4_timing.c @@ -1,12 +1,11 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2020 Toradex + * Copyright 2023 Toradex * * Generated code from MX8M_DDR_tool - * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga * - * DDR calibration created with mscale_ddr_tool_v210_setup.exe using - * MX8M_Mini_LPDDR4_RPA_v14 Verdin iMX8MM V1.0.xlsx as of 1. Nov. 2019. + * DDR calibration created with mscale_ddr_tool_v3.31_setup.exe using + * MX8M_Mini_LPDDR4_RPA_v22 Verdin iMX8MM V1.0.xlsx as of 7. Aug. 2023. */ #include <linux/kernel.h> @@ -17,22 +16,22 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { {0x3d400304, 0x1}, {0x3d400030, 0x1}, {0x3d400000, 0xa1080020}, - {0x3d400020, 0x203}, + {0x3d400020, 0x202}, {0x3d400024, 0x3a980}, - {0x3d400064, 0x5b00d2}, + {0x3d400064, 0x2d00d2}, {0x3d4000d0, 0xc00305ba}, {0x3d4000d4, 0x940000}, {0x3d4000dc, 0xd4002d}, {0x3d4000e0, 0x310000}, {0x3d4000e8, 0x66004d}, {0x3d4000ec, 0x16004d}, - {0x3d400100, 0x191e1920}, + {0x3d400100, 0x191e0c20}, {0x3d400104, 0x60630}, {0x3d40010c, 0xb0b000}, {0x3d400110, 0xe04080e}, {0x3d400114, 0x2040c0c}, {0x3d400118, 0x1010007}, - {0x3d40011c, 0x401}, + {0x3d40011c, 0x402}, {0x3d400130, 0x20600}, {0x3d400134, 0xc100002}, {0x3d400138, 0xd8}, @@ -49,7 +48,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { {0x3d4001b0, 0x11}, {0x3d4001c0, 0x1}, {0x3d4001c4, 0x1}, - {0x3d4000f4, 0xc99}, + {0x3d4000f4, 0x699}, {0x3d400108, 0x70e1617}, {0x3d400200, 0x1f}, {0x3d40020c, 0x0}, @@ -57,6 +56,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { {0x3d400204, 0x80808}, {0x3d400214, 0x7070707}, {0x3d400218, 0x7070707}, + {0x3d40021c, 0xf0f}, {0x3d400250, 0x29001701}, {0x3d400254, 0x2c}, {0x3d40025c, 0x4000030}, @@ -68,22 +68,22 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { {0x3d400498, 0x620096}, {0x3d40049c, 0x1100e07}, {0x3d4004a0, 0xc8012c}, - {0x3d402020, 0x1}, + {0x3d402020, 0x0}, {0x3d402024, 0x7d00}, {0x3d402050, 0x20d040}, - {0x3d402064, 0xc001c}, + {0x3d402064, 0x6001c}, {0x3d4020dc, 0x840000}, {0x3d4020e0, 0x310000}, {0x3d4020e8, 0x66004d}, {0x3d4020ec, 0x16004d}, - {0x3d402100, 0xa040305}, + {0x3d402100, 0xa040105}, {0x3d402104, 0x30407}, {0x3d402108, 0x203060b}, {0x3d40210c, 0x505000}, {0x3d402110, 0x2040202}, {0x3d402114, 0x2030202}, {0x3d402118, 0x1010004}, - {0x3d40211c, 0x301}, + {0x3d40211c, 0x302}, {0x3d402130, 0x20300}, {0x3d402134, 0xa100002}, {0x3d402138, 0x1d}, @@ -92,8 +92,8 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { {0x3d402190, 0x3818200}, {0x3d402194, 0x80303}, {0x3d4021b4, 0x100}, - {0x3d4020f4, 0xc99}, - {0x3d403020, 0x1}, + {0x3d4020f4, 0x599}, + {0x3d403020, 0x0}, {0x3d403024, 0x1f40}, {0x3d403050, 0x20d040}, {0x3d403064, 0x30007}, @@ -108,7 +108,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { {0x3d403110, 0x2040202}, {0x3d403114, 0x2030202}, {0x3d403118, 0x1010004}, - {0x3d40311c, 0x301}, + {0x3d40311c, 0x302}, {0x3d403130, 0x20300}, {0x3d403134, 0xa100002}, {0x3d403138, 0x8}, @@ -117,7 +117,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { {0x3d403190, 0x3818200}, {0x3d403194, 0x80303}, {0x3d4031b4, 0x100}, - {0x3d4030f4, 0xc99}, + {0x3d4030f4, 0x599}, {0x3d400028, 0x0}, }; @@ -205,8 +205,8 @@ struct dram_cfg_param ddr_ddrphy_cfg[] = { {0x220024, 0x1ab}, {0x2003a, 0x0}, {0x20056, 0x3}, - {0x120056, 0xa}, - {0x220056, 0xa}, + {0x120056, 0x3}, + {0x220056, 0x3}, {0x1004d, 0xe00}, {0x1014d, 0xe00}, {0x1104d, 0xe00}, @@ -1058,7 +1058,6 @@ struct dram_cfg_param ddr_fsp0_cfg[] = { {0x54008, 0x131f}, {0x54009, 0xc8}, {0x5400b, 0x2}, - {0x5400d, 0x100}, {0x54012, 0x110}, {0x54019, 0x2dd4}, {0x5401a, 0x31}, @@ -1098,7 +1097,6 @@ struct dram_cfg_param ddr_fsp1_cfg[] = { {0x54008, 0x121f}, {0x54009, 0xc8}, {0x5400b, 0x2}, - {0x5400d, 0x100}, {0x54012, 0x110}, {0x54019, 0x84}, {0x5401a, 0x31}, @@ -1138,7 +1136,6 @@ struct dram_cfg_param ddr_fsp2_cfg[] = { {0x54008, 0x121f}, {0x54009, 0xc8}, {0x5400b, 0x2}, - {0x5400d, 0x100}, {0x54012, 0x110}, {0x54019, 0x84}, {0x5401a, 0x31}, @@ -1204,7 +1201,7 @@ struct dram_cfg_param ddr_fsp0_2d_cfg[] = { {0x5403b, 0x4d}, {0x5403c, 0x4d}, {0x5403d, 0x1600}, - { 0xd0000, 0x1 }, + {0xd0000, 0x1}, }; /* DRAM PHY init engine image */ @@ -1697,15 +1694,15 @@ struct dram_cfg_param ddr_phy_pie[] = { {0x400d6, 0x20a}, {0x400d7, 0x20b}, {0x2003a, 0x2}, - {0x2000b, 0x5d}, + {0x2000b, 0x34b}, {0x2000c, 0xbb}, {0x2000d, 0x753}, {0x2000e, 0x2c}, - {0x12000b, 0xc}, + {0x12000b, 0x70}, {0x12000c, 0x19}, {0x12000d, 0xfa}, {0x12000e, 0x10}, - {0x22000b, 0x3}, + {0x22000b, 0x1c}, {0x22000c, 0x6}, {0x22000d, 0x3e}, {0x22000e, 0x10}, @@ -1846,5 +1843,5 @@ struct dram_timing_info dram_timing = { .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), .ddrphy_pie = ddr_phy_pie, .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), - .fsp_table = { 3000, 400, 100, }, + .fsp_table = {3000, 400, 100,}, }; diff --git a/board/toradex/verdin-imx8mm/verdin-imx8mm.c b/board/toradex/verdin-imx8mm/verdin-imx8mm.c index 6af4972ec4..cb9b0eec65 100644 --- a/board/toradex/verdin-imx8mm/verdin-imx8mm.c +++ b/board/toradex/verdin-imx8mm/verdin-imx8mm.c @@ -17,6 +17,7 @@ #include <dm.h> #include <errno.h> #include <fsl_esdhc.h> +#include <hang.h> #include <i2c.h> #include <malloc.h> #include <micrel.h> @@ -391,31 +392,25 @@ static void select_dt_from_module_version(void) * Wi-Fi/Bluetooth make sure we use the -wifi device tree. */ is_wifi = (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_WIFI_BT_IT) || - (tdx_hw_tag.prodid == VERDIN_IMX8MMDL_WIFI_BT_IT); + (tdx_hw_tag.prodid == VERDIN_IMX8MMDL_WIFI_BT_IT) || + (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_WIFI_BT_IT_NO_CAN); #endif switch(get_pcb_revision()) { case PCB_VERSION_1_0: - printf("Detected a V1.0 module\n"); + printf("Detected a V1.0 module which is no longer supported in this BSP version\n"); + hang(); + default: if (is_wifi) strncpy(&variant[0], "wifi", sizeof(variant)); else strncpy(&variant[0], "nonwifi", sizeof(variant)); break; - default: - if (is_wifi) - strncpy(&variant[0], "wifi-v1.1", sizeof(variant)); - else - strncpy(&variant[0], "nonwifi-v1.1", sizeof(variant)); - break; } if (strcmp(variant, env_variant)) { printf("Setting variant to %s\n", variant); env_set("variant", variant); -#ifndef CONFIG_ENV_IS_NOWHERE - env_save(); -#endif } } diff --git a/board/toradex/verdin-imx8mp/lpddr4_timing.c b/board/toradex/verdin-imx8mp/lpddr4_timing.c index cab984c3a0..39fcccfb41 100644 --- a/board/toradex/verdin-imx8mp/lpddr4_timing.c +++ b/board/toradex/verdin-imx8mp/lpddr4_timing.c @@ -18,12 +18,12 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { /** Initialize DDRC registers **/ { 0x3d400304, 0x1 }, { 0x3d400030, 0x1 }, - { 0x3d400000, 0xa1080020 }, + { 0x3d400000, 0xa3080020 }, { 0x3d400020, 0x1303 }, { 0x3d400024, 0x1e84800 }, - { 0x3d400064, 0x7a0118 }, - { 0x3d400070, 0x61027f10 }, - { 0x3d400074, 0x7b0 }, + { 0x3d400064, 0x7a017c }, + { 0x3d400070, 0x7027f90 }, + { 0x3d400074, 0x790 }, { 0x3d4000d0, 0xc00307a3 }, { 0x3d4000d4, 0xc50000 }, { 0x3d4000dc, 0xf4003f }, @@ -31,15 +31,15 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d4000e8, 0x660048 }, { 0x3d4000ec, 0x160048 }, { 0x3d400100, 0x2028222a }, - { 0x3d400104, 0x807bf }, + { 0x3d400104, 0x8083f }, { 0x3d40010c, 0xe0e000 }, { 0x3d400110, 0x12040a12 }, { 0x3d400114, 0x2050f0f }, { 0x3d400118, 0x1010009 }, - { 0x3d40011c, 0x501 }, + { 0x3d40011c, 0x502 }, { 0x3d400130, 0x20800 }, { 0x3d400134, 0xe100002 }, - { 0x3d400138, 0x120 }, + { 0x3d400138, 0x184 }, { 0x3d400144, 0xc80064 }, { 0x3d400180, 0x3e8001e }, { 0x3d400184, 0x3207a12 }, @@ -53,15 +53,16 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d4001b0, 0x11 }, { 0x3d4001c0, 0x1 }, { 0x3d4001c4, 0x1 }, - { 0x3d4000f4, 0xc99 }, - { 0x3d400108, 0x9121c1c }, - { 0x3d400200, 0x1f }, + { 0x3d4000f4, 0x799 }, + { 0x3d400108, 0x9121b1c }, + { 0x3d400200, 0x17 }, + { 0x3d400208, 0x0 }, { 0x3d40020c, 0x0 }, { 0x3d400210, 0x1f1f }, { 0x3d400204, 0x80808 }, { 0x3d400214, 0x7070707 }, { 0x3d400218, 0x7070707 }, - { 0x3d40021c, 0xf07 }, + { 0x3d40021c, 0xf08 }, { 0x3d400250, 0x1705 }, { 0x3d400254, 0x2c }, { 0x3d40025c, 0x4000030 }, @@ -77,7 +78,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d402020, 0x1001 }, { 0x3d402024, 0x30d400 }, { 0x3d402050, 0x20d000 }, - { 0x3d402064, 0xc001c }, + { 0x3d402064, 0xc0026 }, { 0x3d4020dc, 0x840000 }, { 0x3d4020e0, 0x330000 }, { 0x3d4020e8, 0x660048 }, @@ -89,20 +90,20 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d402110, 0x2040202 }, { 0x3d402114, 0x2030202 }, { 0x3d402118, 0x1010004 }, - { 0x3d40211c, 0x301 }, + { 0x3d40211c, 0x302 }, { 0x3d402130, 0x20300 }, { 0x3d402134, 0xa100002 }, - { 0x3d402138, 0x1d }, + { 0x3d402138, 0x27 }, { 0x3d402144, 0x14000a }, { 0x3d402180, 0x640004 }, { 0x3d402190, 0x3818200 }, { 0x3d402194, 0x80303 }, { 0x3d4021b4, 0x100 }, - { 0x3d4020f4, 0xc99 }, + { 0x3d4020f4, 0x599 }, { 0x3d403020, 0x1001 }, { 0x3d403024, 0xc3500 }, { 0x3d403050, 0x20d000 }, - { 0x3d403064, 0x30007 }, + { 0x3d403064, 0x3000a }, { 0x3d4030dc, 0x840000 }, { 0x3d4030e0, 0x330000 }, { 0x3d4030e8, 0x660048 }, @@ -114,16 +115,16 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d403110, 0x2040202 }, { 0x3d403114, 0x2030202 }, { 0x3d403118, 0x1010004 }, - { 0x3d40311c, 0x301 }, + { 0x3d40311c, 0x302 }, { 0x3d403130, 0x20300 }, { 0x3d403134, 0xa100002 }, - { 0x3d403138, 0x8 }, + { 0x3d403138, 0xa }, { 0x3d403144, 0x50003 }, { 0x3d403180, 0x190004 }, { 0x3d403190, 0x3818200 }, { 0x3d403194, 0x80303 }, { 0x3d4031b4, 0x100 }, - { 0x3d4030f4, 0xc99 }, + { 0x3d4030f4, 0x599 }, { 0x3d400028, 0x0 }, }; @@ -1069,7 +1070,7 @@ struct dram_cfg_param ddr_fsp0_cfg[] = { { 0x54009, 0xc8 }, { 0x5400b, 0x2 }, { 0x5400f, 0x100 }, - { 0x54012, 0x110 }, + { 0x54012, 0x310 }, { 0x54019, 0x3ff4 }, { 0x5401a, 0x33 }, { 0x5401b, 0x4866 }, @@ -1081,7 +1082,7 @@ struct dram_cfg_param ddr_fsp0_cfg[] = { { 0x54022, 0x4800 }, { 0x54024, 0x16 }, { 0x5402b, 0x1000 }, - { 0x5402c, 0x1 }, + { 0x5402c, 0x3 }, { 0x54032, 0xf400 }, { 0x54033, 0x333f }, { 0x54034, 0x6600 }, @@ -1110,7 +1111,7 @@ struct dram_cfg_param ddr_fsp1_cfg[] = { { 0x54009, 0xc8 }, { 0x5400b, 0x2 }, { 0x5400f, 0x100 }, - { 0x54012, 0x110 }, + { 0x54012, 0x310 }, { 0x54019, 0x84 }, { 0x5401a, 0x33 }, { 0x5401b, 0x4866 }, @@ -1122,7 +1123,7 @@ struct dram_cfg_param ddr_fsp1_cfg[] = { { 0x54022, 0x4800 }, { 0x54024, 0x16 }, { 0x5402b, 0x1000 }, - { 0x5402c, 0x1 }, + { 0x5402c, 0x3 }, { 0x54032, 0x8400 }, { 0x54033, 0x3300 }, { 0x54034, 0x6600 }, @@ -1151,7 +1152,7 @@ struct dram_cfg_param ddr_fsp2_cfg[] = { { 0x54009, 0xc8 }, { 0x5400b, 0x2 }, { 0x5400f, 0x100 }, - { 0x54012, 0x110 }, + { 0x54012, 0x310 }, { 0x54019, 0x84 }, { 0x5401a, 0x33 }, { 0x5401b, 0x4866 }, @@ -1163,7 +1164,7 @@ struct dram_cfg_param ddr_fsp2_cfg[] = { { 0x54022, 0x4800 }, { 0x54024, 0x16 }, { 0x5402b, 0x1000 }, - { 0x5402c, 0x1 }, + { 0x5402c, 0x3 }, { 0x54032, 0x8400 }, { 0x54033, 0x3300 }, { 0x54034, 0x6600 }, @@ -1190,10 +1191,9 @@ struct dram_cfg_param ddr_fsp0_2d_cfg[] = { { 0x54008, 0x61 }, { 0x54009, 0xc8 }, { 0x5400b, 0x2 }, - { 0x5400d, 0x100 }, { 0x5400f, 0x100 }, { 0x54010, 0x1f7f }, - { 0x54012, 0x110 }, + { 0x54012, 0x310 }, { 0x54019, 0x3ff4 }, { 0x5401a, 0x33 }, { 0x5401b, 0x4866 }, @@ -1205,7 +1205,7 @@ struct dram_cfg_param ddr_fsp0_2d_cfg[] = { { 0x54022, 0x4800 }, { 0x54024, 0x16 }, { 0x5402b, 0x1000 }, - { 0x5402c, 0x1 }, + { 0x5402c, 0x3 }, { 0x54032, 0xf400 }, { 0x54033, 0x333f }, { 0x54034, 0x6600 }, @@ -1703,15 +1703,15 @@ struct dram_cfg_param ddr_phy_pie[] = { { 0x400d7, 0x20b }, { 0x2003a, 0x2 }, { 0x200be, 0x3 }, - { 0x2000b, 0x7d }, + { 0x2000b, 0x465 }, { 0x2000c, 0xfa }, { 0x2000d, 0x9c4 }, { 0x2000e, 0x2c }, - { 0x12000b, 0xc }, + { 0x12000b, 0x70 }, { 0x12000c, 0x19 }, { 0x12000d, 0xfa }, { 0x12000e, 0x10 }, - { 0x22000b, 0x3 }, + { 0x22000b, 0x1c }, { 0x22000c, 0x6 }, { 0x22000d, 0x3e }, { 0x22000e, 0x10 }, @@ -1837,7 +1837,314 @@ struct dram_fsp_msg ddr_dram_fsp_msg[] = { }, }; -/* ddr timing config params */ +struct dram_cfg_param ddr_ddrc_cfg2[] = { + /** Initialize DDRC registers **/ + { 0x3d400304, 0x1 }, + { 0x3d400030, 0x1 }, + { 0x3d400000, 0xa1080020 }, + { 0x3d400020, 0x1303 }, + { 0x3d400024, 0x1e84800 }, + { 0x3d400064, 0x7a017c }, + { 0x3d400070, 0x7027f90 }, + { 0x3d400074, 0x790 }, + { 0x3d4000d0, 0xc00307a3 }, + { 0x3d4000d4, 0xc50000 }, + { 0x3d4000dc, 0xf4003f }, + { 0x3d4000e0, 0x330000 }, + { 0x3d4000e8, 0x660048 }, + { 0x3d4000ec, 0x160048 }, + { 0x3d400100, 0x2028222a }, + { 0x3d400104, 0x8083f }, + { 0x3d40010c, 0xe0e000 }, + { 0x3d400110, 0x12040a12 }, + { 0x3d400114, 0x2050f0f }, + { 0x3d400118, 0x1010009 }, + { 0x3d40011c, 0x502 }, + { 0x3d400130, 0x20800 }, + { 0x3d400134, 0xe100002 }, + { 0x3d400138, 0x184 }, + { 0x3d400144, 0xc80064 }, + { 0x3d400180, 0x3e8001e }, + { 0x3d400184, 0x3207a12 }, + { 0x3d400188, 0x0 }, + { 0x3d400190, 0x49f820e }, + { 0x3d400194, 0x80303 }, + { 0x3d4001b4, 0x1f0e }, + { 0x3d4001a0, 0xe0400018 }, + { 0x3d4001a4, 0xdf00e4 }, + { 0x3d4001a8, 0x80000000 }, + { 0x3d4001b0, 0x11 }, + { 0x3d4001c0, 0x1 }, + { 0x3d4001c4, 0x1 }, + { 0x3d4000f4, 0x799 }, + { 0x3d400108, 0x9121b1c }, + { 0x3d400200, 0x1f }, + { 0x3d400208, 0x0 }, + { 0x3d40020c, 0x0 }, + { 0x3d400210, 0x1f1f }, + { 0x3d400204, 0x80808 }, + { 0x3d400214, 0x7070707 }, + { 0x3d400218, 0x7070707 }, + { 0x3d40021c, 0xf07 }, + { 0x3d400250, 0x1705 }, + { 0x3d400254, 0x2c }, + { 0x3d40025c, 0x4000030 }, + { 0x3d400264, 0x900093e7 }, + { 0x3d40026c, 0x2005574 }, + { 0x3d400400, 0x111 }, + { 0x3d400404, 0x72ff }, + { 0x3d400408, 0x72ff }, + { 0x3d400494, 0x2100e07 }, + { 0x3d400498, 0x620096 }, + { 0x3d40049c, 0x1100e07 }, + { 0x3d4004a0, 0xc8012c }, + { 0x3d402020, 0x1001 }, + { 0x3d402024, 0x30d400 }, + { 0x3d402050, 0x20d000 }, + { 0x3d402064, 0xc0026 }, + { 0x3d4020dc, 0x840000 }, + { 0x3d4020e0, 0x330000 }, + { 0x3d4020e8, 0x660048 }, + { 0x3d4020ec, 0x160048 }, + { 0x3d402100, 0xa040305 }, + { 0x3d402104, 0x30407 }, + { 0x3d402108, 0x203060b }, + { 0x3d40210c, 0x505000 }, + { 0x3d402110, 0x2040202 }, + { 0x3d402114, 0x2030202 }, + { 0x3d402118, 0x1010004 }, + { 0x3d40211c, 0x302 }, + { 0x3d402130, 0x20300 }, + { 0x3d402134, 0xa100002 }, + { 0x3d402138, 0x27 }, + { 0x3d402144, 0x14000a }, + { 0x3d402180, 0x640004 }, + { 0x3d402190, 0x3818200 }, + { 0x3d402194, 0x80303 }, + { 0x3d4021b4, 0x100 }, + { 0x3d4020f4, 0x599 }, + { 0x3d403020, 0x1001 }, + { 0x3d403024, 0xc3500 }, + { 0x3d403050, 0x20d000 }, + { 0x3d403064, 0x3000a }, + { 0x3d4030dc, 0x840000 }, + { 0x3d4030e0, 0x330000 }, + { 0x3d4030e8, 0x660048 }, + { 0x3d4030ec, 0x160048 }, + { 0x3d403100, 0xa010102 }, + { 0x3d403104, 0x30404 }, + { 0x3d403108, 0x203060b }, + { 0x3d40310c, 0x505000 }, + { 0x3d403110, 0x2040202 }, + { 0x3d403114, 0x2030202 }, + { 0x3d403118, 0x1010004 }, + { 0x3d40311c, 0x302 }, + { 0x3d403130, 0x20300 }, + { 0x3d403134, 0xa100002 }, + { 0x3d403138, 0xa }, + { 0x3d403144, 0x50003 }, + { 0x3d403180, 0x190004 }, + { 0x3d403190, 0x3818200 }, + { 0x3d403194, 0x80303 }, + { 0x3d4031b4, 0x100 }, + { 0x3d4030f4, 0x599 }, + { 0x3d400028, 0x0 }, +}; + +/* P0 message block parameter for training firmware */ +struct dram_cfg_param ddr_fsp0_cfg2[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xfa0 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x131f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x3ff4 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x3ff4 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0xf400 }, + { 0x54033, 0x333f }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0xf400 }, + { 0x54039, 0x333f }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + + +/* P1 message block parameter for training firmware */ +struct dram_cfg_param ddr_fsp1_cfg2[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x101 }, + { 0x54003, 0x190 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x3300 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x3300 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + + +/* P2 message block parameter for training firmware */ +struct dram_cfg_param ddr_fsp2_cfg2[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x102 }, + { 0x54003, 0x64 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x3300 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x3300 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + + +/* P0 2D message block parameter for training firmware */ +struct dram_cfg_param ddr_fsp0_2d_cfg2[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xfa0 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x61 }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54010, 0x1f7f }, + { 0x54012, 0x110 }, + { 0x54019, 0x3ff4 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x3ff4 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0xf400 }, + { 0x54033, 0x333f }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0xf400 }, + { 0x54039, 0x333f }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +struct dram_fsp_msg ddr_dram_fsp_msg2[] = { + { + /* P0 4000mts 1D */ + .drate = 4000, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg2, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg2), + }, + { + /* P1 400mts 1D */ + .drate = 400, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp1_cfg2, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg2), + }, + { + /* P2 100mts 1D */ + .drate = 100, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp2_cfg2, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg2), + }, + { + /* P0 4000mts 2D */ + .drate = 4000, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg2, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg2), + }, +}; + +/* quad die, dual rank aka 8 GB DDR timing config params */ struct dram_timing_info dram_timing = { .ddrc_cfg = ddr_ddrc_cfg, .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), @@ -1852,3 +2159,17 @@ struct dram_timing_info dram_timing = { .fsp_table = { 4000, 400, 100, }, }; +/* dual die, single rank aka 1 GB (untested), 2 GB or 4 GB DDR timing config params */ +struct dram_timing_info dram_timing2 = { + .ddrc_cfg = ddr_ddrc_cfg2, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg2), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg2, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg2), + .ddrphy_trained_csr = ddr_ddrphy_trained_csr, + .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 4000, 400, 100, }, +}; diff --git a/board/toradex/verdin-imx8mp/spl.c b/board/toradex/verdin-imx8mp/spl.c index 374538e133..db2e88a095 100644 --- a/board/toradex/verdin-imx8mp/spl.c +++ b/board/toradex/verdin-imx8mp/spl.c @@ -22,6 +22,8 @@ #include <power/pmic.h> #include <spl.h> +extern struct dram_timing_info dram_timing2; + DECLARE_GLOBAL_DATA_PTR; int spl_board_boot_device(enum boot_device boot_dev_spl) @@ -52,7 +54,13 @@ int spl_board_boot_device(enum boot_device boot_dev_spl) void spl_dram_init(void) { - ddr_init(&dram_timing); + /* + * Try configuring for dual rank memory falling back to single rank + */ + if (ddr_init(&dram_timing)) { + printf("Dual rank failed, attempting single rank configuration.\n"); + ddr_init(&dram_timing2); + } } #define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE) @@ -195,7 +203,8 @@ int power_init_board(void) /* set WDOG_B_CFG to cold reset */ pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1); - /* set CONFIG2 to enable the I2C level translator */ + /* set LDO4 and CONFIG2 to enable the I2C level translator */ + pmic_reg_write(p, PCA9450_LDO4CTRL, 0x59); pmic_reg_write(p, PCA9450_CONFIG2, 0x1); return 0; diff --git a/board/toradex/verdin-imx8mp/verdin-imx8mp.c b/board/toradex/verdin-imx8mp/verdin-imx8mp.c index f1d5f889b5..cdc28341ce 100644 --- a/board/toradex/verdin-imx8mp/verdin-imx8mp.c +++ b/board/toradex/verdin-imx8mp/verdin-imx8mp.c @@ -343,7 +343,10 @@ static void select_dt_from_module_version(void) * If we have a valid config block and it says we are a module with * Wi-Fi/Bluetooth make sure we use the -wifi device tree. */ - is_wifi = (tdx_hw_tag.prodid == VERDIN_IMX8MPQ_WIFI_BT_IT); + is_wifi = (tdx_hw_tag.prodid == VERDIN_IMX8MPQ_WIFI_BT_IT) || + (tdx_hw_tag.prodid == VERDIN_IMX8MPQ_2GB_WIFI_BT_IT) || + (tdx_hw_tag.prodid == VERDIN_IMX8MPQ_8GB_WIFI_BT) || + (tdx_hw_tag.prodid == VERDIN_IMX8MPQ_8GB_WIFI_BT_IT); #endif if (is_wifi) @@ -354,9 +357,6 @@ static void select_dt_from_module_version(void) if (strcmp(variant, env_variant)) { printf("Setting variant to %s\n", variant); env_set("variant", variant); -#ifndef CONFIG_ENV_IS_NOWHERE - env_save(); -#endif } } diff --git a/common/fdt_support.c b/common/fdt_support.c index 02cf5c6241..5a1c5c7378 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -17,6 +17,7 @@ #include <fdt_support.h> #include <exports.h> #include <fdtdec.h> +#include <version.h> /** * fdt_getprop_u32_default_node - Return a node's property or a default @@ -300,6 +301,15 @@ int fdt_chosen(void *fdt) } } + /* add u-boot version */ + err = fdt_setprop(fdt, nodeoffset, "u-boot,version", PLAIN_VERSION, + strlen(PLAIN_VERSION) + 1); + if (err < 0) { + printf("WARNING: could not set u-boot,version %s.\n", + fdt_strerror(err)); + return err; + } + return fdt_fixup_stdout(fdt, nodeoffset); } diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig index 4b4b7d2c2d..0ff9b7218b 100644 --- a/configs/apalis-imx8_defconfig +++ b/configs/apalis-imx8_defconfig @@ -14,7 +14,10 @@ CONFIG_IMX_BOOTAUX=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y CONFIG_OF_SYSTEM_SETUP=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="setenv fdtfile ${soc}-apalis${variant}-${fdt_board}.dtb" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/apalis-imx8/apalis-imx8-imximage.cfg" CONFIG_BOOTDELAY=1 CONFIG_LOG=y @@ -54,6 +57,7 @@ CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82800000 CONFIG_FASTBOOT_BUF_SIZE=0x08000000 CONFIG_FASTBOOT_FLASH=y +CONFIG_GPIO_HOG=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_IMX_LPI2C=y diff --git a/configs/apalis-imx8_tezi_defconfig b/configs/apalis-imx8_tezi_defconfig new file mode 100644 index 0000000000..c3ce6570b3 --- /dev/null +++ b/configs/apalis-imx8_tezi_defconfig @@ -0,0 +1,108 @@ +CONFIG_ARM=y +CONFIG_ARCH_IMX8=y +CONFIG_SYS_TEXT_BASE=0x80020000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0xFFFFDE00 +CONFIG_DM_GPIO=y +CONFIG_BOOTAUX_RESERVED_MEM_BASE=0x88000000 +CONFIG_BOOTAUX_RESERVED_MEM_SIZE=0x08000000 +CONFIG_TARGET_APALIS_IMX8=y +CONFIG_TDX_EASY_INSTALLER=y +CONFIG_SNVS_SEC_SC=y +CONFIG_NR_DRAM_BANKS=3 +CONFIG_IMX_BOOTAUX=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="setenv fdtfile ${soc}-apalis${variant}-${fdt_board}.dtb" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/apalis-imx8/apalis-imx8-imximage.cfg" +CONFIG_BOOTDELAY=1 +CONFIG_LOG=y +CONFIG_VERSION_VARIABLE=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_PROMPT="Apalis iMX8 TEZI # " +CONFIG_CMD_CPU=y +# CONFIG_BOOTM_NETBSD is not set +CONFIG_CMD_ASKENV=y +CONFIG_CMD_IMPORTENV=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DM=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_UUID=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-apalis" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_IP_DEFRAG=y +CONFIG_TFTP_BLOCKSIZE=4096 +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_IMX_AHCI=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ENV=y +CONFIG_CLK_IMX8=y +CONFIG_CPU=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82800000 +CONFIG_FASTBOOT_BUF_SIZE=0x08000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_MXC_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_IMX_LPI2C=y +CONFIG_MISC=y +CONFIG_DM_MMC=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC_SHARE_MDIO=y +CONFIG_FEC_MXC_MDIO_BASE=0x5B040000 +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_PHY=y +CONFIG_CDNS3_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX8=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_DM_SERIAL=y +CONFIG_FSL_LPUART=y +CONFIG_DM_THERMAL=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_CDNS3=y +CONFIG_USB_CDNS3_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_USB_PORT_AUTO=y +CONFIG_DM_VIDEO=y +CONFIG_VIDEO_IMX_HDP_LOAD=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig index 54f101bd36..256159b060 100644 --- a/configs/colibri-imx8x_defconfig +++ b/configs/colibri-imx8x_defconfig @@ -13,7 +13,11 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_IMX_BOOTAUX=y CONFIG_IMX_VSERVICE_SHARED_BUFFER=0x90400000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y CONFIG_OF_SYSTEM_SETUP=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="setenv fdtfile ${soc}-colibri-${fdt_board}.dtb" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri-imx8x/colibri-imx8x-imximage.cfg" CONFIG_BOOTDELAY=1 CONFIG_LOG=y diff --git a/configs/apalis-imx8x_defconfig b/configs/colibri-imx8x_tezi_defconfig index 5fe682575c..28237ce10e 100644 --- a/configs/apalis-imx8x_defconfig +++ b/configs/colibri-imx8x_tezi_defconfig @@ -7,19 +7,23 @@ CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y CONFIG_BOOTAUX_RESERVED_MEM_BASE=0x88000000 CONFIG_BOOTAUX_RESERVED_MEM_SIZE=0x08000000 -CONFIG_TARGET_APALIS_IMX8X=y +CONFIG_TARGET_COLIBRI_IMX8X=y +CONFIG_TDX_EASY_INSTALLER=y CONFIG_SNVS_SEC_SC=y CONFIG_NR_DRAM_BANKS=3 CONFIG_IMX_BOOTAUX=y CONFIG_IMX_VSERVICE_SHARED_BUFFER=0x90400000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri-imx8x/colibri-imx8x-imximage.cfg" CONFIG_BOOTDELAY=1 CONFIG_LOG=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_SYS_PROMPT="Apalis iMX8X # " +CONFIG_SYS_PROMPT="Colibri iMX8X TEZI # " CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y @@ -31,12 +35,11 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_CMD_UUID=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-apalis" +CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-colibri" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y @@ -52,7 +55,6 @@ CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82800000 CONFIG_FASTBOOT_BUF_SIZE=0x08000000 CONFIG_FASTBOOT_FLASH=y -CONFIG_GPIO_HOG=y CONFIG_MXC_GPIO=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y @@ -70,8 +72,8 @@ CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_MICREL=y -CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y CONFIG_FEC_MXC_SHARE_MDIO=y CONFIG_FEC_MXC_MDIO_BASE=0x5B040000 CONFIG_FEC_MXC=y diff --git a/configs/imx8mm_ab2_defconfig b/configs/imx8mm_ab2_defconfig index 78744cdc89..9a89e74a2e 100644 --- a/configs/imx8mm_ab2_defconfig +++ b/configs/imx8mm_ab2_defconfig @@ -65,6 +65,14 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MM=y CONFIG_MXC_GPIO=y +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y @@ -104,5 +112,20 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_DM_THERMAL=y CONFIG_NXP_TMU=y +CONFIG_USB_TCPC=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_DM_USB=y +CONFIG_CI_UDC=y +CONFIG_USB_EHCI_HCD=y + +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 + +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SDP_LOADADDR=0x40400000 CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/imx8mm_ab2_fspi_defconfig b/configs/imx8mm_ab2_fspi_defconfig index 62d7b01b6a..52d533ad5c 100644 --- a/configs/imx8mm_ab2_fspi_defconfig +++ b/configs/imx8mm_ab2_fspi_defconfig @@ -66,6 +66,14 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MM=y CONFIG_MXC_GPIO=y +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y @@ -105,5 +113,20 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_DM_THERMAL=y CONFIG_NXP_TMU=y +CONFIG_USB_TCPC=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_DM_USB=y +CONFIG_CI_UDC=y +CONFIG_USB_EHCI_HCD=y + +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 + +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SDP_LOADADDR=0x40400000 CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/imx8mm_ddr4_ab2_defconfig b/configs/imx8mm_ddr4_ab2_defconfig index 1788bb21aa..eca5bb5b1e 100644 --- a/configs/imx8mm_ddr4_ab2_defconfig +++ b/configs/imx8mm_ddr4_ab2_defconfig @@ -64,6 +64,14 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MM=y CONFIG_MXC_GPIO=y +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y @@ -90,6 +98,21 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_DM_THERMAL=y CONFIG_NXP_TMU=y +CONFIG_USB_TCPC=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_DM_USB=y +CONFIG_CI_UDC=y +CONFIG_USB_EHCI_HCD=y + +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 + +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SDP_LOADADDR=0x40400000 CONFIG_CMD_NAND=y CONFIG_CMD_UBI=y diff --git a/configs/imx8mm_ddr4_ab2_nand_defconfig b/configs/imx8mm_ddr4_ab2_nand_defconfig index d4a862849b..a3f3b959d1 100644 --- a/configs/imx8mm_ddr4_ab2_nand_defconfig +++ b/configs/imx8mm_ddr4_ab2_nand_defconfig @@ -62,6 +62,14 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MM=y CONFIG_MXC_GPIO=y +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y @@ -88,6 +96,21 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_DM_THERMAL=y CONFIG_NXP_TMU=y +CONFIG_USB_TCPC=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_DM_USB=y +CONFIG_CI_UDC=y +CONFIG_USB_EHCI_HCD=y + +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 + +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SDP_LOADADDR=0x40400000 CONFIG_CMD_NAND=y CONFIG_CMD_UBI=y diff --git a/configs/imx8mm_ddr4_evk_android_defconfig b/configs/imx8mm_ddr4_evk_android_defconfig index 3dd438f0d8..5b4266b181 100644 --- a/configs/imx8mm_ddr4_evk_android_defconfig +++ b/configs/imx8mm_ddr4_evk_android_defconfig @@ -147,4 +147,4 @@ CONFIG_APPEND_BOOTARGS=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y diff --git a/configs/imx8mm_evk_android_defconfig b/configs/imx8mm_evk_android_defconfig index 5d4e1bd2e5..90ff0f4557 100644 --- a/configs/imx8mm_evk_android_defconfig +++ b/configs/imx8mm_evk_android_defconfig @@ -152,4 +152,4 @@ CONFIG_APPEND_BOOTARGS=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y diff --git a/configs/imx8mm_evk_android_dual_defconfig b/configs/imx8mm_evk_android_dual_defconfig index bf0d0e7ff0..206ee9f6d2 100644 --- a/configs/imx8mm_evk_android_dual_defconfig +++ b/configs/imx8mm_evk_android_dual_defconfig @@ -154,4 +154,4 @@ CONFIG_SPL_MMC_WRITE=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y diff --git a/configs/imx8mm_evk_android_trusty_defconfig b/configs/imx8mm_evk_android_trusty_defconfig index 3d1b2c8a5d..1051ede460 100644 --- a/configs/imx8mm_evk_android_trusty_defconfig +++ b/configs/imx8mm_evk_android_trusty_defconfig @@ -156,5 +156,6 @@ CONFIG_TRUSTY_UNLOCK_PERMISSION=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8mm_evk_android_trusty_dual_defconfig b/configs/imx8mm_evk_android_trusty_dual_defconfig index 82b93db825..7313620bbe 100644 --- a/configs/imx8mm_evk_android_trusty_dual_defconfig +++ b/configs/imx8mm_evk_android_trusty_dual_defconfig @@ -158,5 +158,6 @@ CONFIG_TRUSTY_UNLOCK_PERMISSION=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8mm_evk_android_trusty_secure_unlock_defconfig b/configs/imx8mm_evk_android_trusty_secure_unlock_defconfig index 949e9fe195..4564fce00b 100644 --- a/configs/imx8mm_evk_android_trusty_secure_unlock_defconfig +++ b/configs/imx8mm_evk_android_trusty_secure_unlock_defconfig @@ -158,5 +158,6 @@ CONFIG_IMX_HAB=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8mn_ab2_defconfig b/configs/imx8mn_ab2_defconfig index 83d0cae063..889a89f6cb 100644 --- a/configs/imx8mn_ab2_defconfig +++ b/configs/imx8mn_ab2_defconfig @@ -70,6 +70,14 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MN=y CONFIG_MXC_GPIO=y +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y @@ -109,5 +117,15 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_DM_THERMAL=y CONFIG_NXP_TMU=y +CONFIG_USB_TCPC=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_DM_USB=y +CONFIG_CI_UDC=y +CONFIG_USB_EHCI_HCD=y + +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/imx8mn_ddr4_ab2_defconfig b/configs/imx8mn_ddr4_ab2_defconfig index d346408b8d..2bd8e8826b 100644 --- a/configs/imx8mn_ddr4_ab2_defconfig +++ b/configs/imx8mn_ddr4_ab2_defconfig @@ -70,6 +70,14 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MN=y CONFIG_MXC_GPIO=y +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y @@ -109,5 +117,15 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_DM_THERMAL=y CONFIG_NXP_TMU=y +CONFIG_USB_TCPC=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_DM_USB=y +CONFIG_CI_UDC=y +CONFIG_USB_EHCI_HCD=y + +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/imx8mn_ddr4_evk_android_defconfig b/configs/imx8mn_ddr4_evk_android_defconfig index 8a0be502cf..2d7318e0c8 100644 --- a/configs/imx8mn_ddr4_evk_android_defconfig +++ b/configs/imx8mn_ddr4_evk_android_defconfig @@ -152,4 +152,4 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y diff --git a/configs/imx8mn_evk_android_defconfig b/configs/imx8mn_evk_android_defconfig index 5d6687096a..5e13ac12d1 100644 --- a/configs/imx8mn_evk_android_defconfig +++ b/configs/imx8mn_evk_android_defconfig @@ -152,4 +152,4 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y diff --git a/configs/imx8mn_evk_android_dual_defconfig b/configs/imx8mn_evk_android_dual_defconfig index cbf1a37c2c..b9410d3b91 100644 --- a/configs/imx8mn_evk_android_dual_defconfig +++ b/configs/imx8mn_evk_android_dual_defconfig @@ -154,4 +154,4 @@ CONFIG_SPL_MMC_WRITE=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y diff --git a/configs/imx8mn_evk_android_trusty_defconfig b/configs/imx8mn_evk_android_trusty_defconfig index f028f5a57b..d775a4513e 100644 --- a/configs/imx8mn_evk_android_trusty_defconfig +++ b/configs/imx8mn_evk_android_trusty_defconfig @@ -156,5 +156,6 @@ CONFIG_TRUSTY_UNLOCK_PERMISSION=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8mn_evk_android_trusty_dual_defconfig b/configs/imx8mn_evk_android_trusty_dual_defconfig index 0342cf9909..e300825d26 100644 --- a/configs/imx8mn_evk_android_trusty_dual_defconfig +++ b/configs/imx8mn_evk_android_trusty_dual_defconfig @@ -158,5 +158,6 @@ CONFIG_SPL_MMC_WRITE=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8mn_evk_android_trusty_secure_unlock_defconfig b/configs/imx8mn_evk_android_trusty_secure_unlock_defconfig index c7737a4c0d..7c0b2e2dd3 100644 --- a/configs/imx8mn_evk_android_trusty_secure_unlock_defconfig +++ b/configs/imx8mn_evk_android_trusty_secure_unlock_defconfig @@ -158,5 +158,6 @@ CONFIG_IMX_HAB=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8mp_evk_android_defconfig b/configs/imx8mp_evk_android_defconfig index 057b2294e0..dd1efbccb7 100644 --- a/configs/imx8mp_evk_android_defconfig +++ b/configs/imx8mp_evk_android_defconfig @@ -164,4 +164,4 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y diff --git a/configs/imx8mp_evk_android_dual_defconfig b/configs/imx8mp_evk_android_dual_defconfig index 6ad083ed29..070df50277 100644 --- a/configs/imx8mp_evk_android_dual_defconfig +++ b/configs/imx8mp_evk_android_dual_defconfig @@ -166,4 +166,4 @@ CONFIG_SPL_MMC_WRITE=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y diff --git a/configs/imx8mp_evk_android_powersave_defconfig b/configs/imx8mp_evk_android_powersave_defconfig new file mode 100644 index 0000000000..9c15cd91e3 --- /dev/null +++ b/configs/imx8mp_evk_android_powersave_defconfig @@ -0,0 +1,169 @@ +CONFIG_ARM=y +CONFIG_SPL_SYS_ICACHE_OFF=y +CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_ARCH_IMX8M=y +CONFIG_SYS_TEXT_BASE=0x40200000 +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x400000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_TARGET_IMX8MP_EVK=y +CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 +CONFIG_CSF_SIZE=0x2000 +CONFIG_SPL_TEXT_BASE=0x920000 +CONFIG_FIT=y +CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mp-lpddr4.cfg, ANDROID_SUPPORT" +CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb" +CONFIG_BOARD_LATE_INIT=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_POWER_SUPPORT=y +CONFIG_NR_DRAM_BANKS=3 +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="u-boot=> " +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +CONFIG_CMD_ERASEENV=y +# CONFIG_CMD_CRC32 is not set +# CONFIG_BOOTM_NETBSD is not set +CONFIG_CMD_CLK=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_SF=y +CONFIG_CMD_LED=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_IS_NOWHERE=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_CLK_COMPOSITE_CCF=y +CONFIG_CLK_IMX8MP=y +CONFIG_MXC_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FASTBOOT_UUU_SUPPORT=n +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0xc800000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MXC=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_DM_MMC=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_EFI_PARTITION=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_FSL_ESDHC_IMX=y +CONFIG_DM_SPI_FLASH=y +CONFIG_DM_SPI=y +CONFIG_FSL_FSPI=y +CONFIG_SPI=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SF_DEFAULT_BUS=0 +CONFIG_SF_DEFAULT_CS=0 +CONFIG_SF_DEFAULT_SPEED=40000000 +CONFIG_SF_DEFAULT_MODE=0 + +CONFIG_DM_ETH=y +# CONFIG_DM_ETH_PHY=y +CONFIG_DWC_ETH_QOS=y + +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y + +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX8M=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_MXC_UART=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_DM_THERMAL=y +CONFIG_NXP_TMU=y +CONFIG_USB_TCPC=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_DM_USB=y + +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_IMX8M=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y + +CONFIG_OF_BOARD_SETUP=y + +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_VIDEO_IMX_LCDIFV3=y +CONFIG_VIDEO_IMX_SEC_DSI=y +CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LCD_RAYDIUM_RM67191=y +CONFIG_VIDEO_ADV7535=y +CONFIG_SYS_WHITE_ON_BLACK=y + +CONFIG_LZ4=y +CONFIG_BCB_SUPPORT=y +CONFIG_ANDROID_RECOVERY=y +CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y +CONFIG_FSL_FASTBOOT=y +CONFIG_FASTBOOT_LOCK=y +CONFIG_CMD_BOOTA=y +CONFIG_LIBAVB=y +CONFIG_AVB_SUPPORT=y +CONFIG_APPEND_BOOTARGS=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_AVB_WARNING_LOGO=y +CONFIG_AVB_WARNING_LOGO_COLS=0x320 +CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 +CONFIG_VIRTUAL_AB_SUPPORT=y +CONFIG_IMX8M_VDD_SOC_850MV=y +CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS=y diff --git a/configs/imx8mp_evk_android_trusty_defconfig b/configs/imx8mp_evk_android_trusty_defconfig index b3ce199aad..ffbd21df5b 100644 --- a/configs/imx8mp_evk_android_trusty_defconfig +++ b/configs/imx8mp_evk_android_trusty_defconfig @@ -168,5 +168,6 @@ CONFIG_TRUSTY_UNLOCK_PERMISSION=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8mp_evk_android_trusty_dual_defconfig b/configs/imx8mp_evk_android_trusty_dual_defconfig index d1adfd052c..d6e04928b0 100644 --- a/configs/imx8mp_evk_android_trusty_dual_defconfig +++ b/configs/imx8mp_evk_android_trusty_dual_defconfig @@ -170,5 +170,6 @@ CONFIG_TRUSTY_UNLOCK_PERMISSION=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8mp_evk_android_trusty_powersave_defconfig b/configs/imx8mp_evk_android_trusty_powersave_defconfig new file mode 100644 index 0000000000..0c15d46c5f --- /dev/null +++ b/configs/imx8mp_evk_android_trusty_powersave_defconfig @@ -0,0 +1,176 @@ +CONFIG_ARM=y +CONFIG_SPL_SYS_ICACHE_OFF=y +CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_ARCH_IMX8M=y +CONFIG_SYS_TEXT_BASE=0x40200000 +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x400000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_TARGET_IMX8MP_EVK=y +CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 +CONFIG_CSF_SIZE=0x2000 +CONFIG_SPL_TEXT_BASE=0x920000 +CONFIG_FIT=y +CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mp-lpddr4.cfg, ANDROID_SUPPORT" +CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb" +CONFIG_BOARD_LATE_INIT=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_POWER_SUPPORT=y +CONFIG_NR_DRAM_BANKS=3 +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="u-boot=> " +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +CONFIG_CMD_ERASEENV=y +# CONFIG_CMD_CRC32 is not set +# CONFIG_BOOTM_NETBSD is not set +CONFIG_CMD_CLK=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_SF=y +CONFIG_CMD_LED=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_IS_NOWHERE=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_CLK_COMPOSITE_CCF=y +CONFIG_CLK_IMX8MP=y +CONFIG_MXC_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FASTBOOT_UUU_SUPPORT=n +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0xc800000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MXC=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_DM_MMC=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_EFI_PARTITION=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_FSL_ESDHC_IMX=y +CONFIG_DM_SPI_FLASH=y +CONFIG_DM_SPI=y +CONFIG_FSL_FSPI=y +CONFIG_SPI=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SF_DEFAULT_BUS=0 +CONFIG_SF_DEFAULT_CS=0 +CONFIG_SF_DEFAULT_SPEED=40000000 +CONFIG_SF_DEFAULT_MODE=0 + +CONFIG_DM_ETH=y +# CONFIG_DM_ETH_PHY=y +CONFIG_DWC_ETH_QOS=y + +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y + +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX8M=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_MXC_UART=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_DM_THERMAL=y +CONFIG_NXP_TMU=y +CONFIG_USB_TCPC=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_DM_USB=y + +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_IMX8M=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y + +CONFIG_OF_BOARD_SETUP=y + +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_VIDEO_IMX_LCDIFV3=y +CONFIG_VIDEO_IMX_SEC_DSI=y +CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LCD_RAYDIUM_RM67191=y +CONFIG_VIDEO_ADV7535=y +CONFIG_SYS_WHITE_ON_BLACK=y + +CONFIG_LZ4=y +CONFIG_BCB_SUPPORT=y +CONFIG_ANDROID_RECOVERY=y +CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_FLASH_MCUFIRMWARE_SUPPORT=y +CONFIG_FSL_FASTBOOT=y +CONFIG_FASTBOOT_LOCK=y +CONFIG_CMD_BOOTA=y +CONFIG_LIBAVB=y +CONFIG_AVB_SUPPORT=y +CONFIG_APPEND_BOOTARGS=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_AVB_WARNING_LOGO=y +CONFIG_AVB_WARNING_LOGO_COLS=0x320 +CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 +CONFIG_VIRTUAL_AB_SUPPORT=y +CONFIG_IMX8M_VDD_SOC_850MV=y +CONFIG_IMX8M_LPDDR4_FREQ0_2400MTS=y + +CONFIG_CMD_MMC_RPMB=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_IMX_TRUSTY_OS=y +CONFIG_TRUSTY_UNLOCK_PERMISSION=y +CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8mp_evk_android_trusty_secure_unlock_defconfig b/configs/imx8mp_evk_android_trusty_secure_unlock_defconfig index 8ab36c8fbf..e1b2492035 100644 --- a/configs/imx8mp_evk_android_trusty_secure_unlock_defconfig +++ b/configs/imx8mp_evk_android_trusty_secure_unlock_defconfig @@ -170,5 +170,6 @@ CONFIG_IMX_HAB=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x320 CONFIG_AVB_WARNING_LOGO_ROWS=0xc0 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8mq_evk_android_defconfig b/configs/imx8mq_evk_android_defconfig index c0ba6bb402..1ac4d8f571 100644 --- a/configs/imx8mq_evk_android_defconfig +++ b/configs/imx8mq_evk_android_defconfig @@ -144,4 +144,4 @@ CONFIG_APPEND_BOOTARGS=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 CONFIG_AVB_WARNING_LOGO_ROWS=0x60 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y diff --git a/configs/imx8mq_evk_android_dual_defconfig b/configs/imx8mq_evk_android_dual_defconfig index e7fa3c66bf..4a1e1966c1 100644 --- a/configs/imx8mq_evk_android_dual_defconfig +++ b/configs/imx8mq_evk_android_dual_defconfig @@ -146,4 +146,4 @@ CONFIG_SPL_MMC_WRITE=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 CONFIG_AVB_WARNING_LOGO_ROWS=0x60 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y diff --git a/configs/imx8mq_evk_android_trusty_defconfig b/configs/imx8mq_evk_android_trusty_defconfig index 06ec9633e7..9235f80966 100644 --- a/configs/imx8mq_evk_android_trusty_defconfig +++ b/configs/imx8mq_evk_android_trusty_defconfig @@ -148,5 +148,6 @@ CONFIG_TRUSTY_UNLOCK_PERMISSION=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 CONFIG_AVB_WARNING_LOGO_ROWS=0x60 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8mq_evk_android_trusty_dual_defconfig b/configs/imx8mq_evk_android_trusty_dual_defconfig index f7c8703853..fac2460c2b 100644 --- a/configs/imx8mq_evk_android_trusty_dual_defconfig +++ b/configs/imx8mq_evk_android_trusty_dual_defconfig @@ -150,5 +150,6 @@ CONFIG_TRUSTY_UNLOCK_PERMISSION=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 CONFIG_AVB_WARNING_LOGO_ROWS=0x60 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8mq_evk_android_trusty_secure_unlock_defconfig b/configs/imx8mq_evk_android_trusty_secure_unlock_defconfig index b24fe36efc..4bd166e396 100644 --- a/configs/imx8mq_evk_android_trusty_secure_unlock_defconfig +++ b/configs/imx8mq_evk_android_trusty_secure_unlock_defconfig @@ -150,5 +150,6 @@ CONFIG_IMX_HAB=y CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 CONFIG_AVB_WARNING_LOGO_ROWS=0x60 -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8qm_mek_android_defconfig b/configs/imx8qm_mek_android_defconfig index 2f9327fceb..061987bd15 100644 --- a/configs/imx8qm_mek_android_defconfig +++ b/configs/imx8qm_mek_android_defconfig @@ -186,4 +186,4 @@ CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 CONFIG_AVB_WARNING_LOGO_ROWS=0x60 CONFIG_PSCI_BOARD_REBOOT=y -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y diff --git a/configs/imx8qm_mek_android_hdmi_defconfig b/configs/imx8qm_mek_android_hdmi_defconfig index 61702302d4..bf71acf55d 100644 --- a/configs/imx8qm_mek_android_hdmi_defconfig +++ b/configs/imx8qm_mek_android_hdmi_defconfig @@ -187,4 +187,4 @@ CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 CONFIG_AVB_WARNING_LOGO_ROWS=0x60 CONFIG_PSCI_BOARD_REBOOT=y -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y diff --git a/configs/imx8qm_mek_android_trusty_defconfig b/configs/imx8qm_mek_android_trusty_defconfig index 309b9abe8b..950fdf771b 100644 --- a/configs/imx8qm_mek_android_trusty_defconfig +++ b/configs/imx8qm_mek_android_trusty_defconfig @@ -191,5 +191,6 @@ CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 CONFIG_AVB_WARNING_LOGO_ROWS=0x60 CONFIG_PSCI_BOARD_REBOOT=y -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8qm_mek_android_trusty_secure_unlock_defconfig b/configs/imx8qm_mek_android_trusty_secure_unlock_defconfig index 344e54a17e..fdf72c08b5 100644 --- a/configs/imx8qm_mek_android_trusty_secure_unlock_defconfig +++ b/configs/imx8qm_mek_android_trusty_secure_unlock_defconfig @@ -193,5 +193,6 @@ CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 CONFIG_AVB_WARNING_LOGO_ROWS=0x60 CONFIG_PSCI_BOARD_REBOOT=y -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8qm_mek_androidauto2_trusty_defconfig b/configs/imx8qm_mek_androidauto2_trusty_defconfig index a2af03de7a..a135e362cd 100644 --- a/configs/imx8qm_mek_androidauto2_trusty_defconfig +++ b/configs/imx8qm_mek_androidauto2_trusty_defconfig @@ -172,7 +172,9 @@ CONFIG_CMD_MMC_RPMB=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_IMX_TRUSTY_OS=y CONFIG_TRUSTY_UNLOCK_PERMISSION=y -CONFIG_DUAL_BOOTLOADER=y CONFIG_SPL_MMC_WRITE=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_PSCI_BOARD_REBOOT=y +CONFIG_VIRTUAL_AB_SUPPORT=y +CONFIG_ATTESTATION_ID_PRODUCT="mek_8q_car2" +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8qm_mek_androidauto2_trusty_md_defconfig b/configs/imx8qm_mek_androidauto2_trusty_md_defconfig index b601dba9d5..fa3fed0ace 100644 --- a/configs/imx8qm_mek_androidauto2_trusty_md_defconfig +++ b/configs/imx8qm_mek_androidauto2_trusty_md_defconfig @@ -174,8 +174,10 @@ CONFIG_CMD_MMC_RPMB=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_IMX_TRUSTY_OS=y CONFIG_TRUSTY_UNLOCK_PERMISSION=y -CONFIG_DUAL_BOOTLOADER=y CONFIG_SPL_MMC_WRITE=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_IMX_LOAD_HDMI_FIMRWARE_TX=y CONFIG_PSCI_BOARD_REBOOT=y +CONFIG_VIRTUAL_AB_SUPPORT=y +CONFIG_ATTESTATION_ID_PRODUCT="mek_8q_car2" +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8qm_mek_androidauto_trusty_defconfig b/configs/imx8qm_mek_androidauto_trusty_defconfig index 68d48e766b..ee35a5a456 100644 --- a/configs/imx8qm_mek_androidauto_trusty_defconfig +++ b/configs/imx8qm_mek_androidauto_trusty_defconfig @@ -177,3 +177,5 @@ CONFIG_SPL_MMC_WRITE=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_PSCI_BOARD_REBOOT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ATTESTATION_ID_PRODUCT="mek_8q_car" +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8qm_mek_androidauto_trusty_secure_unlock_defconfig b/configs/imx8qm_mek_androidauto_trusty_secure_unlock_defconfig index 21b8e4efa7..9f95efd7c7 100644 --- a/configs/imx8qm_mek_androidauto_trusty_secure_unlock_defconfig +++ b/configs/imx8qm_mek_androidauto_trusty_secure_unlock_defconfig @@ -179,3 +179,5 @@ CONFIG_SECURE_UNLOCK=y CONFIG_AHAB_BOOT=y CONFIG_PSCI_BOARD_REBOOT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ATTESTATION_ID_PRODUCT="mek_8q_car" +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8qm_mek_androidauto_xen_defconfig b/configs/imx8qm_mek_androidauto_xen_defconfig index 4eabba1b2e..547d118878 100644 --- a/configs/imx8qm_mek_androidauto_xen_defconfig +++ b/configs/imx8qm_mek_androidauto_xen_defconfig @@ -201,3 +201,4 @@ CONFIG_XEN=y CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y CONFIG_XEN_DEBUG_SERIAL=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_VIRTUAL_AB_SUPPORT=y diff --git a/configs/imx8qxp_mek_android_defconfig b/configs/imx8qxp_mek_android_defconfig index 61eda22642..e4ed614e41 100644 --- a/configs/imx8qxp_mek_android_defconfig +++ b/configs/imx8qxp_mek_android_defconfig @@ -187,4 +187,4 @@ CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 CONFIG_AVB_WARNING_LOGO_ROWS=0x60 CONFIG_PSCI_BOARD_REBOOT=y -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y diff --git a/configs/imx8qxp_mek_android_trusty_defconfig b/configs/imx8qxp_mek_android_trusty_defconfig index 96d792cbca..b1ff68e39e 100644 --- a/configs/imx8qxp_mek_android_trusty_defconfig +++ b/configs/imx8qxp_mek_android_trusty_defconfig @@ -192,5 +192,6 @@ CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 CONFIG_AVB_WARNING_LOGO_ROWS=0x60 CONFIG_PSCI_BOARD_REBOOT=y -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8qxp_mek_android_trusty_secure_unlock_defconfig b/configs/imx8qxp_mek_android_trusty_secure_unlock_defconfig index 39f245d3b1..a558316d81 100644 --- a/configs/imx8qxp_mek_android_trusty_secure_unlock_defconfig +++ b/configs/imx8qxp_mek_android_trusty_secure_unlock_defconfig @@ -194,5 +194,6 @@ CONFIG_AVB_WARNING_LOGO=y CONFIG_AVB_WARNING_LOGO_COLS=0x1E0 CONFIG_AVB_WARNING_LOGO_ROWS=0x60 CONFIG_PSCI_BOARD_REBOOT=y -CONFIG_ANDROID_DYNAMIC_PARTITION=y +CONFIG_VIRTUAL_AB_SUPPORT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8qxp_mek_androidauto2_trusty_defconfig b/configs/imx8qxp_mek_androidauto2_trusty_defconfig index 522c0f9c7b..e5dbcdbbae 100644 --- a/configs/imx8qxp_mek_androidauto2_trusty_defconfig +++ b/configs/imx8qxp_mek_androidauto2_trusty_defconfig @@ -182,7 +182,9 @@ CONFIG_CMD_MMC_RPMB=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_IMX_TRUSTY_OS=y CONFIG_TRUSTY_UNLOCK_PERMISSION=y -CONFIG_DUAL_BOOTLOADER=y CONFIG_SPL_MMC_WRITE=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_PSCI_BOARD_REBOOT=y +CONFIG_VIRTUAL_AB_SUPPORT=y +CONFIG_ATTESTATION_ID_PRODUCT="mek_8q_car2" +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8qxp_mek_androidauto_trusty_defconfig b/configs/imx8qxp_mek_androidauto_trusty_defconfig index 09e3ac9657..637933ad41 100644 --- a/configs/imx8qxp_mek_androidauto_trusty_defconfig +++ b/configs/imx8qxp_mek_androidauto_trusty_defconfig @@ -188,3 +188,5 @@ CONFIG_SPL_MMC_WRITE=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_PSCI_BOARD_REBOOT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ATTESTATION_ID_PRODUCT="mek_8q_car" +CONFIG_ID_ATTESTATION=y diff --git a/configs/imx8qxp_mek_androidauto_trusty_secure_unlock_defconfig b/configs/imx8qxp_mek_androidauto_trusty_secure_unlock_defconfig index d0fce82dc0..fd9f0c27d7 100644 --- a/configs/imx8qxp_mek_androidauto_trusty_secure_unlock_defconfig +++ b/configs/imx8qxp_mek_androidauto_trusty_secure_unlock_defconfig @@ -190,3 +190,5 @@ CONFIG_SECURE_UNLOCK=y CONFIG_AHAB_BOOT=y CONFIG_PSCI_BOARD_REBOOT=y CONFIG_LOAD_KEY_FROM_RPMB=y +CONFIG_ATTESTATION_ID_PRODUCT="mek_8q_car" +CONFIG_ID_ATTESTATION=y diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index a55c5c1ed6..ff4febcd33 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" CONFIG_OF_SYSTEM_SETUP=y @@ -46,6 +47,7 @@ CONFIG_SYS_PROMPT="Verdin iMX8MM # " # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_CRC32 is not set +CONFIG_CMD_ASKENV=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_CLK=y CONFIG_CMD_FUSE=y @@ -68,6 +70,10 @@ CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/verdin-imx8mm_tezi_defconfig b/configs/verdin-imx8mm_tezi_defconfig new file mode 100644 index 0000000000..e8d0192453 --- /dev/null +++ b/configs/verdin-imx8mm_tezi_defconfig @@ -0,0 +1,121 @@ +CONFIG_ARM=y +CONFIG_SPL_SYS_ICACHE_OFF=y +CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_ARCH_IMX8M=y +CONFIG_SYS_TEXT_BASE=0x40200000 +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x10000 +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0xFFFFDE0 +CONFIG_DM_GPIO=y +CONFIG_TARGET_VERDIN_IMX8MM=y +CONFIG_TDX_EASY_INSTALLER=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="setenv fdtfile imx8mm-verdin-${variant}-${fdt_board}.dtb" +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0x7E1000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL_TEXT_BASE=0x7E1000" +CONFIG_BOOTDELAY=1 +CONFIG_LOG=y +CONFIG_BOARD_LATE_INIT=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_ARCH_MISC_INIT=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SYS_PROMPT="Verdin iMX8MM TEZI # " +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_CONTROL=y +CONFIG_OF_EMBED=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-verdin" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ENV=y +CONFIG_CLK_COMPOSITE_CCF=y +CONFIG_CLK_IMX8MM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_MXC_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MXC=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_DM_MMC=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX8M=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RESET=y +CONFIG_MXC_UART=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_DM_THERMAL=y +CONFIG_NXP_TMU=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_SDP_LOADADDR=0x40400000 +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_IMX_SEC_DSI=y +CONFIG_VIDEO_ADV7535=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index 2c2227107b..ba98e49515 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_TEXT_BASE=0x920000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" CONFIG_OF_SYSTEM_SETUP=y @@ -50,7 +51,7 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_SYS_PROMPT="Verdin iMX8MP # " # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set -CONFIG_CMD_ERASEENV=y +CONFIG_CMD_ASKENV=y # CONFIG_CMD_CRC32 is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_CLK=y diff --git a/configs/verdin-imx8mp_tezi_defconfig b/configs/verdin-imx8mp_tezi_defconfig new file mode 100644 index 0000000000..1e40af9098 --- /dev/null +++ b/configs/verdin-imx8mp_tezi_defconfig @@ -0,0 +1,126 @@ +CONFIG_ARM=y +CONFIG_SPL_SYS_ICACHE_OFF=y +CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_ARCH_IMX8M=y +CONFIG_SYS_TEXT_BASE=0x40200000 +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x10000 +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_SYS_I2C_MXC_I2C4=y +CONFIG_ENV_SIZE=0x2000 +# Bogus, gets overwritten in include/configs/verdin-imx8mp.h +CONFIG_ENV_OFFSET=0x400000 +CONFIG_DM_GPIO=y +CONFIG_TARGET_VERDIN_IMX8MP=y +CONFIG_TDX_EASY_INSTALLER=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +# SPL fails if bigger +CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 +CONFIG_NR_DRAM_BANKS=2 +CONFIG_SPL=y +CONFIG_IMX_BOOTAUX=y +CONFIG_CSF_SIZE=0x2000 +CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 +CONFIG_SPL_TEXT_BASE=0x920000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/verdin-imx8mp/imximage.cfg" +CONFIG_BOOTDELAY=1 +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="setenv fdtfile imx8mp-verdin-${variant}-${fdt_board}.dtb" +CONFIG_LOG=y +CONFIG_BOARD_LATE_INIT=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_ARCH_MISC_INIT=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_BOOTROM_SUPPORT=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SYS_PROMPT="Verdin iMX8MP TEZI # " +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_READ=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mp-verdin" +# SPL recovery crashes otherwise +CONFIG_ENV_IS_NOWHERE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ENV=y +CONFIG_CLK_COMPOSITE_CCF=y +CONFIG_CLK_IMX8MP=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_GPIO_HOG=y +CONFIG_MXC_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MXC=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_DM_MMC=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_FSL_ESDHC_IMX=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y +CONFIG_DM_ETH_PHY=y +CONFIG_DWC_ETH_QOS=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX8M=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RESET=y +CONFIG_MXC_UART=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_DM_THERMAL=y +CONFIG_NXP_TMU=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/disk/part.c b/disk/part.c index 4cc2fc19f7..d349e4a435 100644 --- a/disk/part.c +++ b/disk/part.c @@ -513,8 +513,11 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str, /* Look up the device */ dev = blk_get_device_by_str(ifname, dev_str, dev_desc); - if (dev < 0) + if (dev < 0) { + printf("** Bad device specification %s %s **\n", + ifname, dev_str); goto cleanup; + } /* Convert partition ID string to number */ if (!part_str || !*part_str) { diff --git a/disk/part_efi.c b/disk/part_efi.c index 0ac9ea6d9b..4f403d2e0e 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -333,6 +333,62 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part, return 0; } +#if defined(CONFIG_DUAL_BOOTLOADER) && defined(CONFIG_SPL_BUILD) +int part_get_info_efi_by_name(struct blk_desc *dev_desc, const char *name, + disk_partition_t *info) +{ + ALLOC_CACHE_ALIGN_BUFFER_PAD(gpt_header, gpt_head, 1, dev_desc->blksz); + /* We don't free gpt_pte because the memory is allocated at + * CONFIG_SYS_SPL_PTE_RAM_BASE due to the limited memory at + * SPL stage. + */ + gpt_entry *gpt_pte = NULL; + int i = 0; + + if (name == NULL) { + printf("%s: Invalid Argument(s)\n", __func__); + return -1; + } + + /* This function validates AND fills in the GPT header and PTE */ + if (find_valid_gpt(dev_desc, gpt_head, &gpt_pte) != 1) + return -1; + + /* Search PTE to find matched partition. */ + for (i = 0; i < le32_to_cpu(gpt_head->num_partition_entries); i++) { + if (is_pte_valid(&gpt_pte[i]) && + strcmp(name, print_efiname(&gpt_pte[i])) == 0) { + /* Matched partition found, copy it. */ + /* The 'lbaint_t' casting may limit the maximum disk size to 2 TB */ + info->start = (lbaint_t)le64_to_cpu(gpt_pte[i].starting_lba); + /* The ending LBA is inclusive, to calculate size, add 1 to it */ + info->size = (lbaint_t)le64_to_cpu(gpt_pte[i].ending_lba) + 1 + - info->start; + info->blksz = dev_desc->blksz; + + snprintf((char *)info->name, sizeof(info->name), "%s", name); + strcpy((char *)info->type, "U-Boot"); + info->bootable = is_bootable(&gpt_pte[i]); +#if CONFIG_IS_ENABLED(PARTITION_UUIDS) + uuid_bin_to_str(gpt_pte[i].unique_partition_guid.b, info->uuid, + UUID_STR_FORMAT_GUID); +#endif +#ifdef CONFIG_PARTITION_TYPE_GUID + uuid_bin_to_str(gpt_pte[i].partition_type_guid.b, + info->type_guid, UUID_STR_FORMAT_GUID); +#endif + + debug("%s: start 0x" LBAF ", size 0x" LBAF ", name %s\n", __func__, + info->start, info->size, info->name); + + return i; + } + } + + return -1; +} +#endif /* CONFIG_DUAL_BOOTLOADER && CONFIG_SPL_BUILD */ + static int part_test_efi(struct blk_desc *dev_desc) { ALLOC_CACHE_ALIGN_BUFFER_PAD(legacy_mbr, legacymbr, 1, dev_desc->blksz); diff --git a/drivers/ddr/imx/imx8m/Kconfig b/drivers/ddr/imx/imx8m/Kconfig index 8a1156c0fe..dcae464356 100644 --- a/drivers/ddr/imx/imx8m/Kconfig +++ b/drivers/ddr/imx/imx8m/Kconfig @@ -39,4 +39,12 @@ config IMX8M_DRAM_INLINE_ECC help Select this config if you want to use inline ecc feature for imx8mp-evk board. + +config IMX8M_VDD_SOC_850MV + bool "imx8mp change the vdd_soc voltage to 850mv" + depends on IMX8MP + +config IMX8M_LPDDR4_FREQ0_2400MTS + bool "imx8m PDDR4 freq0 change from 4000MTS to 2400MTS" + endmenu diff --git a/drivers/fastboot/fb_fsl/fb_fsl_command.c b/drivers/fastboot/fb_fsl/fb_fsl_command.c index 5cf3bd83c7..14a202ce58 100644 --- a/drivers/fastboot/fb_fsl/fb_fsl_command.c +++ b/drivers/fastboot/fb_fsl/fb_fsl_command.c @@ -664,6 +664,37 @@ static void flashing(char *cmd, char *response) strcpy(response, "OKAY"); } } +#ifdef CONFIG_ID_ATTESTATION + else if (endswith(cmd, FASTBOOT_APPEND_ATTESTATION_ID)) { + if (trusty_append_attestation_id(ATTESTATION_ID_BRAND, strlen(ATTESTATION_ID_BRAND))) { + printf("Error append ATTESTATION_ID_BRAND failed!\n"); + strcpy(response, "FAILAppend ATTESTATION_ID_BRAND failed!"); + } else if (trusty_append_attestation_id(ATTESTATION_ID_DEVICE, strlen(ATTESTATION_ID_DEVICE))) { + printf("Error append ATTESTATION_ID_DEVICE failed!\n"); + strcpy(response, "FAILAppend ATTESTATION_ID_DEVICE failed!"); + } else if (trusty_append_attestation_id(CONFIG_ATTESTATION_ID_PRODUCT, strlen(CONFIG_ATTESTATION_ID_PRODUCT))) { + printf("Error append ATTESTATION_ID_PRODUCT failed!\n"); + strcpy(response, "FAILAppend ATTESTATION_ID_PRODUCT failed!"); + } else if (trusty_append_attestation_id(ATTESTATION_ID_MANUFACTURER, strlen(ATTESTATION_ID_MANUFACTURER))) { + printf("Error append ATTESTATION_ID_MANUFACTURER failed!\n"); + strcpy(response, "FAILAppend ATTESTATION_ID_MANUFACTURER failed!"); + } else if (trusty_append_attestation_id(ATTESTATION_ID_MODEL, strlen(ATTESTATION_ID_MODEL))) { + printf("Error append ATTESTATION_ID_MODEL failed!\n"); + strcpy(response, "FAILAppend ATTESTATION_ID_MODEL failed!"); + } else { + char *serial = get_serial(); + + if (!serial) { + printf("Error Failed to append the serial number!\n"); + strcpy(response, "FAIL Failed to append the serial number!"); + } else if (trusty_append_attestation_id(serial, 16)) { + printf("Error Failed to append the serial number!\n"); + strcpy(response, "FAILFailed to append the serial number!"); + } else + strcpy(response, "OKAY"); + } + } +#endif #ifndef CONFIG_AVB_ATX else if (endswith(cmd, FASTBOOT_SET_RPMB_KEY)) { if (fastboot_set_rpmb_key(fastboot_buf_addr, fastboot_bytes_received)) { @@ -831,6 +862,18 @@ static void flash(char *cmd, char *response) #if defined(CONFIG_FASTBOOT_LOCK) if (strncmp(cmd, "gpt", 3) == 0) { int gpt_valid = 0; + int status, mmc_no; + struct blk_desc *dev_desc; + mmc_no = fastboot_devinfo.dev_id; + dev_desc = blk_get_dev("mmc", mmc_no); + if (dev_desc) { + if (dev_desc->part_type != PART_TYPE_EFI) + dev_desc->part_type = PART_TYPE_EFI; + } + else { + fastboot_fail("", response); + return; + } gpt_valid = partition_table_valid(); /* If gpt is valid, load partitons table into memory. So if the next command is "fastboot reboot bootloader", diff --git a/drivers/fastboot/fb_fsl/fb_fsl_common.c b/drivers/fastboot/fb_fsl/fb_fsl_common.c index b992560ff9..31fa1eb72b 100644 --- a/drivers/fastboot/fb_fsl/fb_fsl_common.c +++ b/drivers/fastboot/fb_fsl/fb_fsl_common.c @@ -352,15 +352,6 @@ static int _fastboot_setup_dev(int *switched) void fastboot_setup(void) { int sw, ret; - struct tag_serialnr serialnr = { - .high = 0, - .low = 0, - }; - char serial[17]; - - get_board_serial(&serialnr); - sprintf(serial, "%08x%08x", serialnr.high, serialnr.low); - env_set("serial#", serial); /*execute board relevant initilizations for preparing fastboot */ board_fastboot_setup(); diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 710890a490..6a4d7658e7 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -788,8 +788,10 @@ static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value, * capable of polling by using mmc_wait_dat0, then rely on waiting the * stated timeout to be sufficient. */ - if (ret == -ENOSYS && !send_status) + if (ret == -ENOSYS && !send_status) { mdelay(timeout_ms); + return 0; + } /* Finally wait until the card is ready or indicates a failure * to switch. It doesn't hurt to use CMD13 here even if send_status @@ -800,11 +802,12 @@ static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value, ret = mmc_send_status(mmc, &status); if (!ret && (status & MMC_STATUS_SWITCH_ERROR)) { - pr_debug("switch failed %d/%d/0x%x !\n", set, index, + pr_err("switch failed %d/%d/0x%x !\n", set, index, value); return -EIO; } - if (!ret && (status & MMC_STATUS_RDY_FOR_DATA)) + if (!ret && (status & MMC_STATUS_RDY_FOR_DATA) && + (status & MMC_STATUS_CURR_STATE) == MMC_STATE_TRANS) return 0; udelay(100); } while (get_timer(start) < timeout_ms); diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index 01762df019..47b9422f12 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -44,7 +44,7 @@ void __attribute__((weak)) reset_cpu(ulong addr) { struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; - imx_watchdog_expire_now(wdog, true); + imx_watchdog_expire_now(wdog, false); } #endif diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index 7c04a4e3e7..5532f8e03f 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -35,26 +35,31 @@ #define CONFIG_IPADDR 192.168.10.2 #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_SERVERIP 192.168.10.1 +#define CONFIG_ROOTPATH "/srv/nfs" #define FEC_ENET_ENABLE_TXC_DELAY /** - * SYS_SDRAM_BASE 0x80000000 0.125MiB - * SYS_TEXT_BASE 0x80020000 2.375MiB - * kernel_addr_r 0x80280000 45.5MiB - * fdt_addr_r 0x83000000 1MiB - * scriptaddr 0x83100000 15MiB - * __RESERVED__ 0x84000000 48MiB - * loadaddr 0x87000000 48MiB - * ramdisk_addr_r 0x8a000000 288MiB (to hdp_addr) - * SYS_MEMTEST_START 0x90000000 - * hdp_addr 0x9c000000 - * SYS_MEMTEST_END 0xC0000000 + * SYS_TEXT_BASE 0x80020000 47.9MiB + * fdt_addr_r 0x83000000 1MiB + * scriptaddr 0x83100000 15MiB + * decoder_boot 0x84000000 4MiB + * encoder_boot 0x86000000 4MiB + * loadaddr 0x87000000 48MiB + * Tezi DTB 0x87000000 48MiB + * Tezi overlays 0x870F0000 48MiB + * M4 (FreeRTOS) 0x88000000 128MiB + * ramdisk_addr_r 0x8a000000 96MiB + * SYS_MEMTEST_START 0x90000000 + * RPMSG/IPU/DSP 0x90000000 96MiB + * kernel_addr_r 0x96000000 64MiB + * hdp_addr 0x9c000000 64MiB + * SYS_MEMTEST_END 0xC0000000 */ #define MEM_LAYOUT_ENV_SETTINGS \ "fdt_addr_r=0x83000000\0" \ "hdp_addr=0x9c000000\0" \ - "kernel_addr_r=0x80280000\0" \ + "kernel_addr_r=0x96000000\0" \ "ramdisk_addr_r=0x8a000000\0" \ "scriptaddr=0x83100000\0" @@ -81,8 +86,11 @@ #define AHAB_ENV "sec_boot=no\0" #endif -#define FDT_FILE "imx8qm-apalis-v1.1-eval.dtb" -#define FDT_FILE_V1_0 "imx8qm-apalis-eval.dtb" +#if defined(CONFIG_TDX_EASY_INSTALLER) +# define BOOT_SCRIPT "boot-tezi.scr" +#else +# define BOOT_SCRIPT "boot.scr" +#endif /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -90,14 +98,14 @@ BOOTENV \ M4_BOOT_ENV \ MEM_LAYOUT_ENV_SETTINGS \ - "boot_script_dhcp=boot.scr\0" \ + "boot_scripts=" BOOT_SCRIPT "\0" \ + "boot_script_dhcp=" BOOT_SCRIPT "\0" \ "bootcmd_mfg=select_dt_from_module_version && fastboot 0\0" \ - "script=boot.scr\0" \ "boot_file=Image\0" \ "console=ttyLP1 earlycon\0" \ "fdt_high=\0" \ "boot_fdt=try\0" \ - "fdtfile=" FDT_FILE "\0" \ + "fdt_board=eval\0" \ "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ "hdp_file=hdmitxfw.bin\0" \ "loadhdp=${load_cmd} ${hdp_addr} ${hdp_file}\0" \ diff --git a/include/configs/apalis-imx8x.h b/include/configs/apalis-imx8x.h deleted file mode 100644 index 695c20a2f4..0000000000 --- a/include/configs/apalis-imx8x.h +++ /dev/null @@ -1,191 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2019 Toradex - */ - -#ifndef __APALIS_IMX8X_H -#define __APALIS_IMX8X_H - -#include <linux/sizes.h> -#include <asm/arch/imx-regs.h> - -#define CONFIG_REMAKE_ELF - -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define USDHC1_BASE_ADDR 0x5B010000 -#define USDHC2_BASE_ADDR 0x5B020000 - -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG - -#define CONFIG_SKIP_RESOURCE_CHECKING - -/* Networking */ -#define FEC_QUIRK_ENET_MAC - -#define CONFIG_TFTP_TSIZE - -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_SERVERIP 192.168.10.1 - -#define FEC_ENET_ENABLE_TXC_DELAY - -/** - * SYS_SDRAM_BASE 0x80000000 0.125MiB - * SYS_TEXT_BASE 0x80020000 2.375MiB - * kernel_addr_r 0x80280000 45.5MiB - * fdt_addr_r 0x83000000 1MiB - * scriptaddr 0x83100000 15MiB - * __RESERVED__ 0x84000000 48MiB - * loadaddr 0x87000000 48MiB - * ramdisk_addr_r 0x8a000000 288MiB - * SYS_MEMTEST_START 0x90000000 - * SYS_MEMTEST_END 0xC0000000 - */ -#define MEM_LAYOUT_ENV_SETTINGS \ - "kernel_addr_r=0x80280000\0" \ - "fdt_addr_r=0x83100000\0" \ - "ramdisk_addr_r=0x8a000000\0" \ - "scriptaddr=0x83200000\0" - -#ifdef CONFIG_AHAB_BOOT -#define AHAB_ENV "sec_boot=yes\0" -#else -#define AHAB_ENV "sec_boot=no\0" -#endif - -/* Boot M4 */ -#define M4_BOOT_ENV \ - "m4_0_image=m4_0.bin\0" \ - "loadm4image_0=${load_cmd} ${loadaddr} " \ - "${m4_0_image}\0" \ - "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \ - -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 0) \ - func(USB, usb, 0) \ - func(DHCP, dhcp, na) -#include <config_distro_bootcmd.h> - -#define FDT_FILE "imx8qxp-apalis-eval.dtb" - -#include <config_distro_bootcmd.h> -/* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - BOOTENV \ - AHAB_ENV \ - M4_BOOT_ENV \ - MEM_LAYOUT_ENV_SETTINGS \ - "bootcmd_mfg=fastboot 0\0" \ - "boot_script_dhcp=boot.scr\0" \ - "boot_file=Image\0" \ - "console=ttyLP1,115200\0" \ - "fdt_addr=0x83000000\0" \ - "fdtfile=" FDT_FILE "\0" \ - "fdt_high=\0" \ - "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ - "image=Image\0" \ - "initrd_addr=0x83800000\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=PARTUUID=${uuid} rootwait " \ - "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ - "panel=NULL\0" \ - "script=boot.scr\0" \ - "setup=run mmcargs\0" \ - "update_uboot=askenv confirm Did you load u-boot-dtb.imx (y/N)?; " \ - "if test \"$confirm\" = \"y\"; then " \ - "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ - "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x0 " \ - "${blkcnt}; fi\0" \ - "vidargs=video=imxdpufb5:off video=imxdpufb6:off video=imxdpufb7:off\0" - -/* Link Definitions */ -#define CONFIG_LOADADDR 0x89000000 - -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - -#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 - -#define CONFIG_SYS_MEMTEST_START 0x90000000 -#define CONFIG_SYS_MEMTEST_END 0xc0000000 - -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - -/* Environment in eMMC, before config block at the end of 1st "boot sector" */ -#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 eMMC */ -#define CONFIG_SYS_MMC_ENV_PART 1 - -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - -/* On Apalis iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 - -#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ - -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024) - -#define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define PHYS_SDRAM_1 0x80000000 -#define PHYS_SDRAM_2 0x880000000 -#define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */ -#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */ - -/* Serial */ -#define CONFIG_BAUDRATE 115200 - -/* Monitor Command Prompt */ -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_SYS_CBSIZE SZ_2K -#define CONFIG_SYS_MAXARGS 64 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) - -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 8000000 /* 8MHz */ - -/* USB Config */ -#define CONFIG_USBD_HS - -#define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE -#define CONFIG_USB_FUNCTION_MASS_STORAGE - -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 - -/* USB OTG controller configs */ -#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_HOST_ETHER -#define CONFIG_USB_ETHER_ASIX -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#endif - -/* Networking */ -#define CONFIG_FEC_ENET_DEV 0 - -#define IMX_FEC_BASE 0x5B040000 -#define CONFIG_FEC_MXC_PHYADDR 0x4 -#define CONFIG_ETHPRIME "eth0" - -#define CONFIG_FEC_XCV_TYPE RGMII -#define FEC_QUIRK_ENET_MAC -#define PHY_ANEG_TIMEOUT 20000 - -#ifdef CONFIG_DM_VIDEO -#define CONFIG_VIDEO_LOGO -#define CONFIG_SPLASH_SCREEN -#define CONFIG_SPLASH_SCREEN_ALIGN -#define CONFIG_CMD_BMP -#define CONFIG_BMP_16BPP -#define CONFIG_BMP_24BPP -#define CONFIG_BMP_32BPP -#define CONFIG_VIDEO_BMP_RLE8 -#define CONFIG_VIDEO_BMP_LOGO -#endif - -#endif /* __APALIS_IMX8X_H */ diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 5e59835c0f..fbb811cbb7 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2019 Toradex + * Copyright 2019-2021 Toradex */ #ifndef __COLIBRI_IMX8X_H @@ -29,21 +29,27 @@ #define CONFIG_IPADDR 192.168.10.2 #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_SERVERIP 192.168.10.1 +#define CONFIG_ROOTPATH "/srv/nfs" /** - * SYS_SDRAM_BASE 0x80000000 0.125MiB - * SYS_TEXT_BASE 0x80020000 2.375MiB - * kernel_addr_r 0x80280000 45.5MiB - * fdt_addr_r 0x83000000 1MiB - * scriptaddr 0x83100000 15MiB - * __RESERVED__ 0x84000000 48MiB - * loadaddr 0x87000000 48MiB - * ramdisk_addr_r 0x8a000000 288MiB - * SYS_MEMTEST_START 0x90000000 - * SYS_MEMTEST_END 0xC0000000 + * SYS_TEXT_BASE 0x80020000 47.9MiB + * fdt_addr_r 0x83100000 1MiB + * scriptaddr 0x83200000 15MiB + * decoder_boot 0x84000000 4MiB + * encoder_boot 0x86000000 4MiB + * loadaddr 0x87000000 48MiB + * Tezi DTB 0x87000000 48MiB + * Tezi overlays 0x870F0000 48MiB + * M4 (FreeRTOS) 0x88000000 128MiB + * ramdisk_addr_r 0x8a000000 96MiB + * SYS_MEMTEST_START 0x90000000 + * RPMSG/IPU/DSP 0x90000000 96MiB + * kernel_addr_r 0x96000000 64MiB + * SYS_MEMTEST_END 0xB0000000 */ + #define MEM_LAYOUT_ENV_SETTINGS \ - "kernel_addr_r=0x80280000\0" \ + "kernel_addr_r=0x96000000\0" \ "fdt_addr_r=0x83100000\0" \ "ramdisk_addr_r=0x8a000000\0" \ "scriptaddr=0x83200000\0" @@ -68,21 +74,27 @@ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> -#define FDT_FILE "imx8qxp-colibri-eval-v3.dtb" - #include <config_distro_bootcmd.h> + +#if defined(CONFIG_TDX_EASY_INSTALLER) +# define BOOT_SCRIPT "boot-tezi.scr" +#else +# define BOOT_SCRIPT "boot.scr" +#endif + /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ AHAB_ENV \ M4_BOOT_ENV \ MEM_LAYOUT_ENV_SETTINGS \ - "boot_script_dhcp=boot.scr\0" \ - "bootcmd_mfg=fastboot 0\0" \ + "boot_scripts=" BOOT_SCRIPT "\0" \ + "boot_script_dhcp=" BOOT_SCRIPT "\0" \ + "bootcmd_mfg=select_dt_from_module_version && fastboot 0\0" \ "console=ttyLP3,115200 earlycon=lpuart32,0x5a090000,115200\0" \ "fdt_addr=0x83000000\0" \ - "fdtfile=" FDT_FILE "\0" \ "fdt_high=\0" \ + "fdt_board=eval-v3\0" \ "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ "image=Image\0" \ "initrd_addr=0x83800000\0" \ @@ -91,7 +103,6 @@ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ "panel=NULL\0" \ - "script=boot.scr\0" \ "setup=run mmcargs\0" \ "update_uboot=askenv confirm Did you load u-boot-dtb.imx (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ @@ -101,14 +112,14 @@ "vidargs=video=imxdpufb5:off video=imxdpufb6:off video=imxdpufb7:off\0" /* Link Definitions */ -#define CONFIG_LOADADDR 0x89000000 +#define CONFIG_LOADADDR 0x87000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 #define CONFIG_SYS_MEMTEST_START 0x90000000 -#define CONFIG_SYS_MEMTEST_END 0xc0000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M) #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 diff --git a/include/configs/imx8dxl_evk.h b/include/configs/imx8dxl_evk.h index 4d2df35987..ccd81ab5da 100644 --- a/include/configs/imx8dxl_evk.h +++ b/include/configs/imx8dxl_evk.h @@ -290,9 +290,9 @@ /* total DDR is 1GB */ #if defined(CONFIG_TARGET_IMX8DXL_DDR3_EVK) -#define PHYS_SDRAM_1_SIZE 0x20000000 +#define PHYS_SDRAM_1_SIZE 0x1FF00000 /* 512MB - ECC region 1MB */ #else -#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1 GB */ +#define PHYS_SDRAM_1_SIZE 0x3FE00000 /* 1 GB - ECC region 2MB */ #endif #define PHYS_SDRAM_2_SIZE 0x00000000 diff --git a/include/configs/imx8mm_ab2.h b/include/configs/imx8mm_ab2.h index ed93602591..546aa47408 100644 --- a/include/configs/imx8mm_ab2.h +++ b/include/configs/imx8mm_ab2.h @@ -53,6 +53,7 @@ #define CONFIG_CMD_READ #define CONFIG_SERIAL_TAG +#define CONFIG_FASTBOOT_USB_DEV 0 #define CONFIG_REMAKE_ELF /* ENET Config */ @@ -300,4 +301,18 @@ #define CONFIG_SYS_I2C_SPEED 100000 +/* USB configs */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_USBD_HS +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#endif + +#define CONFIG_USB_GADGET_VBUS_DRAW 2 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + #endif diff --git a/include/configs/imx8mm_evk_android.h b/include/configs/imx8mm_evk_android.h index 7c01037942..aa22b98539 100644 --- a/include/configs/imx8mm_evk_android.h +++ b/include/configs/imx8mm_evk_android.h @@ -56,6 +56,18 @@ #define KEYSLOT_HWPARTITION_ID 2 #define KEYSLOT_BLKS 0x1FFF #define NS_ARCH_ARM64 1 + +#ifdef CONFIG_ID_ATTESTATION +#define ATTESTATION_ID_BRAND "Android" +#define ATTESTATION_ID_DEVICE "evk_8mm" +#define ATTESTATION_ID_MANUFACTURER "nxp" +#define ATTESTATION_ID_MODEL "EVK_8MM" +#ifdef CONFIG_ATTESTATION_ID_PRODUCT +#undef CONFIG_ATTESTATION_ID_PRODUCT +#endif +#define CONFIG_ATTESTATION_ID_PRODUCT "evk_8mm" +#endif + #endif /* Enable CONFIG_ANDROID_LOW_MEMORY to config 1GB ddr */ diff --git a/include/configs/imx8mn_ab2.h b/include/configs/imx8mn_ab2.h index cf116ff3cc..16027de06f 100644 --- a/include/configs/imx8mn_ab2.h +++ b/include/configs/imx8mn_ab2.h @@ -281,4 +281,21 @@ #define CONFIG_SYS_I2C_SPEED 100000 +/* USB configs */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_USBD_HS + +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE + +#endif + +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + #endif diff --git a/include/configs/imx8mn_evk_android.h b/include/configs/imx8mn_evk_android.h index 4eab9ca71f..0b7bf60432 100644 --- a/include/configs/imx8mn_evk_android.h +++ b/include/configs/imx8mn_evk_android.h @@ -56,6 +56,18 @@ #define KEYSLOT_HWPARTITION_ID 2 #define KEYSLOT_BLKS 0x1FFF #define NS_ARCH_ARM64 1 + +#ifdef CONFIG_ID_ATTESTATION +#define ATTESTATION_ID_BRAND "Android" +#define ATTESTATION_ID_DEVICE "evk_8mn" +#define ATTESTATION_ID_MANUFACTURER "nxp" +#define ATTESTATION_ID_MODEL "EVK_8MN" +#ifdef CONFIG_ATTESTATION_ID_PRODUCT +#undef CONFIG_ATTESTATION_ID_PRODUCT +#endif +#define CONFIG_ATTESTATION_ID_PRODUCT "evk_8mn" +#endif + #endif #endif /* IMX8MN_EVK_ANDROID_H */ diff --git a/include/configs/imx8mp_evk_android.h b/include/configs/imx8mp_evk_android.h index bcccf2876a..5db2a77602 100644 --- a/include/configs/imx8mp_evk_android.h +++ b/include/configs/imx8mp_evk_android.h @@ -56,6 +56,18 @@ #define KEYSLOT_HWPARTITION_ID 2 #define KEYSLOT_BLKS 0x1FFF #define NS_ARCH_ARM64 1 + +#ifdef CONFIG_ID_ATTESTATION +#define ATTESTATION_ID_BRAND "Android" +#define ATTESTATION_ID_DEVICE "evk_8mp" +#define ATTESTATION_ID_MANUFACTURER "nxp" +#define ATTESTATION_ID_MODEL "EVK_8MP" +#ifdef CONFIG_ATTESTATION_ID_PRODUCT +#undef CONFIG_ATTESTATION_ID_PRODUCT +#endif +#define CONFIG_ATTESTATION_ID_PRODUCT "evk_8mp" +#endif + #endif #endif /* IMX8MP_EVK_ANDROID_H */ diff --git a/include/configs/imx8mq_evk_android.h b/include/configs/imx8mq_evk_android.h index 5606de4a66..094e7f4429 100644 --- a/include/configs/imx8mq_evk_android.h +++ b/include/configs/imx8mq_evk_android.h @@ -56,6 +56,18 @@ #define KEYSLOT_HWPARTITION_ID 2 #define KEYSLOT_BLKS 0x1FFF #define NS_ARCH_ARM64 1 + +#ifdef CONFIG_ID_ATTESTATION +#define ATTESTATION_ID_BRAND "Android" +#define ATTESTATION_ID_DEVICE "evk_8mq" +#define ATTESTATION_ID_MANUFACTURER "nxp" +#define ATTESTATION_ID_MODEL "EVK_8MQ" +#ifdef CONFIG_ATTESTATION_ID_PRODUCT +#undef CONFIG_ATTESTATION_ID_PRODUCT +#endif +#define CONFIG_ATTESTATION_ID_PRODUCT "evk_8mq" +#endif + #endif #endif /* IMX8MQ_EVK_ANDROID_H */ diff --git a/include/configs/imx8qm_mek_android.h b/include/configs/imx8qm_mek_android.h index 7fd09ae63c..e3ed913c28 100644 --- a/include/configs/imx8qm_mek_android.h +++ b/include/configs/imx8qm_mek_android.h @@ -42,6 +42,18 @@ #define CONFIG_SPL_CRYPTO_SUPPORT #define CONFIG_SYS_FSL_SEC_LE #endif + +#ifdef CONFIG_ID_ATTESTATION +#define ATTESTATION_ID_BRAND "Android" +#define ATTESTATION_ID_DEVICE "mek_8q" +#define ATTESTATION_ID_MANUFACTURER "nxp" +#define ATTESTATION_ID_MODEL "MEK-MX8Q" +#ifdef CONFIG_ATTESTATION_ID_PRODUCT +#undef CONFIG_ATTESTATION_ID_PRODUCT +#endif +#define CONFIG_ATTESTATION_ID_PRODUCT "mek_8q" +#endif + #endif #endif /* IMX8QM_MEK_ANDROID_H */ diff --git a/include/configs/imx8qm_mek_android_auto.h b/include/configs/imx8qm_mek_android_auto.h index 4574e8b053..d95aae3f7e 100644 --- a/include/configs/imx8qm_mek_android_auto.h +++ b/include/configs/imx8qm_mek_android_auto.h @@ -65,6 +65,14 @@ #define NS_ARCH_ARM64 1 #define KEYSLOT_HWPARTITION_ID 2 #define KEYSLOT_BLKS 0x3FFF + +#ifdef CONFIG_ID_ATTESTATION +#define ATTESTATION_ID_BRAND "Android" +#define ATTESTATION_ID_DEVICE "mek_8q" +#define ATTESTATION_ID_MANUFACTURER "nxp" +#define ATTESTATION_ID_MODEL "MEK-MX8Q" +#endif + #endif #ifdef CONFIG_DUAL_BOOTLOADER diff --git a/include/configs/imx8qxp_mek_android.h b/include/configs/imx8qxp_mek_android.h index 01e86a21b5..71a7afbe17 100644 --- a/include/configs/imx8qxp_mek_android.h +++ b/include/configs/imx8qxp_mek_android.h @@ -40,6 +40,17 @@ #define CONFIG_SYS_FSL_SEC_LE #endif +#ifdef CONFIG_ID_ATTESTATION +#define ATTESTATION_ID_BRAND "Android" +#define ATTESTATION_ID_DEVICE "mek_8q" +#define ATTESTATION_ID_MANUFACTURER "nxp" +#define ATTESTATION_ID_MODEL "MEK-MX8Q" +#ifdef CONFIG_ATTESTATION_ID_PRODUCT +#undef CONFIG_ATTESTATION_ID_PRODUCT +#endif +#define CONFIG_ATTESTATION_ID_PRODUCT "mek_8q" +#endif + #endif #endif /* IMX8QXP_MEK_ANDROID_H */ diff --git a/include/configs/imx8qxp_mek_android_auto.h b/include/configs/imx8qxp_mek_android_auto.h index 448bab7461..aeeb89ddac 100644 --- a/include/configs/imx8qxp_mek_android_auto.h +++ b/include/configs/imx8qxp_mek_android_auto.h @@ -57,6 +57,14 @@ #define AVB_RPMB #define KEYSLOT_HWPARTITION_ID 2 #define KEYSLOT_BLKS 0x3FFF + +#ifdef CONFIG_ID_ATTESTATION +#define ATTESTATION_ID_BRAND "Android" +#define ATTESTATION_ID_DEVICE "mek_8q" +#define ATTESTATION_ID_MANUFACTURER "nxp" +#define ATTESTATION_ID_MODEL "MEK-MX8Q" +#endif + #endif #ifdef CONFIG_DUAL_BOOTLOADER diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 36188923a8..87e73c26a7 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -67,16 +67,26 @@ #define CONFIG_IPADDR 192.168.10.2 #define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_SERVERIP 192.168.10.1 +#define CONFIG_SERVERIP 192.168.10.1 +#define CONFIG_ROOTPATH "/srv/nfs" #endif /* CONFIG_CMD_NET */ +/** + * SYS_MEMTEST_START 0x40000000 500MiB + * kernel_addr_r 0x40000000 64MiB + * fdt_addr_r 0x44000000 5MiB + * loadaddr 0x44500000 43MiB + * scriptaddr 0x47000000 4MiB + * ramdisk_addr_r 0x47400000 64MiB + */ + #define MEM_LAYOUT_ENV_SETTINGS \ - "fdt_addr_r=0x43000000\0" \ + "fdt_addr_r=0x44000000\0" \ "kernel_addr_r=0x40000000\0" \ - "ramdisk_addr_r=0x46400000\0" \ - "scriptaddr=0x46000000\0" + "ramdisk_addr_r=0x47400000\0" \ + "scriptaddr=0x47000000\0" -#define CONFIG_LOADADDR 0x43500000 +#define CONFIG_LOADADDR 0x44500000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Enable Distro Boot */ @@ -92,6 +102,12 @@ #define BOOTENV #endif +#if defined(CONFIG_TDX_EASY_INSTALLER) +# define BOOT_SCRIPT "boot-tezi.scr" +#else +# define BOOT_SCRIPT "boot.scr" +#endif + /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ @@ -101,9 +117,15 @@ "fdt_board=dev\0" \ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "boot_script_dhcp=boot.scr\0" \ + "boot_scripts=" BOOT_SCRIPT "\0" \ + "boot_script_dhcp=" BOOT_SCRIPT "\0" \ "boot_file=Image\0" \ - "setup=setenv setupargs console=${console},${baudrate} console=tty1 consoleblank=0 earlycon\0" + "setup=setenv setupargs console=tty1 console=${console},${baudrate} consoleblank=0 earlycon\0" \ + "update_uboot=askenv confirm Did you load imx-boot (y/N)?; " \ + "if test \"$confirm\" = \"y\"; then " \ + "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ + "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x2 " \ + "${blkcnt}; fi\0" #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 @@ -135,7 +157,7 @@ #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 2)) #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 2f54ad96ca..e854ef6d2d 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -45,23 +45,37 @@ /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) -#define CONFIG_ETHPRIME "eth1" /* eqos is on-module Ethernet interface */ +#define CONFIG_ETHPRIME "eth0" /* eqos is aliased on-module Ethernet interface */ #define FEC_QUIRK_ENET_MAC #ifdef CONFIG_DWC_ETH_QOS #define CONFIG_SYS_NONCACHED_MEMORY (1 * SZ_1M) /* 1M */ #endif + +#define CONFIG_IPADDR 192.168.10.2 +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_SERVERIP 192.168.10.1 +#define CONFIG_ROOTPATH "/srv/nfs" #endif /* CONFIG_CMD_NET */ +/** + * SYS_MEMTEST_START 0x40000000 1.5GiB + * kernel_addr_r 0x40000000 64MiB + * fdt_addr_r 0x44000000 5MiB + * loadaddr 0x44500000 43MiB + * scriptaddr 0x47000000 4MiB + * ramdisk_addr_r 0x47400000 64MiB + */ + #define MEM_LAYOUT_ENV_SETTINGS \ - "fdt_addr_r=0x43000000\0" \ + "fdt_addr_r=0x44000000\0" \ "kernel_addr_r=0x40000000\0" \ - "ramdisk_addr_r=0x46400000\0" \ - "scriptaddr=0x46000000\0" + "ramdisk_addr_r=0x47400000\0" \ + "scriptaddr=0x47000000\0" /* Link Definitions */ -#define CONFIG_LOADADDR 0x43500000 +#define CONFIG_LOADADDR 0x44500000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Enable Distro Boot */ @@ -77,6 +91,12 @@ #define BOOTENV #endif +#if defined(CONFIG_TDX_EASY_INSTALLER) +# define BOOT_SCRIPT "boot-tezi.scr" +#else +# define BOOT_SCRIPT "boot.scr" +#endif + /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ @@ -86,9 +106,15 @@ "fdt_board=dev\0" \ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "boot_script_dhcp=boot.scr\0" \ + "boot_scripts=" BOOT_SCRIPT "\0" \ + "boot_script_dhcp=" BOOT_SCRIPT "\0" \ "boot_file=Image\0" \ - "setup=setenv setupargs console=${console},${baudrate} console=tty1 consoleblank=0 earlycon\0" + "setup=setenv setupargs console=tty1 console=${console},${baudrate} consoleblank=0 earlycon\0" \ + "update_uboot=askenv confirm Did you load imx-boot (y/N)?; " \ + "if test \"$confirm\" = \"y\"; then " \ + "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ + "${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \ + "${blkcnt}; fi\0" #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 diff --git a/include/fb_fsl.h b/include/fb_fsl.h index 3c551afcb8..8e2f1c487a 100644 --- a/include/fb_fsl.h +++ b/include/fb_fsl.h @@ -103,6 +103,7 @@ #define FASTBOOT_APPEND_EC_ATTESTATION_CERT_ENC "append-ec-atte-cert-enc" #define FASTBOOT_GET_MPPUBK "get-mppubk" #define FASTBOOT_GET_SERIAL_NUMBER "get-serial-number" +#define FASTBOOT_APPEND_ATTESTATION_ID "append-device-id" #endif #ifdef CONFIG_ANDROID_THINGS_SUPPORT diff --git a/include/interface/keymaster/keymaster.h b/include/interface/keymaster/keymaster.h index c98442d757..928854e890 100644 --- a/include/interface/keymaster/keymaster.h +++ b/include/interface/keymaster/keymaster.h @@ -66,7 +66,8 @@ enum keymaster_command { KM_SET_ATTESTATION_KEY_ENC = (0xa000 << KEYMASTER_REQ_SHIFT), KM_APPEND_ATTESTATION_CERT_CHAIN_ENC = (0xb000 << KEYMASTER_REQ_SHIFT), KM_GET_MPPUBK = (0xc000 << KEYMASTER_REQ_SHIFT), - KM_VERIFY_SECURE_UNLOCK = (0xd000 << KEYMASTER_REQ_SHIFT) + KM_VERIFY_SECURE_UNLOCK = (0xd000 << KEYMASTER_REQ_SHIFT), + KM_APPEND_ATTESTATION_ID = (0xe000 << KEYMASTER_REQ_SHIFT) }; typedef enum { @@ -287,6 +288,10 @@ struct km_attestation_data { const uint8_t *data; } TRUSTY_ATTR_PACKED; +struct km_attestation_id_data { + uint32_t data_size; + const uint8_t *data; +} TRUSTY_ATTR_PACKED; /** * km_raw_buffer - represents a single raw buffer * diff --git a/include/mmc.h b/include/mmc.h index d0d0d1b984..9251275e2e 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -177,6 +177,7 @@ static inline bool mmc_is_tuning_cmd(uint cmdidx) #define MMC_STATUS_ERROR (1 << 19) #define MMC_STATE_PRG (7 << 9) +#define MMC_STATE_TRANS (4 << 9) #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ diff --git a/include/part.h b/include/part.h index 35c8fc45a4..c65c1c22d7 100644 --- a/include/part.h +++ b/include/part.h @@ -453,6 +453,11 @@ int gpt_verify_partitions(struct blk_desc *dev_desc, */ int get_disk_guid(struct blk_desc *dev_desc, char *guid); +#if defined(CONFIG_DUAL_BOOTLOADER) && defined(CONFIG_SPL_BUILD) +int part_get_info_efi_by_name(struct blk_desc *dev_desc, const char *name, + disk_partition_t *info); +#endif + #endif #if CONFIG_IS_ENABLED(DOS_PARTITION) diff --git a/include/trusty/keymaster.h b/include/trusty/keymaster.h index a44ae21987..2a5551cce8 100644 --- a/include/trusty/keymaster.h +++ b/include/trusty/keymaster.h @@ -169,4 +169,12 @@ int trusty_verify_secure_unlock(uint8_t *unlock_credential, uint32_t credential_size, uint8_t *serial, uint32_t serial_size); +/* + * trusty_append_attestation_id is called to set attestation Device ID. + * + * @ data: Device ID string + * @ data_size: Device ID size + * */ +int trusty_append_attestation_id(const char *data, uint32_t data_size); + #endif /* TRUSTY_KEYMASTER_H_ */ diff --git a/include/trusty/keymaster_serializable.h b/include/trusty/keymaster_serializable.h index a8295dffed..830c0ba13b 100644 --- a/include/trusty/keymaster_serializable.h +++ b/include/trusty/keymaster_serializable.h @@ -68,6 +68,14 @@ int km_attestation_data_serialize(const struct km_attestation_data *data, uint8_t **out, uint32_t *out_size); /** + * Serializes a km_attestation_id_data structure. On success, allocates |*out_size| + * bytes to |*out| and writes the serialized |data| to |*out|. Caller takes + * ownership of |*out|. Returns one of trusty_err. + */ +int km_attestation_id_data_serialize(const struct km_attestation_id_data *data, + uint8_t** out, uint32_t *out_size); + +/** * Serializes a km_secure_unlock_data structure. On success, allocates |*out_size| * bytes to |*out| and writes the serialized |data| to |*out|. Caller takes * ownership of |*out|. Returns one of trusty_err. diff --git a/lib/Kconfig b/lib/Kconfig index c500c45881..fc20734b63 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -393,6 +393,16 @@ config LOAD_KEY_FROM_RPMB default n depends on IMX_TRUSTY_OS +config ID_ATTESTATION + bool "Support device ID attestation" + default n + depends on IMX_TRUSTY_OS + +config ATTESTATION_ID_PRODUCT + string "Product name for ID attestation" + depends on IMX_TRUSTY_OS && ID_ATTESTATION + default SYS_CONFIG_NAME + endmenu menu "Hashing Support" diff --git a/lib/avb/fsl/fsl_bootctrl.c b/lib/avb/fsl/fsl_bootctrl.c index 38733cebb1..53c4113890 100755 --- a/lib/avb/fsl/fsl_bootctrl.c +++ b/lib/avb/fsl/fsl_bootctrl.c @@ -462,10 +462,6 @@ out: #define PARTITION_NAME_LEN 13 #define PARTITION_BOOTLOADER "bootloader" -#ifdef CONFIG_ANDROID_AUTO_SUPPORT -/* This should always sync with the gpt */ -#define PARTITION_MISC_ID 9 -#endif extern int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value); @@ -487,11 +483,7 @@ int fsl_save_metadata_if_changed_dual_uboot(struct blk_desc *dev_desc, /* Save metadata if changed. */ if (memcmp(ab_data, ab_data_orig, sizeof(struct bootloader_control)) != 0) { /* Get misc partition info */ -#ifdef CONFIG_ANDROID_AUTO_SUPPORT - if (part_get_info(dev_desc, PARTITION_MISC_ID, &info) == -1) { -#else - if (part_get_info_by_name(dev_desc, FASTBOOT_PARTITION_MISC, &info) == -1) { -#endif + if (part_get_info_efi_by_name(dev_desc, FASTBOOT_PARTITION_MISC, &info) == -1) { printf("Can't get partition info of partition: misc\n"); return -1; } @@ -519,11 +511,7 @@ int fsl_load_metadata_dual_uboot(struct blk_desc *dev_desc, struct bootloader_control serialized; size_t num_bytes; -#ifdef CONFIG_ANDROID_AUTO_SUPPORT - if (part_get_info(dev_desc, PARTITION_MISC_ID, &info) == -1) { -#else - if (part_get_info_by_name(dev_desc, FASTBOOT_PARTITION_MISC, &info) == -1) { -#endif + if (part_get_info_efi_by_name(dev_desc, FASTBOOT_PARTITION_MISC, &info) == -1) { printf("Can't get partition info of partition: misc\n"); return -1; } else { @@ -888,10 +876,9 @@ AvbABFlowResult avb_flow_dual_uboot(AvbABOps* ab_ops, AvbOps* ops = ab_ops->ops; AvbSlotVerifyData* slot_data = NULL; AvbSlotVerifyData* data = NULL; - AvbABFlowResult ret; + AvbABFlowResult ret = 0; struct bootloader_control ab_data, ab_data_orig; AvbIOResult io_ret; - bool saw_and_allowed_verification_error = false; AvbSlotVerifyResult verify_result; bool set_slot_unbootable = false; int target_slot, n; @@ -960,8 +947,7 @@ AvbABFlowResult avb_flow_dual_uboot(AvbABOps* ab_ops, "AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR " "is set.\n", NULL); - saw_and_allowed_verification_error = - true; + ret = AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR; } else { set_slot_unbootable = true; } @@ -1040,13 +1026,6 @@ AvbABFlowResult avb_flow_dual_uboot(AvbABOps* ab_ops, avb_assert(slot_data != NULL); data = slot_data; slot_data = NULL; - if (saw_and_allowed_verification_error) { - avb_assert( - flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR); - ret = AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR; - } else { - ret = AVB_AB_FLOW_RESULT_OK; - } out: io_ret = fsl_save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig); @@ -1212,11 +1191,10 @@ AvbABFlowResult avb_ab_flow_fast(AvbABOps* ab_ops, AvbOps* ops = ab_ops->ops; AvbSlotVerifyData* slot_data[2] = {NULL, NULL}; AvbSlotVerifyData* data = NULL; - AvbABFlowResult ret; + AvbABFlowResult ret = 0; struct bootloader_control ab_data, ab_data_orig; size_t slot_index_to_boot, n; AvbIOResult io_ret; - bool saw_and_allowed_verification_error = false; size_t target_slot; AvbSlotVerifyResult verify_result; bool set_slot_unbootable = false; @@ -1285,9 +1263,8 @@ AvbABFlowResult avb_ab_flow_fast(AvbABOps* ab_ops, "AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR " "is set.\n", NULL); - saw_and_allowed_verification_error = - true; slot_index_to_boot = target_slot; + ret = AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR; n = 2; } else { set_slot_unbootable = true; @@ -1375,13 +1352,6 @@ AvbABFlowResult avb_ab_flow_fast(AvbABOps* ab_ops, avb_assert(slot_data[slot_index_to_boot] != NULL); data = slot_data[slot_index_to_boot]; slot_data[slot_index_to_boot] = NULL; - if (saw_and_allowed_verification_error) { - avb_assert( - flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR); - ret = AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR; - } else { - ret = AVB_AB_FLOW_RESULT_OK; - } /* ... and decrement tries remaining, if applicable. */ if (!ab_data.slot_info[slot_index_to_boot].successful_boot && diff --git a/lib/trusty/ql-tipc/keymaster.c b/lib/trusty/ql-tipc/keymaster.c index b4fa8cac7f..90a34e5d2c 100644 --- a/lib/trusty/ql-tipc/keymaster.c +++ b/lib/trusty/ql-tipc/keymaster.c @@ -398,6 +398,10 @@ end: int trusty_set_attestation_key(const uint8_t *key, uint32_t key_size, keymaster_algorithm_t algorithm) { + if (!initialized) { + trusty_error("Keymaster TIPC client not initialized!\n"); + return -1; + } return trusty_send_attestation_data(KM_SET_ATTESTATION_KEY, key, key_size, algorithm); } @@ -406,6 +410,10 @@ int trusty_append_attestation_cert_chain(const uint8_t *cert, uint32_t cert_size, keymaster_algorithm_t algorithm) { + if (!initialized) { + trusty_error("Keymaster TIPC client not initialized!\n"); + return -1; + } return trusty_send_attestation_data(KM_APPEND_ATTESTATION_CERT_CHAIN, cert, cert_size, algorithm); } @@ -413,6 +421,10 @@ int trusty_append_attestation_cert_chain(const uint8_t *cert, int trusty_set_attestation_key_enc(const uint8_t *key, uint32_t key_size, keymaster_algorithm_t algorithm) { + if (!initialized) { + trusty_error("Keymaster TIPC client not initialized!\n"); + return -1; + } return trusty_send_attestation_data(KM_SET_ATTESTATION_KEY_ENC, key, key_size, algorithm); } @@ -421,6 +433,10 @@ int trusty_append_attestation_cert_chain_enc(const uint8_t *cert, uint32_t cert_size, keymaster_algorithm_t algorithm) { + if (!initialized) { + trusty_error("Keymaster TIPC client not initialized!\n"); + return -1; + } return trusty_send_attestation_data(KM_APPEND_ATTESTATION_CERT_CHAIN_ENC, cert, cert_size, algorithm); } @@ -501,6 +517,11 @@ int trusty_get_mppubk(uint8_t *mppubk, uint32_t *size) int rc = TRUSTY_ERR_GENERIC; struct km_get_mppubk_resp resp; + if (!initialized) { + trusty_error("Keymaster TIPC client not initialized!\n"); + return -1; + } + rc = km_send_request(KM_GET_MPPUBK, NULL, 0); if (rc < 0) { trusty_error("%s: failed (%d) to send km mppubk request\n", __func__, rc); @@ -532,6 +553,11 @@ int trusty_verify_secure_unlock(uint8_t *unlock_credential, uint8_t *req = NULL; uint32_t req_size = 0; + if (!initialized) { + trusty_error("Keymaster TIPC client not initialized!\n"); + return -1; + } + struct km_secure_unlock_data secure_unlock_data = { .serial_size = serial_size, .serial_data = serial, @@ -554,3 +580,26 @@ end: } return rc; } + +int trusty_append_attestation_id(const char *data, uint32_t data_size) +{ + struct km_attestation_id_data attestation_id_data = { + .data_size = data_size, + .data = (uint8_t *)data, + }; + uint8_t *req = NULL; + uint32_t req_size = 0; + int rc = km_attestation_id_data_serialize(&attestation_id_data, &req, &req_size); + + if (rc < 0) { + trusty_error("failed (%d) to serialize request\n", rc); + goto end; + } + rc = km_do_tipc(KM_APPEND_ATTESTATION_ID, req, req_size, NULL, NULL); + +end: + if (req) { + trusty_free(req); + } + return rc; +} diff --git a/lib/trusty/ql-tipc/keymaster_serializable.c b/lib/trusty/ql-tipc/keymaster_serializable.c index 6d9297d099..232a093a9e 100644 --- a/lib/trusty/ql-tipc/keymaster_serializable.c +++ b/lib/trusty/ql-tipc/keymaster_serializable.c @@ -97,6 +97,23 @@ int km_attestation_data_serialize(const struct km_attestation_data *data, return TRUSTY_ERR_NONE; } +int km_attestation_id_data_serialize(const struct km_attestation_id_data *data, + uint8_t** out, uint32_t *out_size) +{ + if (!out || !data || !out_size) { + return TRUSTY_ERR_INVALID_ARGS; + } + *out_size = (sizeof(data->data_size) + data->data_size); + *out = trusty_calloc(*out_size, 1); + if (!*out) { + return TRUSTY_ERR_NO_MEMORY; + } + + append_sized_buf_to_buf(*out, data->data, data->data_size); + + return TRUSTY_ERR_NONE; +} + int km_secure_unlock_data_serialize(const struct km_secure_unlock_data *data, uint8_t** out, uint32_t *out_size) { |