diff options
Diffstat (limited to 'include/configs/at91sam9260ek.h')
| -rw-r--r-- | include/configs/at91sam9260ek.h | 76 |
1 files changed, 8 insertions, 68 deletions
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index e9a9f4eddc..a4883d68ce 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -112,76 +112,23 @@ #define NAND_MAX_FLOORS 1 #undef CFG_NAND_WP -/*#define AT91_SMART_MEDIA_ALE (1 << 21)*/ /* our ALE is AD21 */ -/*#define AT91_SMART_MEDIA_CLE (1 << 22)*/ /* our CLE is AD22 */ - -/* SMC Chip Select 3 Timings for NandFlash K9F1216U0A (samsung) - * for MASTER_CLOCK = 48000000. They were generated according to - * K9F1216U0A timings and for MASTER_CLOCK = 48000000. - * Please refer to SMC section in AT91SAM9261 datasheet to learn how - * to generate these values. - */ - -/* -#define AT91C_SM_NWE_SETUP (0 << 0) -#define AT91C_SM_NCS_WR_SETUP (0 << 8) -#define AT91C_SM_NRD_SETUP (0 << 16) -#define AT91C_SM_NCS_RD_SETUP (0 << 24) - -#define AT91C_SM_NWE_PULSE (2 << 0) -#define AT91C_SM_NCS_WR_PULSE (3 << 8) -#define AT91C_SM_NRD_PULSE (2 << 16) -#define AT91C_SM_NCS_RD_PULSE (4 << 24) - -#define AT91C_SM_NWE_CYCLE (3 << 0) -#define AT91C_SM_NRD_CYCLE (5 << 16) - -#define AT91C_SM_TDF (1 << 16) -*/ - -/* SMC Chip Select 3 Timings for NandFlash K9F1216U0A (samsung) - * for MASTER_CLOCK = 100000000. They were generated according to - * K9F1216U0A timings and for MASTER_CLOCK = 100000000. - * Please refer to SMC section in AT91SAM9261 datasheet to learn how - * to generate these values. - */ - -/* These timings are specific to K9F1216U0A (samsung) */ -/* -#define AT91C_SM_NWE_SETUP (0 << 0) -#define AT91C_SM_NCS_WR_SETUP (0 << 8) -#define AT91C_SM_NRD_SETUP (0 << 16) -#define AT91C_SM_NCS_RD_SETUP (0 << 24) - -#define AT91C_SM_NWE_PULSE (3 << 0) -#define AT91C_SM_NCS_WR_PULSE (3 << 8) -#define AT91C_SM_NRD_PULSE (4 << 16) -#define AT91C_SM_NCS_RD_PULSE (4 << 24) - -#define AT91C_SM_NWE_CYCLE (5 << 0) -#define AT91C_SM_NRD_CYCLE (5 << 16) -*/ - /* These timings are specific to MT29F2G16AAB 256Mb (Micron) * at MCK = 100 MHZ */ - -#define AT91C_SM_NWE_SETUP (0 << 0) +#define AT91C_SM_NWE_SETUP (1 << 0) #define AT91C_SM_NCS_WR_SETUP (0 << 8) -#define AT91C_SM_NRD_SETUP (0 << 16) +#define AT91C_SM_NRD_SETUP (1 << 16) #define AT91C_SM_NCS_RD_SETUP (0 << 24) -#define AT91C_SM_NWE_PULSE (4 << 0) -#define AT91C_SM_NCS_WR_PULSE (6 << 8) -#define AT91C_SM_NRD_PULSE (3 << 16) -#define AT91C_SM_NCS_RD_PULSE (5 << 24) +#define AT91C_SM_NWE_PULSE (3 << 0) +#define AT91C_SM_NCS_WR_PULSE (3 << 8) +#define AT91C_SM_NRD_PULSE (3<< 16) +#define AT91C_SM_NCS_RD_PULSE (3<< 24) -#define AT91C_SM_NWE_CYCLE (6 << 0) +#define AT91C_SM_NWE_CYCLE (5 << 0) #define AT91C_SM_NRD_CYCLE (5 << 16) -#define AT91C_SM_TDF (1 << 16) - - +#define AT91C_SM_TDF (2 << 16) #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 @@ -222,13 +169,6 @@ #define CFG_NO_FLASH 1 -#undef CFG_ENV_IS_IN_FLASH -#define CFG_ENV_IS_IN_DATAFLASH 1 -#undef CFG_ENV_IS_IN_NAND - -/*#define CONFIG_MTD_DEBUG 1 -#define CONFIG_MTD_DEBUG_VERBOSE MTD_DEBUG_LEVEL3 -*/ #ifdef CFG_ENV_IS_IN_NAND #define CFG_ENV_OFFSET 0x60000 /* environment starts here */ #define CFG_ENV_OFFSET_REDUND 0x80000 /* redundant environment starts here */ |