Age | Commit message (Collapse) | Author |
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If the DCU framebuffer is not configured, the board file still
tries to call fsl_dcu_fixedfb_setup, which leads to a compile
issue. Call fsl_dcu_fixedfb_setup only if DCU is enabled.
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Set DDR property fixup also in (future) version 2.x revisions.
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Add iomux definitions for DSPI second instance.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
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Most of the drivers available for Vybrid are not yet converted
to OF model to use device tree model, only few drivers
like SPI and GPIO drivers use device trees.
Add separate defconfig for who needs to use device tree model.
Later this can be integrated to single defconfig.
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
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Some firmwares running on the secondary core rely on UART pins
muxed at start time. Mux the Vybrid UART2 (which maps to Colibri
UART_B) at startup.
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Fixup the device-tree with the property fsl,has-cke-reset-pulls
which annotates that the board has pull-ups/downs which are required
to put the memory into self-refresh mode. The self-refresh mode in
turn is a requirement to put the SoC into deep sleep mode LPSTOP.
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Use device-tree fixup to communicate the MTD partitions to the
kernel. U-Boot's mtdparts environment variable will be used as
partition source for the device-tree based partition table too.
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Do not configure all interrupts to the primary core by default since
newer Linux versions configure the MSCM interrupt router correctly
by themself. This also prevents warnings due to already routed
interrupts when booting Linux on the secondary Cortex-M4 CPU.
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Use ft_system_setup to set Toradex specific device-tree properties.
At first, this is only the serial-number, which is using a property
which is about to be standardized in the binding documentation of
the Linux kernel.
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Rename the serial loader boot mode to "serial". Also add an alias
for the ESDHC1 controller, which provides the standard MMC connection
for the Colibri SO-DIMM default pinout.
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Some functionality is repetitve accross the boards. This creates
a common place for U-Boot functions which need to be implemented
similarly for all Toradex modules.
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Add IOMUX for the pad used as USB pen. This needs to be driven low for
the Iris and Viola boards where it is pulled up high by default. This is
required for the USB host functionality to work on these boards. Use the
board specific weak initialisation function, to drive the pin low which
would be called on "usb start".
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
[use switch statement to make port selection more obvious]
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Use the proposed format to transport the device's serial number
to the kernel:
http://www.spinics.net/lists/devicetree/msg76756.html
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Add GPIO's typically required for display handling such as GPIO 45
(SO-DIMM 71, BL_ON) or GPIO 22 (SO-DIMM 59, PWM<A> for backlight).
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Add GPIO platform data which will be
used when device tree control was
not enabled
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
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Inorder to use the pins as GPIO, apart from setting the alt-function,
pinmuxing need to be done, this patch adds pinmux entries of
few GPIOs.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
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Add environment variables for default framebuffer support using a
default VGA mode. Also remove memargs, since we use memory size to
reserve the framebuffer which does not get overwritten by the
Linux kernel. See related commit: 1d7518ec3a ("video: dcu: fix
framebuffer to the end of memory")
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Fix the framebuffer location to the very end of the available memory.
This allows to remove the area from available memory for the kernel,
which in turn allows to display the splash screen through the while
Linux kernel boot process.
Ideas has been taken from the sunxi display driver, e.g.
20779ec3a5 ("sunxi: video: Dynamically reserve framebuffer memory")
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When enabling the DCU and pixel clock, the test mode is activated
since this is the reset configuration. The test mode immediately
shows a red screen on a LCD. A moment later, the DCU gets
initialized properly.
This patch enables the pixel clock after initialization of the DCU
control register. This avoids this initial flicker on LCD screens.
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The Vybrid SoC family has the same display controller unit (DCU)
like the LS1021A SoC. This patch adds platform data, pinmux defines
and clock control to enable the driver for Vybrid based boards too.
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Implement boot mode for Vybrid SoC. Boot mode selection works much
like the i.MX6 implementation. Provide a standard set of boot modes
for the two eSDHC instances and use the reserved mode to jump into
SoC's recovery mechanism, the serial downloader.
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Display model information even if config block is missing.
While at it fix an indentation issue, update copyright period and fix
abbreviated setenv commands.
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Allow specifying a negative number as the Toradex config block offset
by changing its type from hex to int. This is required in the eMMC case
where this is used to force a location at the end of respective
hardware boot partition.
While at it fix SPL compilation by not compiling configblock handling
in this case for now.
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Move Kconfig sourcing to top level as conceptually it does not make
much sense to source it from a particular board especially as sourcing
it multiple time is completely discouraged as it would lead to the
following warning message:
board/toradex/common/Kconfig:29:warning: choice value used outside its
choice group
board/toradex/common/Kconfig:32:warning: choice value used outside its
choice group
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Add our support email address as well as our developer website as
official maintenance point of contacts:
Toradex ARM Support <support.arm@toradex.com>
http://developer.toradex.com/software-resources/arm-family/linux
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This adds initial support for Colibri VF50/VF61 based on Freescale
Vybrid SoC.
- CPU clocked at 396/500 MHz
- DDR3 at 396MHz
- for VF50, use PLL2 as memory clock (synchronous mode)
- for VF61, use PLL1 as memory clock (asynchronous mode)
- Console on UART0 (Colibri UART_A)
- Ethernet on FEC1
- PLL5 based RMII clocking (E.g. No external crystal)
- UART_A and UART_C I/O muxing
- Boot from NAND by default
- USB host and client support
Tested on Colibri VF50/VF61 booting using serial loader over UART.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
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